[llvm] [X86] Use an FP-based expansion for v4i32 ctlz on SSE2-only targets (PR #167034)

[Matt Arsenault via llvm-commits]

================
@@ -9480,6 +9481,55 @@ SDValue TargetLowering::expandVPCTLZ(SDNode *Node, SelectionDAG &DAG) const {
   return DAG.getNode(ISD::VP_CTPOP, dl, VT, Op, Mask, VL);
 }
 
+
+SDValue TargetLowering::expandCTLZWithFP(SDNode *Node, SelectionDAG &DAG) const {
+  // pseudocode :
+  // if(x==0) return 32;
+  // float f = (float) x;
+  // int i = bitcast<int>(f);
+  // int ilog2 = (i >> 23) - 127;
+  // return 31 - ilog2;
+
+  SDLoc dl(Node);
+  SDValue Op = Node->getOperand(0);
+  EVT VT = Op.getValueType();
+
+  assert(VT.isVector() && "This expansion is intended for vectors");
+
+  EVT EltVT = VT.getVectorElementType();
+  EVT FloatVT, CmpVT;
+  unsigned BitWidth, MantissaBits, ExponentBias;
+
+  // Converting to float type
+  if (EltVT == MVT::i32) {
+    FloatVT = VT.changeVectorElementType(MVT::f32);
+    const fltSemantics &Sem = FloatVT.getVectorElementType().getFltSemantics();
+    BitWidth = EltVT.getSizeInBits();
+    MantissaBits = APFloat::semanticsPrecision(Sem) - 1;
+    ExponentBias =
+        static_cast<unsigned>(-APFloat::semanticsMinExponent(Sem) + 1);
+  } 
+  else {
+    return SDValue();
+  }
----------------
arsenm wrote:

```suggestion
  } else {
    return SDValue();
  }
```

https://github.com/llvm/llvm-project/pull/167034