[llvm] [AArch64][GlobalISel] Improve lowering of vector fp16 fpext (PR #165554)

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``````````bash
git-clang-format --diff origin/main HEAD --extensions cpp -- llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp --diff_from_common_commit
``````````

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``````````diff
diff --git a/llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp b/llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
index 7775e234f..a88817c9d 100644
--- a/llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
+++ b/llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
@@ -826,13 +826,15 @@ AArch64LegalizerInfo::AArch64LegalizerInfo(const AArch64Subtarget &ST)
           {{s32, s16}, {s64, s16}, {s64, s32}, {v4s32, v4s16}, {v2s64, v2s32}})
       .libcallFor({{s128, s64}, {s128, s32}, {s128, s16}})
       .moreElementsToNextPow2(0)
-      .widenScalarIf([](const LegalityQuery &Q) {
-        LLT DstTy = Q.Types[0];
-        LLT SrcTy = Q.Types[1];
-        return SrcTy.isVector() && DstTy.isVector() &&
-               SrcTy.getScalarSizeInBits() == 16 &&
-               DstTy.getScalarSizeInBits() == 64;
-      }, changeElementTo(1, s32))
+      .widenScalarIf(
+          [](const LegalityQuery &Q) {
+            LLT DstTy = Q.Types[0];
+            LLT SrcTy = Q.Types[1];
+            return SrcTy.isVector() && DstTy.isVector() &&
+                   SrcTy.getScalarSizeInBits() == 16 &&
+                   DstTy.getScalarSizeInBits() == 64;
+          },
+          changeElementTo(1, s32))
       .clampNumElements(0, v4s32, v4s32)
       .clampNumElements(0, v2s64, v2s64)
       .scalarize(0);

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https://github.com/llvm/llvm-project/pull/165554