[llvm] [ARM] Auto-decode pred operands of Thumb instructions (PR #156540)

[Sergei Barannikov via llvm-commits]

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@@ -6161,12 +6249,12 @@ bool ARMDisassembler::isVectorPredicable(const MCInst &MI) const {
   return false;
 }
 
-// Most Thumb instructions don't have explicit predicates in the
-// encoding, but rather get their predicates from IT context.  We need
-// to fix up the predicate operands using this context information as a
-// post-pass.
+// Most Thumb instructions don't have explicit predicates in the encoding,
+// but rather get their predicates from IT context. Here, we check that the
+// decoded instruction is allowed to have the decoded predicate and advance
+// IT/VPT block states.
 MCDisassembler::DecodeStatus
-ARMDisassembler::AddThumbPredicate(MCInst &MI) const {
+ARMDisassembler::checkThumbPredicate(MCInst &MI) const {
   MCDisassembler::DecodeStatus S = Success;
 
   const FeatureBitset &FeatureBits = getSubtargetInfo().getFeatureBits();
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s-barannikov wrote:

The switch a little down below could probably be moved to `DecodePredicateOperand`. Not sure if that would be a better place for it. Let me know what you think.

https://github.com/llvm/llvm-project/pull/156540