[llvm] AMDGPU: Add baseline test for known bits of AssertNoFPClass (PR #167288)
via llvm-commits
llvm-commits at lists.llvm.org
Sun Nov 9 23:59:19 PST 2025
llvmbot wrote:
<!--LLVM PR SUMMARY COMMENT-->
@llvm/pr-subscribers-llvm-selectiondag
Author: Matt Arsenault (arsenm)
<details>
<summary>Changes</summary>
---
Full diff: https://github.com/llvm/llvm-project/pull/167288.diff
1 Files Affected:
- (added) llvm/test/CodeGen/AMDGPU/compute-known-bits-nofpclass.ll (+48)
``````````diff
diff --git a/llvm/test/CodeGen/AMDGPU/compute-known-bits-nofpclass.ll b/llvm/test/CodeGen/AMDGPU/compute-known-bits-nofpclass.ll
new file mode 100644
index 0000000000000..d440d58246333
--- /dev/null
+++ b/llvm/test/CodeGen/AMDGPU/compute-known-bits-nofpclass.ll
@@ -0,0 +1,48 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
+; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 < %s | FileCheck %s
+
+define i32 @known_positive(float nofpclass(nan ninf nzero nsub nnorm) %signbit.zero) #0 {
+; CHECK-LABEL: known_positive:
+; CHECK: ; %bb.0:
+; CHECK-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; CHECK-NEXT: v_and_b32_e32 v0, 0x7fffffff, v0
+; CHECK-NEXT: s_setpc_b64 s[30:31]
+ %cast = bitcast float %signbit.zero to i32
+ %and = and i32 %cast, 2147483647
+ ret i32 %and
+}
+
+define i32 @known_positive_maybe_nan(float nofpclass(ninf nzero nsub nnorm) %signbit.zero) #0 {
+; CHECK-LABEL: known_positive_maybe_nan:
+; CHECK: ; %bb.0:
+; CHECK-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; CHECK-NEXT: v_and_b32_e32 v0, 0x7fffffff, v0
+; CHECK-NEXT: s_setpc_b64 s[30:31]
+ %cast = bitcast float %signbit.zero to i32
+ %and = and i32 %cast, 2147483647
+ ret i32 %and
+}
+
+define i32 @known_negative(float nofpclass(nan pinf pzero psub pnorm) %signbit.one) #0 {
+; CHECK-LABEL: known_negative:
+; CHECK: ; %bb.0:
+; CHECK-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; CHECK-NEXT: v_or_b32_e32 v0, 0x80000000, v0
+; CHECK-NEXT: s_setpc_b64 s[30:31]
+ %cast = bitcast float %signbit.one to i32
+ %or = or i32 %cast, -2147483648
+ ret i32 %or
+}
+
+define i32 @known_negative_maybe_nan(float nofpclass(pinf pzero psub pnorm) %signbit.one) #0 {
+; CHECK-LABEL: known_negative_maybe_nan:
+; CHECK: ; %bb.0:
+; CHECK-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
+; CHECK-NEXT: v_or_b32_e32 v0, 0x80000000, v0
+; CHECK-NEXT: s_setpc_b64 s[30:31]
+ %cast = bitcast float %signbit.one to i32
+ %or = or i32 %cast, -2147483648
+ ret i32 %or
+}
+
+attributes #0 = { nounwind }
``````````
</details>
https://github.com/llvm/llvm-project/pull/167288
More information about the llvm-commits
mailing list