[llvm] 93d445c - [PostRASink] Add target hook shouldPostRASink (#167182)
via llvm-commits
llvm-commits at lists.llvm.org
Sun Nov 9 00:18:48 PST 2025
Author: Junjie Gu
Date: 2025-11-09T00:18:43-08:00
New Revision: 93d445cba39f4dd3dcda4fa1433eca825cf8fc09
URL: https://github.com/llvm/llvm-project/commit/93d445cba39f4dd3dcda4fa1433eca825cf8fc09
DIFF: https://github.com/llvm/llvm-project/commit/93d445cba39f4dd3dcda4fa1433eca825cf8fc09.diff
LOG: [PostRASink] Add target hook shouldPostRASink (#167182)
Added:
Modified:
llvm/include/llvm/CodeGen/TargetInstrInfo.h
llvm/lib/CodeGen/MachineSink.cpp
Removed:
################################################################################
diff --git a/llvm/include/llvm/CodeGen/TargetInstrInfo.h b/llvm/include/llvm/CodeGen/TargetInstrInfo.h
index 2dcedfb40f3e6..7010cffe23a11 100644
--- a/llvm/include/llvm/CodeGen/TargetInstrInfo.h
+++ b/llvm/include/llvm/CodeGen/TargetInstrInfo.h
@@ -436,7 +436,10 @@ class LLVM_ABI TargetInstrInfo : public MCInstrInfo {
/// MachineSink determines on its own whether the instruction is safe to sink;
/// this gives the target a hook to override the default behavior with regards
/// to which instructions should be sunk.
+ ///
+ /// shouldPostRASink() is used by PostRAMachineSink.
virtual bool shouldSink(const MachineInstr &MI) const { return true; }
+ virtual bool shouldPostRASink(const MachineInstr &MI) const { return true; }
/// Return false if the instruction should not be hoisted by MachineLICM.
///
diff --git a/llvm/lib/CodeGen/MachineSink.cpp b/llvm/lib/CodeGen/MachineSink.cpp
index cdcb29d92bfe6..94ed82eee9b8f 100644
--- a/llvm/lib/CodeGen/MachineSink.cpp
+++ b/llvm/lib/CodeGen/MachineSink.cpp
@@ -2287,6 +2287,10 @@ bool PostRAMachineSinkingImpl::tryToSinkCopy(MachineBasicBlock &CurBB,
continue;
}
+ // Don't postRASink instructions that the target prefers not to sink.
+ if (!TII->shouldPostRASink(MI))
+ continue;
+
if (MI.isDebugOrPseudoInstr())
continue;
More information about the llvm-commits
mailing list