[llvm] [PostRASink] Add target hook shouldPostRASink (PR #167182)
Junjie Gu via llvm-commits
llvm-commits at lists.llvm.org
Sat Nov 8 20:00:55 PST 2025
https://github.com/jgu222 updated https://github.com/llvm/llvm-project/pull/167182
>From 3813766bcca30034a1824e3d6ffa2612dc38632e Mon Sep 17 00:00:00 2001
From: "Gu, Junjie" <junjie.gu at intel.com>
Date: Sat, 8 Nov 2025 12:10:14 -0800
Subject: [PATCH] [PostRASink] Add target hook shouldPostRASink
Some target may choose not to sink some instructions. This hook
allows targets to control it.
---
llvm/include/llvm/CodeGen/TargetInstrInfo.h | 3 +++
llvm/lib/CodeGen/MachineSink.cpp | 4 ++++
2 files changed, 7 insertions(+)
diff --git a/llvm/include/llvm/CodeGen/TargetInstrInfo.h b/llvm/include/llvm/CodeGen/TargetInstrInfo.h
index 2dcedfb40f3e6..7010cffe23a11 100644
--- a/llvm/include/llvm/CodeGen/TargetInstrInfo.h
+++ b/llvm/include/llvm/CodeGen/TargetInstrInfo.h
@@ -436,7 +436,10 @@ class LLVM_ABI TargetInstrInfo : public MCInstrInfo {
/// MachineSink determines on its own whether the instruction is safe to sink;
/// this gives the target a hook to override the default behavior with regards
/// to which instructions should be sunk.
+ ///
+ /// shouldPostRASink() is used by PostRAMachineSink.
virtual bool shouldSink(const MachineInstr &MI) const { return true; }
+ virtual bool shouldPostRASink(const MachineInstr &MI) const { return true; }
/// Return false if the instruction should not be hoisted by MachineLICM.
///
diff --git a/llvm/lib/CodeGen/MachineSink.cpp b/llvm/lib/CodeGen/MachineSink.cpp
index cdcb29d92bfe6..94ed82eee9b8f 100644
--- a/llvm/lib/CodeGen/MachineSink.cpp
+++ b/llvm/lib/CodeGen/MachineSink.cpp
@@ -2287,6 +2287,10 @@ bool PostRAMachineSinkingImpl::tryToSinkCopy(MachineBasicBlock &CurBB,
continue;
}
+ // Don't postRASink instructions that the target prefers not to sink.
+ if (!TII->shouldPostRASink(MI))
+ continue;
+
if (MI.isDebugOrPseudoInstr())
continue;
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