[llvm] [AMDGPU] Stop optimising readfirstlane in pass AMDGPUUniformIntrinsicCombine (PR #166955)

[Pankaj Dwivedi via llvm-commits]

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@@ -57,10 +57,8 @@ static bool optimizeUniformIntrinsic(IntrinsicInst &II,
                                      const UniformityInfo &UI,
                                      ValueMap<const Value *, bool> &Tracker) {
   llvm::Intrinsic::ID IID = II.getIntrinsicID();
-
   switch (IID) {
   case Intrinsic::amdgcn_permlane64:
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PankajDwivedi-25 wrote:

Sure, will do that.

https://github.com/llvm/llvm-project/pull/166955