[llvm] [AMDGPU] Improved Lowering of abs(i8/i16) and -abs(i8/i16) (PR #165626)

[Matt Arsenault via llvm-commits]

arsenm wrote:

> > The reason is that MVT::i8 is not a valid type on our architecture, so setting a custom operation action no longer works.
> 
> It does work, it just goes through ReplaceNodeResults instead of LowerOperation

It also double complicates the vector of i8 case, but I'd expect you could just rely on i8 being legalized to i16 and not have to worry about either 



https://github.com/llvm/llvm-project/pull/165626