[llvm] [CodeGen] Refactor `determineCalleeSaves`. (PR #166763)
Matt Arsenault via llvm-commits
llvm-commits at lists.llvm.org
Thu Nov 6 08:11:12 PST 2025
================
@@ -135,15 +119,81 @@ void TargetFrameLowering::determineCalleeSaves(MachineFunction &MF,
MF.getFunction().hasFnAttribute(Attribute::NoUnwind) &&
!MF.getFunction().hasFnAttribute(Attribute::UWTable) &&
enableCalleeSaveSkip(MF))
- return;
+ return nullptr;
+
+ // When interprocedural register allocation is enabled, callee saved register
+ // list should be empty, since caller saved registers are preferred over
+ // callee saved registers. Unless it has some risked CSR to be optimized out.
+ if (MF.getTarget().Options.EnableIPRA &&
+ isSafeForNoCSROpt(MF.getFunction()) &&
+ isProfitableForNoCSROpt(MF.getFunction()))
+ return TRI.getIPRACSRegs(&MF);
+ return MF.getRegInfo().getCalleeSavedRegs();
+}
+void TargetFrameLowering::determineUncondPrologCalleeSaves(
+ MachineFunction &MF, const MCPhysReg *CSRegs,
+ BitVector &UncondPrologCSRs) const {
// Functions which call __builtin_unwind_init get all their registers saved.
- bool CallsUnwindInit = MF.callsUnwindInit();
+ if (MF.callsUnwindInit()) {
+ for (unsigned i = 0; CSRegs[i]; ++i) {
+ unsigned Reg = CSRegs[i];
+ UncondPrologCSRs.set(Reg);
+ }
+ }
+ return;
+}
+
+void TargetFrameLowering::determineEarlyCalleeSaves(
+ MachineFunction &MF, BitVector &EarlyCSRs) const {
+ const auto &ST = MF.getSubtarget();
----------------
arsenm wrote:
```suggestion
const TargetSubtargetInfo &ST = MF.getSubtarget();
```
https://github.com/llvm/llvm-project/pull/166763
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