[clang] [llvm] [SelectionDAG] Fix assertion failure on inline asm register type mismatch (PR #166615)

[Phoebe Wang via llvm-commits]

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@@ -27,6 +27,17 @@ bool IsX86_MMXType(llvm::Type *IRType) {
 static llvm::Type *X86AdjustInlineAsmType(CodeGen::CodeGenFunction &CGF,
                                           StringRef Constraint,
                                           llvm::Type *Ty) {
+  bool IsMMXCons = llvm::StringSwitch<bool>(Constraint)
+                       .Cases({"y", "&y", "^Ym"}, true)
+                       .Default(false);
+  if (IsMMXCons && Ty->isVectorTy()) {
+    if (cast<llvm::VectorType>(Ty)->getPrimitiveSizeInBits().getFixedValue() !=
+        64) {
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phoebewang wrote:

No parentheses for single line.

https://github.com/llvm/llvm-project/pull/166615