[llvm] [AMDGPU]: Add support to unpack V_PK_MOV_B32 (PR #163464)

[Matt Arsenault via llvm-commits]

================
@@ -485,25 +476,44 @@ bool SIPreEmitPeephole::canUnpackingClobberRegister(const MachineInstr &MI) {
     Register HiSrc1Reg = (Src1Mods & SISrcMods::OP_SEL_1)
                              ? TRI->getSubReg(SrcReg1, AMDGPU::sub1)
                              : TRI->getSubReg(SrcReg1, AMDGPU::sub0);
+    // Check if the register selected by op_sel_hi is the same as the first
+    // register in the destination register pair.
     if (TRI->regsOverlap(UnpackedDstReg, HiSrc1Reg))
       return true;
   }
 
-  // Applicable for packed instructions with 3 source operands, such as
-  // V_PK_FMA.
-  if (AMDGPU::hasNamedOperand(OpCode, AMDGPU::OpName::src2)) {
-    const MachineOperand *Src2MO =
-        TII->getNamedOperand(MI, AMDGPU::OpName::src2);
-    if (Src2MO && Src2MO->isReg()) {
-      Register SrcReg2 = Src2MO->getReg();
-      unsigned Src2Mods =
-          TII->getNamedOperand(MI, AMDGPU::OpName::src2_modifiers)->getImm();
-      Register HiSrc2Reg = (Src2Mods & SISrcMods::OP_SEL_1)
-                               ? TRI->getSubReg(SrcReg2, AMDGPU::sub1)
-                               : TRI->getSubReg(SrcReg2, AMDGPU::sub0);
-      if (TRI->regsOverlap(UnpackedDstReg, HiSrc2Reg))
+  // V_MOV_B32s have one src operand. Other candidate unpacked instructions with
+  // 2 or more src operands will perform the following checks.
+  if (!UnpackedInstHasOneSrcOp) {
+    const MachineOperand *Src0MO =
+        TII->getNamedOperand(MI, AMDGPU::OpName::src0);
+    if (Src0MO && Src0MO->isReg()) {
+      Register SrcReg0 = Src0MO->getReg();
+      unsigned Src0Mods =
+          TII->getNamedOperand(MI, AMDGPU::OpName::src0_modifiers)->getImm();
+      Register HiSrc0Reg = (Src0Mods & SISrcMods::OP_SEL_1)
+                               ? TRI->getSubReg(SrcReg0, AMDGPU::sub1)
+                               : TRI->getSubReg(SrcReg0, AMDGPU::sub0);
+      if (TRI->regsOverlap(UnpackedDstReg, HiSrc0Reg))
         return true;
     }
+
+    // Applicable for packed instructions with 3 source operands, such as
+    // V_PK_FMA.
+    if (AMDGPU::hasNamedOperand(OpCode, AMDGPU::OpName::src2)) {
+      const MachineOperand *Src2MO =
+          TII->getNamedOperand(MI, AMDGPU::OpName::src2);
----------------
arsenm wrote:

```suggestion
    if (const MachineOperand *Src2MO =
          TII->getNamedOperand(MI, AMDGPU::OpName::src2);
```

https://github.com/llvm/llvm-project/pull/163464