[llvm] [SelectionDAG] Fix assertion failure on inline asm register type mismatch (PR #166615)

[Matt Arsenault via llvm-commits]

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@@ -365,7 +365,17 @@ static SDValue getCopyFromPartsVector(SelectionDAG &DAG, const SDLoc &DL,
 
     assert(NumRegs == NumParts && "Part count doesn't match vector breakdown!");
     NumParts = NumRegs; // Silence a compiler warning.
-    assert(RegisterVT == PartVT && "Part type doesn't match vector breakdown!");
+
+    // Check if the register type matches the part type
+    if (RegisterVT != PartVT) {
+      diagnosePossiblyInvalidConstraint(*DAG.getContext(), V,
+                                        "register type (" +
+                                            EVT(RegisterVT).getEVTString() +
+                                            ") doesn't match operand type (" +
+                                            EVT(PartVT).getEVTString() + ")");
+      return DAG.getUNDEF(ValueVT);
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arsenm wrote:

```suggestion
      return DAG.getPOISON(ValueVT);
```

https://github.com/llvm/llvm-project/pull/166615