[llvm] [BPF] TableGen-erate SDNode descriptions (PR #166499)

[via llvm-commits]

yonghong-song wrote:

I tested by building bpf selftest with this change and everything is okay. I compared to XCore change (https://github.com/llvm/llvm-project/pull/138869) and they are very similar to each other.

You mentioned below:
```
Fix BR_CC/MEMCPY descriptions to match C++ code that creates the nodes
(an error detected by the enabled verification functionality).
```
Do you know why we do not have problems before for BR_CC/MRMCPY?

I checked a few targets, e.g.
```
def LanaiBrCC        : SDNode<"LanaiISD::BR_CC", SDT_LanaiBrCC,
                              [SDNPHasChain, SDNPInGlue]>;
def loongarch_brcc : SDNode<"LoongArchISD::BR_CC", SDT_LoongArchBrCC,
                            [SDNPHasChain]>;
```
and
```
def ARMmemcopy : SDNode<"ARMISD::MEMCPY", SDT_ARMMEMCPY,
                        [SDNPHasChain, SDNPInGlue, SDNPOutGlue,
                         SDNPMayStore, SDNPMayLoad]>;
def wasm_memcpy : SDNode<"WebAssemblyISD::MEMCPY", wasm_memcpy_t,
                         [SDNPHasChain, SDNPMayLoad, SDNPMayStore]>;
```
Looks like WASM and LoongArch are correct and the other two need update...




https://github.com/llvm/llvm-project/pull/166499