[llvm] [AMDGPU] Make rotr illegal (PR #166558)

[Jay Foad via llvm-commits]

================
@@ -1,5 +1,6 @@
 ; RUN: llc < %s -mtriple=r600 -mcpu=redwood | FileCheck %s
 ; RUN: llc < %s -mtriple=r600 -mcpu=cayman | FileCheck %s
+; XFAIL: *
----------------
jayfoad wrote:

I don't know what happened in this test since I don't speak R600. The full diff (for redwood) is:
```diff
 	.type	test, at function
 test:                                   ; @test
 ; %bb.0:                                ; %entry
-	ALU 12, @4, KC0[CB0:0-32], KC1[]
+	ALU 9, @4, KC0[CB0:0-32], KC1[]
 	MEM_RAT_CACHELESS STORE_RAW T0.X, T1.X, 1
 	CF_END
 	PAD
 	ALU clause starting at 4:
-	  ADD_INT   T0.Y, KC0[3].X, 1,  
-	  ADD_INT   T0.Z, KC0[3].Y, 1,  
-	  ADD_INT   T0.W, KC0[2].Z, 1,  
-	  ADD_INT * T1.W, KC0[2].W, 1,  
-	  BIT_ALIGN_INT   T0.X, PS, PS, KC0[3].Z, 
-	  BIT_ALIGN_INT   T1.Y, PV.W, PV.W, KC0[3].Z, 
-	  BIT_ALIGN_INT   T0.Z, PV.Z, PV.Z, KC0[3].Z, 
-	  BIT_ALIGN_INT * T0.W, PV.Y, PV.Y, KC0[3].Z, 
-	  OR_INT   T0.W, PV.W, PV.Z,  
-	  OR_INT * T1.W, PV.Y, PV.X,  
-	  OR_INT   T0.X, PS, PV.W,  
+	  ADD_INT   T0.Y, KC0[2].W, 1,  
+	  ADD_INT   T0.Z, KC0[2].Z, 1,  
+	  ADD_INT   T0.W, KC0[3].Y, 1,  
+	  ADD_INT * T1.W, KC0[3].X, 1,  
+	  OR_INT   T0.W, PS, PV.W,  
+	  OR_INT * T1.W, PV.Z, PV.Y,  
+	  OR_INT * T0.W, PS, PV.W,  
+	  BIT_ALIGN_INT   T0.X, PV.W, PV.W, KC0[3].Z, 
 	  LSHR * T1.X, KC0[2].Y, literal.x,  
 	2(2.802597e-45), 0(0.000000e+00)
 .Lfunc_end0:
```

https://github.com/llvm/llvm-project/pull/166558