[clang] [llvm] [RegisterCoalescer] Improve register allocation for return values by limiting rematerialization (PR #163047)

[Antonio Frighetto via llvm-commits]

antoniofrighetto wrote:

> > > I don't feel this is the right way to fix this problem. This looks like too specific and not really a coalescing problem.
> > 
> > 
> > Could you please provide an alternative direction for this? I second this is not a coalescing problem, though couldn't we let RegisterCoalescer avoid suboptimally recomputing the constant value when unneeded, as in cases above?
> 
> @rez5427 What does the IR before instruction selection look like? The IR you shared and the MachineIR don't match in your example.

IR before ISel:
```
@bytes1 = external global ptr
define i8 @foo() {
  store i32 42, ptr @bytes1, align 4
  %l = load i8, ptr @bytes1, align 1
  ret i8 %l
}
```
Machine IR after ISel:
```
bb.0 (%ir-block.0):
  %0:gpr = LUI target-flags(riscv-hi) @bytes1
  %1:gpr = ADDI $x0, 42
  SW %1:gpr, killed %0:gpr, target-flags(riscv-lo) @bytes1 :: (store (s32) into @bytes1, align 8)
  $x10 = COPY %1:gpr
  PseudoRET implicit $x10
```
Subsequent passes do not change the MIR until RegisterCoalescer, which changes it as follows:
```
0B      bb.0 (%ir-block.0):
16B       %0:gpr = LUI target-flags(riscv-hi) @bytes1
32B       %1:gpr = ADDI $x0, 42
48B       SW %1:gpr, %0:gpr, target-flags(riscv-lo) @bytes1 :: (store (s32) into @bytes1, align 8)
64B       $x10 = ADDI $x0, 42
80B       PseudoRET implicit killed $x10
```
The move of the constant has been rematerialized. This happens with optimized IR too: https://llvm.godbolt.org/z/WWM733rdn. 

https://github.com/llvm/llvm-project/pull/163047