[llvm] [AArch64][GlobalISel] Correct instructions for 64bit fneg constant vectors. (PR #166537)

via llvm-commits llvm-commits at lists.llvm.org
Wed Nov 5 03:31:12 PST 2025


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``````````bash
git-clang-format --diff origin/main HEAD --extensions cpp -- llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp --diff_from_common_commit
``````````

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View the diff from clang-format here.
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``````````diff
diff --git a/llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp b/llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
index eded9e028..394024693 100644
--- a/llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
+++ b/llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
@@ -5666,7 +5666,8 @@ AArch64InstructionSelector::emitConstantVector(Register Dst, Constant *CV,
                                                MachineRegisterInfo &MRI) {
   LLT DstTy = MRI.getType(Dst);
   unsigned DstSize = DstTy.getSizeInBits();
-  assert((DstSize == 64 || DstSize == 128) && "Unexpected vector constant size");
+  assert((DstSize == 64 || DstSize == 128) &&
+         "Unexpected vector constant size");
 
   if (CV->isNullValue()) {
     if (DstSize == 128) {

``````````

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https://github.com/llvm/llvm-project/pull/166537


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