[llvm] Fixes [AArch64] Assertion `EltCnt.isKnownEven() && "Cannot halve vector with odd number of elements."' failed. (PR #166528)

via llvm-commits llvm-commits at lists.llvm.org
Wed Nov 5 02:40:26 PST 2025


llvmbot wrote:


<!--LLVM PR SUMMARY COMMENT-->

@llvm/pr-subscribers-llvm-transforms

Author: Shakil Ahmed (ahmedshakill)

<details>
<summary>Changes</summary>

fixes #<!-- -->166320

---
Full diff: https://github.com/llvm/llvm-project/pull/166528.diff


2 Files Affected:

- (modified) llvm/include/llvm/CodeGen/BasicTTIImpl.h (+5) 
- (added) llvm/test/Transforms/VectorCombine/AArch64/sve-interleave-splat.ll (+11) 


``````````diff
diff --git a/llvm/include/llvm/CodeGen/BasicTTIImpl.h b/llvm/include/llvm/CodeGen/BasicTTIImpl.h
index 221d8f1e2f673..0fd278aacf681 100644
--- a/llvm/include/llvm/CodeGen/BasicTTIImpl.h
+++ b/llvm/include/llvm/CodeGen/BasicTTIImpl.h
@@ -1333,6 +1333,11 @@ class BasicTTIImplBase : public TargetTransformInfoImplCRTPBase<T> {
           TargetLowering::TypeSplitVector;
       if ((SplitSrc || SplitDst) && SrcVTy->getElementCount().isVector() &&
           DstVTy->getElementCount().isVector()) {
+        auto SrcEltCnt = SrcVTy->getElementCount();
+        auto DstEltCnt = DstVTy->getElementCount();
+        if (!SrcEltCnt.isKnownEven() || !DstEltCnt.isKnownEven()) {
+            return InstructionCost::getInvalid();
+        }
         Type *SplitDstTy = VectorType::getHalfElementsVectorType(DstVTy);
         Type *SplitSrcTy = VectorType::getHalfElementsVectorType(SrcVTy);
         const T *TTI = thisT();
diff --git a/llvm/test/Transforms/VectorCombine/AArch64/sve-interleave-splat.ll b/llvm/test/Transforms/VectorCombine/AArch64/sve-interleave-splat.ll
new file mode 100644
index 0000000000000..9a47800514b49
--- /dev/null
+++ b/llvm/test/Transforms/VectorCombine/AArch64/sve-interleave-splat.ll
@@ -0,0 +1,11 @@
+; RUN: opt -mtriple=aarch64-unknown-linux-gnu -passes=vector-combine %s -S -o - | FileCheck %s
+
+target triple = "aarch64-unknown-linux-gnu"
+
+define <vscale x 4 x i16> @interleave2_same_const_splat_nxv4i16() {
+;CHECK-LABEL: @interleave2_same_const_splat_nxv4i16(
+;CHECK: call <vscale x 4 x i16> @llvm.vector.interleave2
+;CHECK: ret <vscale x 4 x i16> %retval
+  %retval = call <vscale x 4 x i16> @llvm.vector.interleave2.nxv4i16(<vscale x 2 x i16> splat(i16 3), <vscale x 2 x i16> splat(i16 3))
+  ret <vscale x 4 x i16> %retval
+}

``````````

</details>


https://github.com/llvm/llvm-project/pull/166528


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