[llvm] [AMDGPU][MC] Disallow nogds in ds_gws_* instructions (PR #166438)

[Matt Arsenault via llvm-commits]

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@@ -5330,6 +5330,15 @@ bool AMDGPUAsmParser::validateDS(const MCInst &Inst,
 // DS_GWS opcodes must use even aligned registers.
 bool AMDGPUAsmParser::validateGWS(const MCInst &Inst,
                                   const OperandVector &Operands) {
+  // Disallow "nogds".
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arsenm wrote:

How did the "no" parse in the first place? 

https://github.com/llvm/llvm-project/pull/166438