[llvm] [PowerPC] Use the same lowering rule for vector rounding instructions (PR #166307)

[Lei Huang via llvm-commits]

================
@@ -1,4 +1,5 @@
 ; RUN: llc -verify-machineinstrs -mcpu=pwr6 -mattr=+altivec < %s | FileCheck %s
+; RUN: llc -verify-machineinstrs -mtriple=ppc64le-unknown-linux-gnu < %s | FileCheck %s --check-prefix=NO-VSX
----------------
lei137 wrote:

I think this check prefix is confusing.  The default here I believe is cpu=pwr7 which supports vsx.  So it's more clear if the check string is `CHECK-VSX`.  However  line 7 and 8 below hard coded datalayout and triple... not sure which will take precedence here... 

I think to update this tc it's best to put in a NFC patch to first update this test to:
1. put target triple into existing run line and remove lines 7 and 8 below.
2. generate the default checks via `update_llc_test_checks.py`

https://github.com/llvm/llvm-project/pull/166307