[llvm] [NFC][TableGen] Adopt CodeGenHelpers in SDNodeInfoEmitter (PR #165622)
Rahul Joshi via llvm-commits
llvm-commits at lists.llvm.org
Tue Nov 4 10:10:50 PST 2025
https://github.com/jurahul updated https://github.com/llvm/llvm-project/pull/165622
>From 9ab17e91d19dd7d96bb4e5bd782a1bb45d1c2524 Mon Sep 17 00:00:00 2001
From: Rahul Joshi <rjoshi at nvidia.com>
Date: Thu, 23 Oct 2025 15:29:52 -0700
Subject: [PATCH 1/2] [NFC][TableGen[ Adopt CodeGenHelpers in SDNodeInfoEmitter
---
.../TableGen/SDNodeInfoEmitter/advanced.td | 2 --
.../ambiguous-constraints-2.td | 2 --
.../TableGen/SDNodeInfoEmitter/namespace.td | 4 ----
.../TableGen/SDNodeInfoEmitter/no-nodes.td | 2 --
.../SDNodeInfoEmitter/trivial-node.td | 2 --
llvm/utils/TableGen/SDNodeInfoEmitter.cpp | 21 +++++++------------
6 files changed, 7 insertions(+), 26 deletions(-)
diff --git a/llvm/test/TableGen/SDNodeInfoEmitter/advanced.td b/llvm/test/TableGen/SDNodeInfoEmitter/advanced.td
index d7eeaba9d8552..db468603fd13e 100644
--- a/llvm/test/TableGen/SDNodeInfoEmitter/advanced.td
+++ b/llvm/test/TableGen/SDNodeInfoEmitter/advanced.td
@@ -47,7 +47,6 @@ def my_node_3 : SDNode<
>;
// CHECK: namespace llvm::MyTargetISD {
-// CHECK-EMPTY:
// CHECK-NEXT: enum GenNodeType : unsigned {
// CHECK-NEXT: NODE_1 = ISD::BUILTIN_OP_END,
// CHECK-NEXT: NODE_2,
@@ -55,7 +54,6 @@ def my_node_3 : SDNode<
// CHECK-NEXT: };
// CHECK-EMPTY:
// CHECK-NEXT: static constexpr unsigned GENERATED_OPCODE_END = NODE_3 + 1;
-// CHECK-EMPTY:
// CHECK-NEXT: } // namespace llvm::MyTargetISD
// CHECK: static constexpr char MyTargetSDNodeNamesStorage[] =
diff --git a/llvm/test/TableGen/SDNodeInfoEmitter/ambiguous-constraints-2.td b/llvm/test/TableGen/SDNodeInfoEmitter/ambiguous-constraints-2.td
index 29429e9baa300..3792a93b8397b 100644
--- a/llvm/test/TableGen/SDNodeInfoEmitter/ambiguous-constraints-2.td
+++ b/llvm/test/TableGen/SDNodeInfoEmitter/ambiguous-constraints-2.td
@@ -10,14 +10,12 @@ def my_node_2a : SDNode<"MyTargetISD::NODE_2", SDTypeProfile<1, 0, [SDTCisVT<0,
def my_node_2b : SDNode<"MyTargetISD::NODE_2", SDTypeProfile<1, 0, [SDTCisVT<0, untyped>]>>;
// CHECK: namespace llvm::MyTargetISD {
-// CHECK-EMPTY:
// CHECK-NEXT: enum GenNodeType : unsigned {
// CHECK-NEXT: NODE_1 = ISD::BUILTIN_OP_END,
// CHECK-NEXT: NODE_2,
// CHECK-NEXT: };
// CHECK-EMPTY:
// CHECK-NEXT: static constexpr unsigned GENERATED_OPCODE_END = NODE_2 + 1;
-// CHECK-EMPTY:
// CHECK-NEXT: } // namespace llvm::MyTargetISD
// CHECK: static constexpr char MyTargetSDNodeNamesStorage[] =
diff --git a/llvm/test/TableGen/SDNodeInfoEmitter/namespace.td b/llvm/test/TableGen/SDNodeInfoEmitter/namespace.td
index 217fb7c9fd475..553c6040d358b 100644
--- a/llvm/test/TableGen/SDNodeInfoEmitter/namespace.td
+++ b/llvm/test/TableGen/SDNodeInfoEmitter/namespace.td
@@ -14,9 +14,7 @@ def node_1 : SDNode<"MyTargetISD::NODE", SDTypeProfile<1, 0, [SDTCisVT<0, i1>]>>
def node_2 : SDNode<"MyCustomISD::NODE", SDTypeProfile<0, 1, [SDTCisVT<0, i2>]>>;
// EMPTY: namespace llvm::EmptyISD {
-// EMPTY-EMPTY:
// EMPTY-NEXT: static constexpr unsigned GENERATED_OPCODE_END = ISD::BUILTIN_OP_END;
-// EMPTY-EMPTY:
// EMPTY-NEXT: } // namespace llvm::EmptyISD
// EMPTY: static constexpr char MyTargetSDNodeNamesStorage[] =
@@ -35,13 +33,11 @@ def node_2 : SDNode<"MyCustomISD::NODE", SDTypeProfile<0, 1, [SDTCisVT<0, i2>]>>
// EMPTY-NEXT: MyTargetSDNodeNames, MyTargetSDTypeConstraints);
// COMMON: namespace llvm::[[NS]] {
-// COMMON-EMPTY:
// COMMON-NEXT: enum GenNodeType : unsigned {
// COMMON-NEXT: NODE = ISD::BUILTIN_OP_END,
// COMMON-NEXT: };
// COMMON-EMPTY:
// COMMON-NEXT: static constexpr unsigned GENERATED_OPCODE_END = NODE + 1;
-// COMMON-EMPTY:
// COMMON-NEXT: } // namespace llvm::[[NS]]
// COMMON: static constexpr char MyTargetSDNodeNamesStorage[] =
diff --git a/llvm/test/TableGen/SDNodeInfoEmitter/no-nodes.td b/llvm/test/TableGen/SDNodeInfoEmitter/no-nodes.td
index 0c5c63db4c95b..e9ef52ec4f690 100644
--- a/llvm/test/TableGen/SDNodeInfoEmitter/no-nodes.td
+++ b/llvm/test/TableGen/SDNodeInfoEmitter/no-nodes.td
@@ -8,9 +8,7 @@ def MyTarget : Target;
// CHECK-NEXT: #undef GET_SDNODE_ENUM
// CHECK-EMPTY:
// CHECK-NEXT: namespace llvm::MyTargetISD {
-// CHECK-EMPTY:
// CHECK-NEXT: static constexpr unsigned GENERATED_OPCODE_END = ISD::BUILTIN_OP_END;
-// CHECK-EMPTY:
// CHECK-NEXT: } // namespace llvm::MyTargetISD
// CHECK-EMPTY:
// CHECK-NEXT: #endif // GET_SDNODE_ENUM
diff --git a/llvm/test/TableGen/SDNodeInfoEmitter/trivial-node.td b/llvm/test/TableGen/SDNodeInfoEmitter/trivial-node.td
index 4bdc70a8508f6..496b4ee7e9c62 100644
--- a/llvm/test/TableGen/SDNodeInfoEmitter/trivial-node.td
+++ b/llvm/test/TableGen/SDNodeInfoEmitter/trivial-node.td
@@ -7,13 +7,11 @@ def MyTarget : Target;
def my_noop : SDNode<"MyTargetISD::NOOP", SDTypeProfile<0, 0, []>>;
// CHECK: namespace llvm::MyTargetISD {
-// CHECK-EMPTY:
// CHECK-NEXT: enum GenNodeType : unsigned {
// CHECK-NEXT: NOOP = ISD::BUILTIN_OP_END,
// CHECK-NEXT: };
// CHECK-EMPTY:
// CHECK-NEXT: static constexpr unsigned GENERATED_OPCODE_END = NOOP + 1;
-// CHECK-EMPTY:
// CHECK-NEXT: } // namespace llvm::MyTargetISD
// CHECK: static constexpr char MyTargetSDNodeNamesStorage[] =
diff --git a/llvm/utils/TableGen/SDNodeInfoEmitter.cpp b/llvm/utils/TableGen/SDNodeInfoEmitter.cpp
index 64f03dae83e7d..5d31b5acceb51 100644
--- a/llvm/utils/TableGen/SDNodeInfoEmitter.cpp
+++ b/llvm/utils/TableGen/SDNodeInfoEmitter.cpp
@@ -10,6 +10,7 @@
#include "Common/CodeGenDAGPatterns.h" // For SDNodeInfo.
#include "llvm/Support/CommandLine.h"
#include "llvm/Support/FormatVariadic.h"
+#include "llvm/TableGen/CodeGenHelpers.h"
#include "llvm/TableGen/Error.h"
#include "llvm/TableGen/StringToOffsetTable.h"
#include "llvm/TableGen/TableGenBackend.h"
@@ -129,9 +130,8 @@ SDNodeInfoEmitter::SDNodeInfoEmitter(const RecordKeeper &RK)
}
void SDNodeInfoEmitter::emitEnum(raw_ostream &OS) const {
- OS << "#ifdef GET_SDNODE_ENUM\n";
- OS << "#undef GET_SDNODE_ENUM\n\n";
- OS << "namespace llvm::" << TargetSDNodeNamespace << " {\n\n";
+ IfDefEmitter IfDef(OS, "GET_SDNODE_ENUM");
+ NamespaceEmitter NS(OS, "llvm::" + TargetSDNodeNamespace);
if (!NodesByName.empty()) {
StringRef FirstName = NodesByName.begin()->first;
@@ -145,14 +145,11 @@ void SDNodeInfoEmitter::emitEnum(raw_ostream &OS) const {
OS << "};\n\n";
OS << "static constexpr unsigned GENERATED_OPCODE_END = " << LastName
- << " + 1;\n\n";
+ << " + 1;\n";
} else {
OS << "static constexpr unsigned GENERATED_OPCODE_END = "
- "ISD::BUILTIN_OP_END;\n\n";
+ "ISD::BUILTIN_OP_END;\n";
}
-
- OS << "} // namespace llvm::" << TargetSDNodeNamespace << "\n\n";
- OS << "#endif // GET_SDNODE_ENUM\n\n";
}
std::vector<unsigned> SDNodeInfoEmitter::emitNodeNames(raw_ostream &OS) const {
@@ -324,9 +321,8 @@ static void emitDesc(raw_ostream &OS, StringRef EnumName,
void SDNodeInfoEmitter::emitDescs(raw_ostream &OS) const {
StringRef TargetName = Target.getName();
- OS << "#ifdef GET_SDNODE_DESC\n";
- OS << "#undef GET_SDNODE_DESC\n\n";
- OS << "namespace llvm {\n";
+ IfDefEmitter IfDef(OS, "GET_SDNODE_DESC");
+ NamespaceEmitter LlvmNs(OS, "llvm");
std::vector<unsigned> NameOffsets = emitNodeNames(OS);
std::vector<std::pair<unsigned, unsigned>> ConstraintOffsetsAndCounts =
@@ -345,9 +341,6 @@ void SDNodeInfoEmitter::emitDescs(raw_ostream &OS) const {
" /*NumOpcodes=*/{1}, {0}SDNodeDescs,\n"
" {0}SDNodeNames, {0}SDTypeConstraints);\n\n",
TargetName, NodesByName.size());
-
- OS << "} // namespace llvm\n\n";
- OS << "#endif // GET_SDNODE_DESC\n\n";
}
void SDNodeInfoEmitter::run(raw_ostream &OS) const {
>From d216e7746dd0f43017797d43ce4ce4893d521eaa Mon Sep 17 00:00:00 2001
From: Rahul Joshi <rjoshi at nvidia.com>
Date: Tue, 4 Nov 2025 10:10:19 -0800
Subject: [PATCH 2/2] Review feedback
---
llvm/test/TableGen/SDNodeInfoEmitter/advanced.td | 2 ++
.../TableGen/SDNodeInfoEmitter/ambiguous-constraints-2.td | 2 ++
llvm/test/TableGen/SDNodeInfoEmitter/namespace.td | 4 ++++
llvm/test/TableGen/SDNodeInfoEmitter/no-nodes.td | 3 +++
llvm/test/TableGen/SDNodeInfoEmitter/trivial-node.td | 2 ++
llvm/utils/TableGen/SDNodeInfoEmitter.cpp | 4 ++--
6 files changed, 15 insertions(+), 2 deletions(-)
diff --git a/llvm/test/TableGen/SDNodeInfoEmitter/advanced.td b/llvm/test/TableGen/SDNodeInfoEmitter/advanced.td
index db468603fd13e..d7eeaba9d8552 100644
--- a/llvm/test/TableGen/SDNodeInfoEmitter/advanced.td
+++ b/llvm/test/TableGen/SDNodeInfoEmitter/advanced.td
@@ -47,6 +47,7 @@ def my_node_3 : SDNode<
>;
// CHECK: namespace llvm::MyTargetISD {
+// CHECK-EMPTY:
// CHECK-NEXT: enum GenNodeType : unsigned {
// CHECK-NEXT: NODE_1 = ISD::BUILTIN_OP_END,
// CHECK-NEXT: NODE_2,
@@ -54,6 +55,7 @@ def my_node_3 : SDNode<
// CHECK-NEXT: };
// CHECK-EMPTY:
// CHECK-NEXT: static constexpr unsigned GENERATED_OPCODE_END = NODE_3 + 1;
+// CHECK-EMPTY:
// CHECK-NEXT: } // namespace llvm::MyTargetISD
// CHECK: static constexpr char MyTargetSDNodeNamesStorage[] =
diff --git a/llvm/test/TableGen/SDNodeInfoEmitter/ambiguous-constraints-2.td b/llvm/test/TableGen/SDNodeInfoEmitter/ambiguous-constraints-2.td
index 3792a93b8397b..29429e9baa300 100644
--- a/llvm/test/TableGen/SDNodeInfoEmitter/ambiguous-constraints-2.td
+++ b/llvm/test/TableGen/SDNodeInfoEmitter/ambiguous-constraints-2.td
@@ -10,12 +10,14 @@ def my_node_2a : SDNode<"MyTargetISD::NODE_2", SDTypeProfile<1, 0, [SDTCisVT<0,
def my_node_2b : SDNode<"MyTargetISD::NODE_2", SDTypeProfile<1, 0, [SDTCisVT<0, untyped>]>>;
// CHECK: namespace llvm::MyTargetISD {
+// CHECK-EMPTY:
// CHECK-NEXT: enum GenNodeType : unsigned {
// CHECK-NEXT: NODE_1 = ISD::BUILTIN_OP_END,
// CHECK-NEXT: NODE_2,
// CHECK-NEXT: };
// CHECK-EMPTY:
// CHECK-NEXT: static constexpr unsigned GENERATED_OPCODE_END = NODE_2 + 1;
+// CHECK-EMPTY:
// CHECK-NEXT: } // namespace llvm::MyTargetISD
// CHECK: static constexpr char MyTargetSDNodeNamesStorage[] =
diff --git a/llvm/test/TableGen/SDNodeInfoEmitter/namespace.td b/llvm/test/TableGen/SDNodeInfoEmitter/namespace.td
index 553c6040d358b..217fb7c9fd475 100644
--- a/llvm/test/TableGen/SDNodeInfoEmitter/namespace.td
+++ b/llvm/test/TableGen/SDNodeInfoEmitter/namespace.td
@@ -14,7 +14,9 @@ def node_1 : SDNode<"MyTargetISD::NODE", SDTypeProfile<1, 0, [SDTCisVT<0, i1>]>>
def node_2 : SDNode<"MyCustomISD::NODE", SDTypeProfile<0, 1, [SDTCisVT<0, i2>]>>;
// EMPTY: namespace llvm::EmptyISD {
+// EMPTY-EMPTY:
// EMPTY-NEXT: static constexpr unsigned GENERATED_OPCODE_END = ISD::BUILTIN_OP_END;
+// EMPTY-EMPTY:
// EMPTY-NEXT: } // namespace llvm::EmptyISD
// EMPTY: static constexpr char MyTargetSDNodeNamesStorage[] =
@@ -33,11 +35,13 @@ def node_2 : SDNode<"MyCustomISD::NODE", SDTypeProfile<0, 1, [SDTCisVT<0, i2>]>>
// EMPTY-NEXT: MyTargetSDNodeNames, MyTargetSDTypeConstraints);
// COMMON: namespace llvm::[[NS]] {
+// COMMON-EMPTY:
// COMMON-NEXT: enum GenNodeType : unsigned {
// COMMON-NEXT: NODE = ISD::BUILTIN_OP_END,
// COMMON-NEXT: };
// COMMON-EMPTY:
// COMMON-NEXT: static constexpr unsigned GENERATED_OPCODE_END = NODE + 1;
+// COMMON-EMPTY:
// COMMON-NEXT: } // namespace llvm::[[NS]]
// COMMON: static constexpr char MyTargetSDNodeNamesStorage[] =
diff --git a/llvm/test/TableGen/SDNodeInfoEmitter/no-nodes.td b/llvm/test/TableGen/SDNodeInfoEmitter/no-nodes.td
index e9ef52ec4f690..cc0f87755cdc2 100644
--- a/llvm/test/TableGen/SDNodeInfoEmitter/no-nodes.td
+++ b/llvm/test/TableGen/SDNodeInfoEmitter/no-nodes.td
@@ -8,7 +8,9 @@ def MyTarget : Target;
// CHECK-NEXT: #undef GET_SDNODE_ENUM
// CHECK-EMPTY:
// CHECK-NEXT: namespace llvm::MyTargetISD {
+// CHECK-EMPTY:
// CHECK-NEXT: static constexpr unsigned GENERATED_OPCODE_END = ISD::BUILTIN_OP_END;
+// CHECK-EMPTY:
// CHECK-NEXT: } // namespace llvm::MyTargetISD
// CHECK-EMPTY:
// CHECK-NEXT: #endif // GET_SDNODE_ENUM
@@ -18,6 +20,7 @@ def MyTarget : Target;
// CHECK-EMPTY:
// CHECK-NEXT: namespace llvm {
// CHECK-EMPTY:
+// CHECK-EMPTY:
// CHECK-NEXT: #ifdef __GNUC__
// CHECK-NEXT: #pragma GCC diagnostic push
// CHECK-NEXT: #pragma GCC diagnostic ignored "-Woverlength-strings"
diff --git a/llvm/test/TableGen/SDNodeInfoEmitter/trivial-node.td b/llvm/test/TableGen/SDNodeInfoEmitter/trivial-node.td
index 496b4ee7e9c62..4bdc70a8508f6 100644
--- a/llvm/test/TableGen/SDNodeInfoEmitter/trivial-node.td
+++ b/llvm/test/TableGen/SDNodeInfoEmitter/trivial-node.td
@@ -7,11 +7,13 @@ def MyTarget : Target;
def my_noop : SDNode<"MyTargetISD::NOOP", SDTypeProfile<0, 0, []>>;
// CHECK: namespace llvm::MyTargetISD {
+// CHECK-EMPTY:
// CHECK-NEXT: enum GenNodeType : unsigned {
// CHECK-NEXT: NOOP = ISD::BUILTIN_OP_END,
// CHECK-NEXT: };
// CHECK-EMPTY:
// CHECK-NEXT: static constexpr unsigned GENERATED_OPCODE_END = NOOP + 1;
+// CHECK-EMPTY:
// CHECK-NEXT: } // namespace llvm::MyTargetISD
// CHECK: static constexpr char MyTargetSDNodeNamesStorage[] =
diff --git a/llvm/utils/TableGen/SDNodeInfoEmitter.cpp b/llvm/utils/TableGen/SDNodeInfoEmitter.cpp
index 5d31b5acceb51..dd18d29e6c676 100644
--- a/llvm/utils/TableGen/SDNodeInfoEmitter.cpp
+++ b/llvm/utils/TableGen/SDNodeInfoEmitter.cpp
@@ -322,7 +322,7 @@ void SDNodeInfoEmitter::emitDescs(raw_ostream &OS) const {
StringRef TargetName = Target.getName();
IfDefEmitter IfDef(OS, "GET_SDNODE_DESC");
- NamespaceEmitter LlvmNs(OS, "llvm");
+ NamespaceEmitter NS(OS, "llvm");
std::vector<unsigned> NameOffsets = emitNodeNames(OS);
std::vector<std::pair<unsigned, unsigned>> ConstraintOffsetsAndCounts =
@@ -339,7 +339,7 @@ void SDNodeInfoEmitter::emitDescs(raw_ostream &OS) const {
OS << formatv("static const SDNodeInfo {0}GenSDNodeInfo(\n"
" /*NumOpcodes=*/{1}, {0}SDNodeDescs,\n"
- " {0}SDNodeNames, {0}SDTypeConstraints);\n\n",
+ " {0}SDNodeNames, {0}SDTypeConstraints);\n",
TargetName, NodesByName.size());
}
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