[llvm] 3170345 - [X86] Fix LEA compression on 64 bit (#166334)

[via llvm-commits]

Author: Tomer Shafir
Date: 2025-11-04T17:05:58+02:00
New Revision: 3170345e20b77a917a61d02119986a53cbe08486

URL: https://github.com/llvm/llvm-project/commit/3170345e20b77a917a61d02119986a53cbe08486
DIFF: https://github.com/llvm/llvm-project/commit/3170345e20b77a917a61d02119986a53cbe08486.diff

LOG: [X86] Fix LEA compression on 64 bit (#166334)

NDD ADD is only supported on 64 bit, but `LEA32` has
`Requires<[Not64BitMode]>`. The reason it doesnt fail upstream is that
the predicates check is commented out on `X86MCInstLower.cpp`:

```
  // FIXME: Enable feature predicate checks once all the test pass.
  // X86_MC::verifyInstructionPredicates(MI->getOpcode(),
  //                                     Subtarget->getFeatureBits());

```

Introduced by: https://github.com/llvm/llvm-project/pull/158254

Added: 
    

Modified: 
    llvm/lib/Target/X86/X86CompressEVEX.cpp

Removed: 
    


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diff  --git a/llvm/lib/Target/X86/X86CompressEVEX.cpp b/llvm/lib/Target/X86/X86CompressEVEX.cpp
index c0c7f5adf06ef..ddbd10d8f7eda 100644
--- a/llvm/lib/Target/X86/X86CompressEVEX.cpp
+++ b/llvm/lib/Target/X86/X86CompressEVEX.cpp
@@ -272,7 +272,7 @@ static bool CompressEVEXImpl(MachineInstr &MI, MachineBasicBlock &MBB,
       const MachineOperand &Src2 = MI.getOperand(2);
       bool Is32BitReg = Opc == X86::ADD32ri_ND || Opc == X86::ADD32rr_ND;
       const MCInstrDesc &NewDesc =
-          ST.getInstrInfo()->get(Is32BitReg ? X86::LEA32r : X86::LEA64r);
+          ST.getInstrInfo()->get(Is32BitReg ? X86::LEA64_32r : X86::LEA64r);
       if (Is32BitReg)
         Src1 = getX86SubSuperRegister(Src1, 64);
       MachineInstrBuilder MIB = BuildMI(MBB, MI, MI.getDebugLoc(), NewDesc, Dst)