[clang] [llvm] [RegisterCoalescer] Improve register allocation for return values by limiting rematerialization (PR #163047)

[Antonio Frighetto via llvm-commits]

https://github.com/antoniofrighetto commented:

I agree MachineCSE has not a chance to CSE anything really here. One may expect RegisterCoalescer to be able to merge vreg `%1` and `$x10` together during aggressive coalescing, thus ending up with something like:
```
bb.0.entry:
  %0:gpr = LUI target-flags(riscv-hi) @bytes1
  $x10   = ADDI $x0, 42
  SW  $x10, killed %0:gpr, target-flags(riscv-lo) @bytes1
  PseudoRET implicit killed $x10
```
Though I don't think this is taken into account in `joinReservedPhysReg` (and even so, `$x10` is not a reserved register). Considering that virtual register rewriter will remove the identity copy, I believe that preserving the copy here, and not recomputing the constant is the correct direction (maybe cc/ @qcolombet to confirm this).

https://github.com/llvm/llvm-project/pull/163047