[llvm] [AMDGPU] Improved Lowering of abs(i16) and -abs(i16) (PR #165626)

[Jay Foad via llvm-commits]

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@@ -8133,6 +8141,25 @@ SDValue SITargetLowering::lowerDEBUGTRAP(SDValue Op, SelectionDAG &DAG) const {
   return DAG.getNode(AMDGPUISD::TRAP, SL, MVT::Other, Ops);
 }
 
+// sign-extend and use the 32-bit ABS operation for 16-bit ABS with SGPRs
+SDValue SITargetLowering::lowerABSi16(SDValue Op, SelectionDAG &DAG) const {
+  assert(Op.getOpcode() == ISD::ABS &&
+         "Tried to select abs with non-abs opcode.");
+  assert(Op.getValueType() == MVT::i16 &&
+         "Tried to select abs i16 lowering with non-i16 type.");
+
+  // divergent means will not end up using SGPRs
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jayfoad wrote:

Nit: comments should generally be full sentences starting with a capital and ending with a period, here and elsewhere. See coding standards.

https://github.com/llvm/llvm-project/pull/165626