[llvm] [InstCombine] Baseline test exposing vector fp-to-int conversion becoming scalar (PR #165800)
via llvm-commits
llvm-commits at lists.llvm.org
Fri Oct 31 13:39:55 PDT 2025
https://github.com/azwolski updated https://github.com/llvm/llvm-project/pull/165800
>From a08608581ba5654f5281d1266a60dec980fe47d9 Mon Sep 17 00:00:00 2001
From: Antoni Zwolski <antoni.zwolski at intel.com>
Date: Fri, 31 Oct 2025 00:20:02 +0100
Subject: [PATCH 1/3] [InstCombine] Add test extracting element in a loop, and
move vec_extract_var_elt-inseltpoison.ll to vec_extract_var_elt.ll
---
.../vec_extract_var_elt-inseltpoison.ll | 26 -----
.../InstCombine/vec_extract_var_elt.ll | 99 +++++++++++++++++--
2 files changed, 92 insertions(+), 33 deletions(-)
delete mode 100644 llvm/test/Transforms/InstCombine/vec_extract_var_elt-inseltpoison.ll
diff --git a/llvm/test/Transforms/InstCombine/vec_extract_var_elt-inseltpoison.ll b/llvm/test/Transforms/InstCombine/vec_extract_var_elt-inseltpoison.ll
deleted file mode 100644
index 9fcac802378f6..0000000000000
--- a/llvm/test/Transforms/InstCombine/vec_extract_var_elt-inseltpoison.ll
+++ /dev/null
@@ -1,26 +0,0 @@
-; RUN: opt < %s -passes=instcombine -S | FileCheck %s
-
-define void @test (float %b, ptr %p) {
-; CHECK: extractelement
-; CHECK: fptosi
- %1 = load <8 x float> , ptr %p
- %2 = bitcast <8 x float> %1 to <8 x i32>
- %3 = bitcast <8 x i32> %2 to <8 x float>
- %a = fptosi <8 x float> %3 to <8 x i32>
- %4 = fptosi float %b to i32
- %5 = add i32 %4, -2
- %6 = extractelement <8 x i32> %a, i32 %5
- %7 = insertelement <8 x i32> poison, i32 %6, i32 7
- %8 = sitofp <8 x i32> %7 to <8 x float>
- store <8 x float> %8, ptr %p
- ret void
-}
-
-; PR18600
-define i32 @test2(i32 %i) {
- %e = extractelement <4 x i32> bitcast (<2 x i64> <i64 1, i64 2> to <4 x i32>), i32 %i
- ret i32 %e
-
-; CHECK-LABEL: @test2
-; CHECK: extractelement
-}
diff --git a/llvm/test/Transforms/InstCombine/vec_extract_var_elt.ll b/llvm/test/Transforms/InstCombine/vec_extract_var_elt.ll
index 32bf4da12c497..b648a88e251c6 100644
--- a/llvm/test/Transforms/InstCombine/vec_extract_var_elt.ll
+++ b/llvm/test/Transforms/InstCombine/vec_extract_var_elt.ll
@@ -1,8 +1,19 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 6
; RUN: opt < %s -passes=instcombine -S | FileCheck %s
-define void @test (float %b, ptr %p) {
-; CHECK: extractelement
-; CHECK: fptosi
+define void @test_undef (float %b, ptr %p) {
+; CHECK-LABEL: define void @test_undef(
+; CHECK-SAME: float [[B:%.*]], ptr [[P:%.*]]) {
+; CHECK-NEXT: [[TMP1:%.*]] = load <8 x float>, ptr [[P]], align 32
+; CHECK-NEXT: [[TMP2:%.*]] = fptosi float [[B]] to i32
+; CHECK-NEXT: [[TMP3:%.*]] = add i32 [[TMP2]], -2
+; CHECK-NEXT: [[TMP4:%.*]] = extractelement <8 x float> [[TMP1]], i32 [[TMP3]]
+; CHECK-NEXT: [[TMP5:%.*]] = fptosi float [[TMP4]] to i32
+; CHECK-NEXT: [[TMP6:%.*]] = insertelement <8 x i32> <i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 poison>, i32 [[TMP5]], i64 7
+; CHECK-NEXT: [[TMP7:%.*]] = sitofp <8 x i32> [[TMP6]] to <8 x float>
+; CHECK-NEXT: store <8 x float> [[TMP7]], ptr [[P]], align 32
+; CHECK-NEXT: ret void
+;
%1 = load <8 x float> , ptr %p
%2 = bitcast <8 x float> %1 to <8 x i32>
%3 = bitcast <8 x i32> %2 to <8 x float>
@@ -13,14 +24,88 @@ define void @test (float %b, ptr %p) {
%7 = insertelement <8 x i32> undef, i32 %6, i32 7
%8 = sitofp <8 x i32> %7 to <8 x float>
store <8 x float> %8, ptr %p
- ret void
+ ret void
+}
+
+define void @test_poison (float %b, ptr %p) {
+; CHECK-LABEL: define void @test_poison(
+; CHECK-SAME: float [[B:%.*]], ptr [[P:%.*]]) {
+; CHECK-NEXT: [[TMP1:%.*]] = load <8 x float>, ptr [[P]], align 32
+; CHECK-NEXT: [[TMP2:%.*]] = fptosi float [[B]] to i32
+; CHECK-NEXT: [[TMP3:%.*]] = add i32 [[TMP2]], -2
+; CHECK-NEXT: [[TMP4:%.*]] = extractelement <8 x float> [[TMP1]], i32 [[TMP3]]
+; CHECK-NEXT: [[TMP5:%.*]] = fptosi float [[TMP4]] to i32
+; CHECK-NEXT: [[TMP6:%.*]] = insertelement <8 x i32> poison, i32 [[TMP5]], i64 7
+; CHECK-NEXT: [[TMP7:%.*]] = sitofp <8 x i32> [[TMP6]] to <8 x float>
+; CHECK-NEXT: store <8 x float> [[TMP7]], ptr [[P]], align 32
+; CHECK-NEXT: ret void
+;
+ %1 = load <8 x float> , ptr %p
+ %2 = bitcast <8 x float> %1 to <8 x i32>
+ %3 = bitcast <8 x i32> %2 to <8 x float>
+ %a = fptosi <8 x float> %3 to <8 x i32>
+ %4 = fptosi float %b to i32
+ %5 = add i32 %4, -2
+ %6 = extractelement <8 x i32> %a, i32 %5
+ %7 = insertelement <8 x i32> poison, i32 %6, i32 7
+ %8 = sitofp <8 x i32> %7 to <8 x float>
+ store <8 x float> %8, ptr %p
+ ret void
}
; PR18600
-define i32 @test2(i32 %i) {
+define i32 @test_bitcast(i32 %i) {
+; CHECK-LABEL: define i32 @test_bitcast(
+; CHECK-SAME: i32 [[I:%.*]]) {
+; CHECK-NEXT: [[E:%.*]] = extractelement <4 x i32> <i32 1, i32 0, i32 2, i32 0>, i32 [[I]]
+; CHECK-NEXT: ret i32 [[E]]
+;
%e = extractelement <4 x i32> bitcast (<2 x i64> <i64 1, i64 2> to <4 x i32>), i32 %i
ret i32 %e
+}
+
+declare void @use(i32)
+
+define void @test_loop(<4 x float> %in) {
+; CHECK-LABEL: define void @test_loop(
+; CHECK-SAME: <4 x float> [[IN:%.*]]) {
+; CHECK-NEXT: [[ENTRY:.*]]:
+; CHECK-NEXT: [[R:%.*]] = call <4 x float> @llvm.x86.sse41.round.ps(<4 x float> [[IN]], i32 9)
+; CHECK-NEXT: br label %[[LOOP:.*]]
+; CHECK: [[LOOP]]:
+; CHECK-NEXT: [[I:%.*]] = phi i32 [ 0, %[[ENTRY]] ], [ [[NEXT:%.*]], %[[LATCH:.*]] ]
+; CHECK-NEXT: [[COND:%.*]] = icmp samesign ult i32 [[I]], 4
+; CHECK-NEXT: br i1 [[COND]], label %[[BODY:.*]], label %[[DONE:.*]]
+; CHECK: [[BODY]]:
+; CHECK-NEXT: [[TMP0:%.*]] = extractelement <4 x float> [[R]], i32 [[I]]
+; CHECK-NEXT: [[ELEM:%.*]] = fptosi float [[TMP0]] to i32
+; CHECK-NEXT: call void @use(i32 [[ELEM]])
+; CHECK-NEXT: br label %[[LATCH]]
+; CHECK: [[LATCH]]:
+; CHECK-NEXT: [[NEXT]] = add nuw nsw i32 [[I]], 1
+; CHECK-NEXT: br label %[[LOOP]]
+; CHECK: [[DONE]]:
+; CHECK-NEXT: ret void
+;
+entry:
+ %r = call <4 x float> @llvm.x86.sse41.round.ps(<4 x float> %in, i32 9)
+ %vi = fptosi <4 x float> %r to <4 x i32>
+ br label %loop
+
+loop:
+ %i = phi i32 [ 0, %entry ], [ %next, %latch ]
+ %cond = icmp ult i32 %i, 4
+ br i1 %cond, label %body, label %done
+
+body:
+ %elem = extractelement <4 x i32> %vi, i32 %i
+ call void @use(i32 %elem)
+ br label %latch
+
+latch:
+ %next = add i32 %i, 1
+ br label %loop
-; CHECK-LABEL: @test2
-; CHECK: extractelement
+done:
+ ret void
}
>From e0f2941c49dce65f39228ba95bee525c31c5b260 Mon Sep 17 00:00:00 2001
From: Antoni Zwolski <antoni.zwolski at intel.com>
Date: Fri, 31 Oct 2025 00:54:27 +0100
Subject: [PATCH 2/3] [InstCombine] Fix formatting in vec_extract_var_elt.ll
---
.../test/Transforms/InstCombine/vec_extract_var_elt.ll | 10 +++++-----
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/llvm/test/Transforms/InstCombine/vec_extract_var_elt.ll b/llvm/test/Transforms/InstCombine/vec_extract_var_elt.ll
index b648a88e251c6..b7f9c8a111a6d 100644
--- a/llvm/test/Transforms/InstCombine/vec_extract_var_elt.ll
+++ b/llvm/test/Transforms/InstCombine/vec_extract_var_elt.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 6
; RUN: opt < %s -passes=instcombine -S | FileCheck %s
-define void @test_undef (float %b, ptr %p) {
+define void @test_undef(float %b, ptr %p) {
; CHECK-LABEL: define void @test_undef(
; CHECK-SAME: float [[B:%.*]], ptr [[P:%.*]]) {
; CHECK-NEXT: [[TMP1:%.*]] = load <8 x float>, ptr [[P]], align 32
@@ -14,7 +14,7 @@ define void @test_undef (float %b, ptr %p) {
; CHECK-NEXT: store <8 x float> [[TMP7]], ptr [[P]], align 32
; CHECK-NEXT: ret void
;
- %1 = load <8 x float> , ptr %p
+ %1 = load <8 x float>, ptr %p
%2 = bitcast <8 x float> %1 to <8 x i32>
%3 = bitcast <8 x i32> %2 to <8 x float>
%a = fptosi <8 x float> %3 to <8 x i32>
@@ -27,7 +27,7 @@ define void @test_undef (float %b, ptr %p) {
ret void
}
-define void @test_poison (float %b, ptr %p) {
+define void @test_poison(float %b, ptr %p) {
; CHECK-LABEL: define void @test_poison(
; CHECK-SAME: float [[B:%.*]], ptr [[P:%.*]]) {
; CHECK-NEXT: [[TMP1:%.*]] = load <8 x float>, ptr [[P]], align 32
@@ -40,7 +40,7 @@ define void @test_poison (float %b, ptr %p) {
; CHECK-NEXT: store <8 x float> [[TMP7]], ptr [[P]], align 32
; CHECK-NEXT: ret void
;
- %1 = load <8 x float> , ptr %p
+ %1 = load <8 x float>, ptr %p
%2 = bitcast <8 x float> %1 to <8 x i32>
%3 = bitcast <8 x i32> %2 to <8 x float>
%a = fptosi <8 x float> %3 to <8 x i32>
@@ -88,7 +88,7 @@ define void @test_loop(<4 x float> %in) {
; CHECK-NEXT: ret void
;
entry:
- %r = call <4 x float> @llvm.x86.sse41.round.ps(<4 x float> %in, i32 9)
+ %r = call <4 x float> @llvm.x86.sse41.round.ps(<4 x float> %in, i32 9)
%vi = fptosi <4 x float> %r to <4 x i32>
br label %loop
>From d32b95c46cf2f42a68c3c0b1d9d9b7363ca9bf1b Mon Sep 17 00:00:00 2001
From: Antoni Zwolski <antoni.zwolski at intel.com>
Date: Fri, 31 Oct 2025 21:39:37 +0100
Subject: [PATCH 3/3] [InstCombine] Remove deperecated test with undef from
vec_extract_var_elt.ll
---
.../InstCombine/vec_extract_var_elt.ll | 30 -------------------
1 file changed, 30 deletions(-)
diff --git a/llvm/test/Transforms/InstCombine/vec_extract_var_elt.ll b/llvm/test/Transforms/InstCombine/vec_extract_var_elt.ll
index b7f9c8a111a6d..205b4b88c473a 100644
--- a/llvm/test/Transforms/InstCombine/vec_extract_var_elt.ll
+++ b/llvm/test/Transforms/InstCombine/vec_extract_var_elt.ll
@@ -1,32 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 6
; RUN: opt < %s -passes=instcombine -S | FileCheck %s
-define void @test_undef(float %b, ptr %p) {
-; CHECK-LABEL: define void @test_undef(
-; CHECK-SAME: float [[B:%.*]], ptr [[P:%.*]]) {
-; CHECK-NEXT: [[TMP1:%.*]] = load <8 x float>, ptr [[P]], align 32
-; CHECK-NEXT: [[TMP2:%.*]] = fptosi float [[B]] to i32
-; CHECK-NEXT: [[TMP3:%.*]] = add i32 [[TMP2]], -2
-; CHECK-NEXT: [[TMP4:%.*]] = extractelement <8 x float> [[TMP1]], i32 [[TMP3]]
-; CHECK-NEXT: [[TMP5:%.*]] = fptosi float [[TMP4]] to i32
-; CHECK-NEXT: [[TMP6:%.*]] = insertelement <8 x i32> <i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 poison>, i32 [[TMP5]], i64 7
-; CHECK-NEXT: [[TMP7:%.*]] = sitofp <8 x i32> [[TMP6]] to <8 x float>
-; CHECK-NEXT: store <8 x float> [[TMP7]], ptr [[P]], align 32
-; CHECK-NEXT: ret void
-;
- %1 = load <8 x float>, ptr %p
- %2 = bitcast <8 x float> %1 to <8 x i32>
- %3 = bitcast <8 x i32> %2 to <8 x float>
- %a = fptosi <8 x float> %3 to <8 x i32>
- %4 = fptosi float %b to i32
- %5 = add i32 %4, -2
- %6 = extractelement <8 x i32> %a, i32 %5
- %7 = insertelement <8 x i32> undef, i32 %6, i32 7
- %8 = sitofp <8 x i32> %7 to <8 x float>
- store <8 x float> %8, ptr %p
- ret void
-}
-
define void @test_poison(float %b, ptr %p) {
; CHECK-LABEL: define void @test_poison(
; CHECK-SAME: float [[B:%.*]], ptr [[P:%.*]]) {
@@ -91,21 +65,17 @@ entry:
%r = call <4 x float> @llvm.x86.sse41.round.ps(<4 x float> %in, i32 9)
%vi = fptosi <4 x float> %r to <4 x i32>
br label %loop
-
loop:
%i = phi i32 [ 0, %entry ], [ %next, %latch ]
%cond = icmp ult i32 %i, 4
br i1 %cond, label %body, label %done
-
body:
%elem = extractelement <4 x i32> %vi, i32 %i
call void @use(i32 %elem)
br label %latch
-
latch:
%next = add i32 %i, 1
br label %loop
-
done:
ret void
}
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