[llvm] [X86][GlobalIsel] Reland G_ISFPCLASS (PR #165848)
via llvm-commits
llvm-commits at lists.llvm.org
Fri Oct 31 02:30:46 PDT 2025
https://github.com/mahesh-attarde updated https://github.com/llvm/llvm-project/pull/165848
>From daa40d0e09550919598aa8e0af0eb29fd01051bb Mon Sep 17 00:00:00 2001
From: mattarde <mattarde at intel.com>
Date: Fri, 31 Oct 2025 02:20:12 -0700
Subject: [PATCH 1/2] [X86][GlobalIsel] Reland G_ISFPCLASS
---
.../CodeGen/GlobalISel/InstructionSelect.cpp | 10 +
.../lib/Target/X86/GISel/X86LegalizerInfo.cpp | 2 +
llvm/test/CodeGen/X86/isel-fpclass.ll | 461 +++++++++++-------
3 files changed, 310 insertions(+), 163 deletions(-)
diff --git a/llvm/lib/CodeGen/GlobalISel/InstructionSelect.cpp b/llvm/lib/CodeGen/GlobalISel/InstructionSelect.cpp
index 2dd22c8a7e8ba..5a499a92d75ac 100644
--- a/llvm/lib/CodeGen/GlobalISel/InstructionSelect.cpp
+++ b/llvm/lib/CodeGen/GlobalISel/InstructionSelect.cpp
@@ -238,6 +238,7 @@ bool InstructionSelect::selectMachineFunction(MachineFunction &MF) {
continue;
}
// Try to find redundant copies b/w vregs of the same register class.
+ // Try to constrain the register class of the copy operand.
for (auto MII = MBB.rbegin(), End = MBB.rend(); MII != End;) {
MachineInstr &MI = *MII;
++MII;
@@ -254,6 +255,15 @@ bool InstructionSelect::selectMachineFunction(MachineFunction &MF) {
MI.eraseFromParent();
}
}
+ auto CopyOpd = MI.getOperand(1);
+ if (CopyOpd.getSubReg() != 0) {
+ auto VReg = CopyOpd.getReg();
+ const TargetRegisterInfo &TRI = *MF.getSubtarget().getRegisterInfo();
+ const TargetRegisterClass *RC = TRI.getSubClassWithSubReg(
+ MRI.getRegClass(VReg), CopyOpd.getSubReg());
+ MRI.constrainRegClass(
+ VReg, RC); // 3rd Arg MinRCSize in DAG is 4, we used 0 here.
+ }
}
}
diff --git a/llvm/lib/Target/X86/GISel/X86LegalizerInfo.cpp b/llvm/lib/Target/X86/GISel/X86LegalizerInfo.cpp
index e792b1bce3c5c..32b81e36a5126 100644
--- a/llvm/lib/Target/X86/GISel/X86LegalizerInfo.cpp
+++ b/llvm/lib/Target/X86/GISel/X86LegalizerInfo.cpp
@@ -590,6 +590,8 @@ X86LegalizerInfo::X86LegalizerInfo(const X86Subtarget &STI,
.lower();
// fp intrinsics
+ getActionDefinitionsBuilder(G_IS_FPCLASS).lower();
+
getActionDefinitionsBuilder({G_INTRINSIC_ROUNDEVEN, G_INTRINSIC_TRUNC})
.scalarize(0)
.minScalar(0, LLT::scalar(32))
diff --git a/llvm/test/CodeGen/X86/isel-fpclass.ll b/llvm/test/CodeGen/X86/isel-fpclass.ll
index df04b673d8223..c7c54a74f5f87 100644
--- a/llvm/test/CodeGen/X86/isel-fpclass.ll
+++ b/llvm/test/CodeGen/X86/isel-fpclass.ll
@@ -1,11 +1,10 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
-; RUN: llc < %s -mtriple=i686-linux | FileCheck %s -check-prefixes=X86
+; RUN: llc < %s -mtriple=i686-linux | FileCheck %s -check-prefixes=X86,X86-SDAGISEL
; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s -check-prefixes=X64,X64-SDAGISEL
; RUN: llc < %s -mtriple=i686-linux -fast-isel -fast-isel-abort=1 | FileCheck %s -check-prefixes=X86-FASTISEL
; RUN: llc < %s -mtriple=x86_64-linux -fast-isel -fast-isel-abort=1 | FileCheck %s -check-prefixes=X64,X64-FASTISEL
-; RUN: llc < %s -mtriple=i686-linux -global-isel -global-isel-abort=2 | FileCheck %s -check-prefixes=X86
-; RUN: llc < %s -mtriple=x86_64-linux -global-isel -global-isel-abort=2 | FileCheck %s -check-prefixes=X64,X64-GISEL
-
+; RUN: llc < %s -mtriple=i686-linux -global-isel -global-isel-abort=1 | FileCheck %s -check-prefixes=X86,X86-GISEL
+; RUN: llc < %s -mtriple=x86_64-linux -global-isel -global-isel-abort=1 | FileCheck %s -check-prefixes=X64-GISEL
define i1 @isnone_f(float %x) nounwind {
; X86-LABEL: isnone_f:
; X86: # %bb.0: # %entry
@@ -51,27 +50,16 @@ entry:
}
define i1 @issignaling_f(float %x) nounwind {
-; X86-LABEL: issignaling_f:
-; X86: # %bb.0:
-; X86-NEXT: movl $2147483647, %eax # imm = 0x7FFFFFFF
-; X86-NEXT: andl {{[0-9]+}}(%esp), %eax
-; X86-NEXT: cmpl $2143289344, %eax # imm = 0x7FC00000
-; X86-NEXT: setl %cl
-; X86-NEXT: cmpl $2139095041, %eax # imm = 0x7F800001
-; X86-NEXT: setge %al
-; X86-NEXT: andb %cl, %al
-; X86-NEXT: retl
-;
-; X64-LABEL: issignaling_f:
-; X64: # %bb.0:
-; X64-NEXT: movd %xmm0, %eax
-; X64-NEXT: andl $2147483647, %eax # imm = 0x7FFFFFFF
-; X64-NEXT: cmpl $2143289344, %eax # imm = 0x7FC00000
-; X64-NEXT: setl %cl
-; X64-NEXT: cmpl $2139095041, %eax # imm = 0x7F800001
-; X64-NEXT: setge %al
-; X64-NEXT: andb %cl, %al
-; X64-NEXT: retq
+; X64-SDAGISEL-LABEL: issignaling_f:
+; X64-SDAGISEL: # %bb.0:
+; X64-SDAGISEL-NEXT: movd %xmm0, %eax
+; X64-SDAGISEL-NEXT: andl $2147483647, %eax # imm = 0x7FFFFFFF
+; X64-SDAGISEL-NEXT: cmpl $2143289344, %eax # imm = 0x7FC00000
+; X64-SDAGISEL-NEXT: setl %cl
+; X64-SDAGISEL-NEXT: cmpl $2139095041, %eax # imm = 0x7F800001
+; X64-SDAGISEL-NEXT: setge %al
+; X64-SDAGISEL-NEXT: andb %cl, %al
+; X64-SDAGISEL-NEXT: retq
;
; X86-FASTISEL-LABEL: issignaling_f:
; X86-FASTISEL: # %bb.0:
@@ -87,26 +75,42 @@ define i1 @issignaling_f(float %x) nounwind {
; X86-FASTISEL-NEXT: andb %cl, %al
; X86-FASTISEL-NEXT: popl %ecx
; X86-FASTISEL-NEXT: retl
+;
+; X64-FASTISEL-LABEL: issignaling_f:
+; X64-FASTISEL: # %bb.0:
+; X64-FASTISEL-NEXT: movd %xmm0, %eax
+; X64-FASTISEL-NEXT: andl $2147483647, %eax # imm = 0x7FFFFFFF
+; X64-FASTISEL-NEXT: cmpl $2143289344, %eax # imm = 0x7FC00000
+; X64-FASTISEL-NEXT: setl %cl
+; X64-FASTISEL-NEXT: cmpl $2139095041, %eax # imm = 0x7F800001
+; X64-FASTISEL-NEXT: setge %al
+; X64-FASTISEL-NEXT: andb %cl, %al
+; X64-FASTISEL-NEXT: retq
+;
+; X64-GISEL-LABEL: issignaling_f:
+; X64-GISEL: # %bb.0:
+; X64-GISEL-NEXT: movd %xmm0, %eax
+; X64-GISEL-NEXT: andl $2147483647, %eax # imm = 0x7FFFFFFF
+; X64-GISEL-NEXT: xorl %ecx, %ecx
+; X64-GISEL-NEXT: cmpl $2139095040, %eax # imm = 0x7F800000
+; X64-GISEL-NEXT: seta %dl
+; X64-GISEL-NEXT: cmpl $2143289344, %eax # imm = 0x7FC00000
+; X64-GISEL-NEXT: setb %al
+; X64-GISEL-NEXT: andb %dl, %al
+; X64-GISEL-NEXT: orb %cl, %al
+; X64-GISEL-NEXT: retq
%a0 = tail call i1 @llvm.is.fpclass.f32(float %x, i32 1) ; "snan"
ret i1 %a0
}
define i1 @isquiet_f(float %x) nounwind {
-; X86-LABEL: isquiet_f:
-; X86: # %bb.0: # %entry
-; X86-NEXT: movl $2147483647, %eax # imm = 0x7FFFFFFF
-; X86-NEXT: andl {{[0-9]+}}(%esp), %eax
-; X86-NEXT: cmpl $2143289344, %eax # imm = 0x7FC00000
-; X86-NEXT: setge %al
-; X86-NEXT: retl
-;
-; X64-LABEL: isquiet_f:
-; X64: # %bb.0: # %entry
-; X64-NEXT: movd %xmm0, %eax
-; X64-NEXT: andl $2147483647, %eax # imm = 0x7FFFFFFF
-; X64-NEXT: cmpl $2143289344, %eax # imm = 0x7FC00000
-; X64-NEXT: setge %al
-; X64-NEXT: retq
+; X64-SDAGISEL-LABEL: isquiet_f:
+; X64-SDAGISEL: # %bb.0: # %entry
+; X64-SDAGISEL-NEXT: movd %xmm0, %eax
+; X64-SDAGISEL-NEXT: andl $2147483647, %eax # imm = 0x7FFFFFFF
+; X64-SDAGISEL-NEXT: cmpl $2143289344, %eax # imm = 0x7FC00000
+; X64-SDAGISEL-NEXT: setge %al
+; X64-SDAGISEL-NEXT: retq
;
; X86-FASTISEL-LABEL: isquiet_f:
; X86-FASTISEL: # %bb.0: # %entry
@@ -119,27 +123,37 @@ define i1 @issignaling_f(float %x) nounwind {
; X86-FASTISEL-NEXT: setge %al
; X86-FASTISEL-NEXT: popl %ecx
; X86-FASTISEL-NEXT: retl
+;
+; X64-FASTISEL-LABEL: isquiet_f:
+; X64-FASTISEL: # %bb.0: # %entry
+; X64-FASTISEL-NEXT: movd %xmm0, %eax
+; X64-FASTISEL-NEXT: andl $2147483647, %eax # imm = 0x7FFFFFFF
+; X64-FASTISEL-NEXT: cmpl $2143289344, %eax # imm = 0x7FC00000
+; X64-FASTISEL-NEXT: setge %al
+; X64-FASTISEL-NEXT: retq
+;
+; X64-GISEL-LABEL: isquiet_f:
+; X64-GISEL: # %bb.0: # %entry
+; X64-GISEL-NEXT: movd %xmm0, %eax
+; X64-GISEL-NEXT: andl $2147483647, %eax # imm = 0x7FFFFFFF
+; X64-GISEL-NEXT: xorl %ecx, %ecx
+; X64-GISEL-NEXT: cmpl $2143289344, %eax # imm = 0x7FC00000
+; X64-GISEL-NEXT: setae %al
+; X64-GISEL-NEXT: orb %cl, %al
+; X64-GISEL-NEXT: retq
entry:
%0 = tail call i1 @llvm.is.fpclass.f32(float %x, i32 2) ; "qnan"
ret i1 %0
}
define i1 @not_isquiet_f(float %x) nounwind {
-; X86-LABEL: not_isquiet_f:
-; X86: # %bb.0: # %entry
-; X86-NEXT: movl $2147483647, %eax # imm = 0x7FFFFFFF
-; X86-NEXT: andl {{[0-9]+}}(%esp), %eax
-; X86-NEXT: cmpl $2143289344, %eax # imm = 0x7FC00000
-; X86-NEXT: setl %al
-; X86-NEXT: retl
-;
-; X64-LABEL: not_isquiet_f:
-; X64: # %bb.0: # %entry
-; X64-NEXT: movd %xmm0, %eax
-; X64-NEXT: andl $2147483647, %eax # imm = 0x7FFFFFFF
-; X64-NEXT: cmpl $2143289344, %eax # imm = 0x7FC00000
-; X64-NEXT: setl %al
-; X64-NEXT: retq
+; X64-SDAGISEL-LABEL: not_isquiet_f:
+; X64-SDAGISEL: # %bb.0: # %entry
+; X64-SDAGISEL-NEXT: movd %xmm0, %eax
+; X64-SDAGISEL-NEXT: andl $2147483647, %eax # imm = 0x7FFFFFFF
+; X64-SDAGISEL-NEXT: cmpl $2143289344, %eax # imm = 0x7FC00000
+; X64-SDAGISEL-NEXT: setl %al
+; X64-SDAGISEL-NEXT: retq
;
; X86-FASTISEL-LABEL: not_isquiet_f:
; X86-FASTISEL: # %bb.0: # %entry
@@ -152,27 +166,46 @@ define i1 @not_isquiet_f(float %x) nounwind {
; X86-FASTISEL-NEXT: setl %al
; X86-FASTISEL-NEXT: popl %ecx
; X86-FASTISEL-NEXT: retl
+;
+; X64-FASTISEL-LABEL: not_isquiet_f:
+; X64-FASTISEL: # %bb.0: # %entry
+; X64-FASTISEL-NEXT: movd %xmm0, %eax
+; X64-FASTISEL-NEXT: andl $2147483647, %eax # imm = 0x7FFFFFFF
+; X64-FASTISEL-NEXT: cmpl $2143289344, %eax # imm = 0x7FC00000
+; X64-FASTISEL-NEXT: setl %al
+; X64-FASTISEL-NEXT: retq
+;
+; X64-GISEL-LABEL: not_isquiet_f:
+; X64-GISEL: # %bb.0: # %entry
+; X64-GISEL-NEXT: movd %xmm0, %eax
+; X64-GISEL-NEXT: andl $2147483647, %eax # imm = 0x7FFFFFFF
+; X64-GISEL-NEXT: xorl %ecx, %ecx
+; X64-GISEL-NEXT: cmpl $2139095040, %eax # imm = 0x7F800000
+; X64-GISEL-NEXT: setb %dl
+; X64-GISEL-NEXT: orb %cl, %dl
+; X64-GISEL-NEXT: cmpl $2139095040, %eax # imm = 0x7F800000
+; X64-GISEL-NEXT: sete %cl
+; X64-GISEL-NEXT: orb %dl, %cl
+; X64-GISEL-NEXT: cmpl $2139095040, %eax # imm = 0x7F800000
+; X64-GISEL-NEXT: seta %dl
+; X64-GISEL-NEXT: cmpl $2143289344, %eax # imm = 0x7FC00000
+; X64-GISEL-NEXT: setb %al
+; X64-GISEL-NEXT: andb %dl, %al
+; X64-GISEL-NEXT: orb %cl, %al
+; X64-GISEL-NEXT: retq
entry:
%0 = tail call i1 @llvm.is.fpclass.f32(float %x, i32 1021) ; ~"qnan"
ret i1 %0
}
define i1 @isinf_f(float %x) nounwind {
-; X86-LABEL: isinf_f:
-; X86: # %bb.0: # %entry
-; X86-NEXT: movl $2147483647, %eax # imm = 0x7FFFFFFF
-; X86-NEXT: andl {{[0-9]+}}(%esp), %eax
-; X86-NEXT: cmpl $2139095040, %eax # imm = 0x7F800000
-; X86-NEXT: sete %al
-; X86-NEXT: retl
-;
-; X64-LABEL: isinf_f:
-; X64: # %bb.0: # %entry
-; X64-NEXT: movd %xmm0, %eax
-; X64-NEXT: andl $2147483647, %eax # imm = 0x7FFFFFFF
-; X64-NEXT: cmpl $2139095040, %eax # imm = 0x7F800000
-; X64-NEXT: sete %al
-; X64-NEXT: retq
+; X64-SDAGISEL-LABEL: isinf_f:
+; X64-SDAGISEL: # %bb.0: # %entry
+; X64-SDAGISEL-NEXT: movd %xmm0, %eax
+; X64-SDAGISEL-NEXT: andl $2147483647, %eax # imm = 0x7FFFFFFF
+; X64-SDAGISEL-NEXT: cmpl $2139095040, %eax # imm = 0x7F800000
+; X64-SDAGISEL-NEXT: sete %al
+; X64-SDAGISEL-NEXT: retq
;
; X86-FASTISEL-LABEL: isinf_f:
; X86-FASTISEL: # %bb.0: # %entry
@@ -185,27 +218,37 @@ define i1 @isinf_f(float %x) nounwind {
; X86-FASTISEL-NEXT: sete %al
; X86-FASTISEL-NEXT: popl %ecx
; X86-FASTISEL-NEXT: retl
+;
+; X64-FASTISEL-LABEL: isinf_f:
+; X64-FASTISEL: # %bb.0: # %entry
+; X64-FASTISEL-NEXT: movd %xmm0, %eax
+; X64-FASTISEL-NEXT: andl $2147483647, %eax # imm = 0x7FFFFFFF
+; X64-FASTISEL-NEXT: cmpl $2139095040, %eax # imm = 0x7F800000
+; X64-FASTISEL-NEXT: sete %al
+; X64-FASTISEL-NEXT: retq
+;
+; X64-GISEL-LABEL: isinf_f:
+; X64-GISEL: # %bb.0: # %entry
+; X64-GISEL-NEXT: movd %xmm0, %eax
+; X64-GISEL-NEXT: andl $2147483647, %eax # imm = 0x7FFFFFFF
+; X64-GISEL-NEXT: xorl %ecx, %ecx
+; X64-GISEL-NEXT: cmpl $2139095040, %eax # imm = 0x7F800000
+; X64-GISEL-NEXT: sete %al
+; X64-GISEL-NEXT: orb %cl, %al
+; X64-GISEL-NEXT: retq
entry:
%0 = tail call i1 @llvm.is.fpclass.f32(float %x, i32 516) ; 0x204 = "inf"
ret i1 %0
}
define i1 @not_isinf_f(float %x) nounwind {
-; X86-LABEL: not_isinf_f:
-; X86: # %bb.0: # %entry
-; X86-NEXT: movl $2147483647, %eax # imm = 0x7FFFFFFF
-; X86-NEXT: andl {{[0-9]+}}(%esp), %eax
-; X86-NEXT: cmpl $2139095040, %eax # imm = 0x7F800000
-; X86-NEXT: setne %al
-; X86-NEXT: retl
-;
-; X64-LABEL: not_isinf_f:
-; X64: # %bb.0: # %entry
-; X64-NEXT: movd %xmm0, %eax
-; X64-NEXT: andl $2147483647, %eax # imm = 0x7FFFFFFF
-; X64-NEXT: cmpl $2139095040, %eax # imm = 0x7F800000
-; X64-NEXT: setne %al
-; X64-NEXT: retq
+; X64-SDAGISEL-LABEL: not_isinf_f:
+; X64-SDAGISEL: # %bb.0: # %entry
+; X64-SDAGISEL-NEXT: movd %xmm0, %eax
+; X64-SDAGISEL-NEXT: andl $2147483647, %eax # imm = 0x7FFFFFFF
+; X64-SDAGISEL-NEXT: cmpl $2139095040, %eax # imm = 0x7F800000
+; X64-SDAGISEL-NEXT: setne %al
+; X64-SDAGISEL-NEXT: retq
;
; X86-FASTISEL-LABEL: not_isinf_f:
; X86-FASTISEL: # %bb.0: # %entry
@@ -218,24 +261,39 @@ define i1 @not_isinf_f(float %x) nounwind {
; X86-FASTISEL-NEXT: setne %al
; X86-FASTISEL-NEXT: popl %ecx
; X86-FASTISEL-NEXT: retl
+;
+; X64-FASTISEL-LABEL: not_isinf_f:
+; X64-FASTISEL: # %bb.0: # %entry
+; X64-FASTISEL-NEXT: movd %xmm0, %eax
+; X64-FASTISEL-NEXT: andl $2147483647, %eax # imm = 0x7FFFFFFF
+; X64-FASTISEL-NEXT: cmpl $2139095040, %eax # imm = 0x7F800000
+; X64-FASTISEL-NEXT: setne %al
+; X64-FASTISEL-NEXT: retq
+;
+; X64-GISEL-LABEL: not_isinf_f:
+; X64-GISEL: # %bb.0: # %entry
+; X64-GISEL-NEXT: movd %xmm0, %eax
+; X64-GISEL-NEXT: andl $2147483647, %eax # imm = 0x7FFFFFFF
+; X64-GISEL-NEXT: xorl %ecx, %ecx
+; X64-GISEL-NEXT: cmpl $2139095040, %eax # imm = 0x7F800000
+; X64-GISEL-NEXT: setb %dl
+; X64-GISEL-NEXT: orb %cl, %dl
+; X64-GISEL-NEXT: cmpl $2139095040, %eax # imm = 0x7F800000
+; X64-GISEL-NEXT: seta %al
+; X64-GISEL-NEXT: orb %dl, %al
+; X64-GISEL-NEXT: retq
entry:
%0 = tail call i1 @llvm.is.fpclass.f32(float %x, i32 507) ; ~0x204 = "~inf"
ret i1 %0
}
define i1 @is_plus_inf_f(float %x) nounwind {
-; X86-LABEL: is_plus_inf_f:
-; X86: # %bb.0: # %entry
-; X86-NEXT: cmpl $2139095040, {{[0-9]+}}(%esp) # imm = 0x7F800000
-; X86-NEXT: sete %al
-; X86-NEXT: retl
-;
-; X64-LABEL: is_plus_inf_f:
-; X64: # %bb.0: # %entry
-; X64-NEXT: movd %xmm0, %eax
-; X64-NEXT: cmpl $2139095040, %eax # imm = 0x7F800000
-; X64-NEXT: sete %al
-; X64-NEXT: retq
+; X64-SDAGISEL-LABEL: is_plus_inf_f:
+; X64-SDAGISEL: # %bb.0: # %entry
+; X64-SDAGISEL-NEXT: movd %xmm0, %eax
+; X64-SDAGISEL-NEXT: cmpl $2139095040, %eax # imm = 0x7F800000
+; X64-SDAGISEL-NEXT: sete %al
+; X64-SDAGISEL-NEXT: retq
;
; X86-FASTISEL-LABEL: is_plus_inf_f:
; X86-FASTISEL: # %bb.0: # %entry
@@ -246,24 +304,34 @@ define i1 @is_plus_inf_f(float %x) nounwind {
; X86-FASTISEL-NEXT: sete %al
; X86-FASTISEL-NEXT: popl %ecx
; X86-FASTISEL-NEXT: retl
+;
+; X64-FASTISEL-LABEL: is_plus_inf_f:
+; X64-FASTISEL: # %bb.0: # %entry
+; X64-FASTISEL-NEXT: movd %xmm0, %eax
+; X64-FASTISEL-NEXT: cmpl $2139095040, %eax # imm = 0x7F800000
+; X64-FASTISEL-NEXT: sete %al
+; X64-FASTISEL-NEXT: retq
+;
+; X64-GISEL-LABEL: is_plus_inf_f:
+; X64-GISEL: # %bb.0: # %entry
+; X64-GISEL-NEXT: xorl %ecx, %ecx
+; X64-GISEL-NEXT: movd %xmm0, %eax
+; X64-GISEL-NEXT: cmpl $2139095040, %eax # imm = 0x7F800000
+; X64-GISEL-NEXT: sete %al
+; X64-GISEL-NEXT: orb %cl, %al
+; X64-GISEL-NEXT: retq
entry:
%0 = tail call i1 @llvm.is.fpclass.f32(float %x, i32 512) ; 0x200 = "+inf"
ret i1 %0
}
define i1 @is_minus_inf_f(float %x) nounwind {
-; X86-LABEL: is_minus_inf_f:
-; X86: # %bb.0: # %entry
-; X86-NEXT: cmpl $-8388608, {{[0-9]+}}(%esp) # imm = 0xFF800000
-; X86-NEXT: sete %al
-; X86-NEXT: retl
-;
-; X64-LABEL: is_minus_inf_f:
-; X64: # %bb.0: # %entry
-; X64-NEXT: movd %xmm0, %eax
-; X64-NEXT: cmpl $-8388608, %eax # imm = 0xFF800000
-; X64-NEXT: sete %al
-; X64-NEXT: retq
+; X64-SDAGISEL-LABEL: is_minus_inf_f:
+; X64-SDAGISEL: # %bb.0: # %entry
+; X64-SDAGISEL-NEXT: movd %xmm0, %eax
+; X64-SDAGISEL-NEXT: cmpl $-8388608, %eax # imm = 0xFF800000
+; X64-SDAGISEL-NEXT: sete %al
+; X64-SDAGISEL-NEXT: retq
;
; X86-FASTISEL-LABEL: is_minus_inf_f:
; X86-FASTISEL: # %bb.0: # %entry
@@ -274,24 +342,34 @@ define i1 @is_minus_inf_f(float %x) nounwind {
; X86-FASTISEL-NEXT: sete %al
; X86-FASTISEL-NEXT: popl %ecx
; X86-FASTISEL-NEXT: retl
+;
+; X64-FASTISEL-LABEL: is_minus_inf_f:
+; X64-FASTISEL: # %bb.0: # %entry
+; X64-FASTISEL-NEXT: movd %xmm0, %eax
+; X64-FASTISEL-NEXT: cmpl $-8388608, %eax # imm = 0xFF800000
+; X64-FASTISEL-NEXT: sete %al
+; X64-FASTISEL-NEXT: retq
+;
+; X64-GISEL-LABEL: is_minus_inf_f:
+; X64-GISEL: # %bb.0: # %entry
+; X64-GISEL-NEXT: xorl %ecx, %ecx
+; X64-GISEL-NEXT: movd %xmm0, %eax
+; X64-GISEL-NEXT: cmpl $-8388608, %eax # imm = 0xFF800000
+; X64-GISEL-NEXT: sete %al
+; X64-GISEL-NEXT: orb %cl, %al
+; X64-GISEL-NEXT: retq
entry:
%0 = tail call i1 @llvm.is.fpclass.f32(float %x, i32 4) ; "-inf"
ret i1 %0
}
define i1 @not_is_minus_inf_f(float %x) nounwind {
-; X86-LABEL: not_is_minus_inf_f:
-; X86: # %bb.0: # %entry
-; X86-NEXT: cmpl $-8388608, {{[0-9]+}}(%esp) # imm = 0xFF800000
-; X86-NEXT: setne %al
-; X86-NEXT: retl
-;
-; X64-LABEL: not_is_minus_inf_f:
-; X64: # %bb.0: # %entry
-; X64-NEXT: movd %xmm0, %eax
-; X64-NEXT: cmpl $-8388608, %eax # imm = 0xFF800000
-; X64-NEXT: setne %al
-; X64-NEXT: retq
+; X64-SDAGISEL-LABEL: not_is_minus_inf_f:
+; X64-SDAGISEL: # %bb.0: # %entry
+; X64-SDAGISEL-NEXT: movd %xmm0, %eax
+; X64-SDAGISEL-NEXT: cmpl $-8388608, %eax # imm = 0xFF800000
+; X64-SDAGISEL-NEXT: setne %al
+; X64-SDAGISEL-NEXT: retq
;
; X86-FASTISEL-LABEL: not_is_minus_inf_f:
; X86-FASTISEL: # %bb.0: # %entry
@@ -302,27 +380,43 @@ define i1 @not_is_minus_inf_f(float %x) nounwind {
; X86-FASTISEL-NEXT: setne %al
; X86-FASTISEL-NEXT: popl %ecx
; X86-FASTISEL-NEXT: retl
+;
+; X64-FASTISEL-LABEL: not_is_minus_inf_f:
+; X64-FASTISEL: # %bb.0: # %entry
+; X64-FASTISEL-NEXT: movd %xmm0, %eax
+; X64-FASTISEL-NEXT: cmpl $-8388608, %eax # imm = 0xFF800000
+; X64-FASTISEL-NEXT: setne %al
+; X64-FASTISEL-NEXT: retq
+;
+; X64-GISEL-LABEL: not_is_minus_inf_f:
+; X64-GISEL: # %bb.0: # %entry
+; X64-GISEL-NEXT: movd %xmm0, %eax
+; X64-GISEL-NEXT: movl %eax, %ecx
+; X64-GISEL-NEXT: andl $2147483647, %ecx # imm = 0x7FFFFFFF
+; X64-GISEL-NEXT: xorl %edx, %edx
+; X64-GISEL-NEXT: cmpl $2139095040, %ecx # imm = 0x7F800000
+; X64-GISEL-NEXT: setb %sil
+; X64-GISEL-NEXT: orb %dl, %sil
+; X64-GISEL-NEXT: cmpl $2139095040, %eax # imm = 0x7F800000
+; X64-GISEL-NEXT: sete %dl
+; X64-GISEL-NEXT: cmpl $2139095040, %ecx # imm = 0x7F800000
+; X64-GISEL-NEXT: seta %al
+; X64-GISEL-NEXT: orb %dl, %al
+; X64-GISEL-NEXT: orb %sil, %al
+; X64-GISEL-NEXT: retq
entry:
%0 = tail call i1 @llvm.is.fpclass.f32(float %x, i32 1019) ; ~"-inf"
ret i1 %0
}
define i1 @isfinite_f(float %x) nounwind {
-; X86-LABEL: isfinite_f:
-; X86: # %bb.0: # %entry
-; X86-NEXT: movl $2147483647, %eax # imm = 0x7FFFFFFF
-; X86-NEXT: andl {{[0-9]+}}(%esp), %eax
-; X86-NEXT: cmpl $2139095040, %eax # imm = 0x7F800000
-; X86-NEXT: setl %al
-; X86-NEXT: retl
-;
-; X64-LABEL: isfinite_f:
-; X64: # %bb.0: # %entry
-; X64-NEXT: movd %xmm0, %eax
-; X64-NEXT: andl $2147483647, %eax # imm = 0x7FFFFFFF
-; X64-NEXT: cmpl $2139095040, %eax # imm = 0x7F800000
-; X64-NEXT: setl %al
-; X64-NEXT: retq
+; X64-SDAGISEL-LABEL: isfinite_f:
+; X64-SDAGISEL: # %bb.0: # %entry
+; X64-SDAGISEL-NEXT: movd %xmm0, %eax
+; X64-SDAGISEL-NEXT: andl $2147483647, %eax # imm = 0x7FFFFFFF
+; X64-SDAGISEL-NEXT: cmpl $2139095040, %eax # imm = 0x7F800000
+; X64-SDAGISEL-NEXT: setl %al
+; X64-SDAGISEL-NEXT: retq
;
; X86-FASTISEL-LABEL: isfinite_f:
; X86-FASTISEL: # %bb.0: # %entry
@@ -335,27 +429,37 @@ define i1 @isfinite_f(float %x) nounwind {
; X86-FASTISEL-NEXT: setl %al
; X86-FASTISEL-NEXT: popl %ecx
; X86-FASTISEL-NEXT: retl
+;
+; X64-FASTISEL-LABEL: isfinite_f:
+; X64-FASTISEL: # %bb.0: # %entry
+; X64-FASTISEL-NEXT: movd %xmm0, %eax
+; X64-FASTISEL-NEXT: andl $2147483647, %eax # imm = 0x7FFFFFFF
+; X64-FASTISEL-NEXT: cmpl $2139095040, %eax # imm = 0x7F800000
+; X64-FASTISEL-NEXT: setl %al
+; X64-FASTISEL-NEXT: retq
+;
+; X64-GISEL-LABEL: isfinite_f:
+; X64-GISEL: # %bb.0: # %entry
+; X64-GISEL-NEXT: movd %xmm0, %eax
+; X64-GISEL-NEXT: andl $2147483647, %eax # imm = 0x7FFFFFFF
+; X64-GISEL-NEXT: xorl %ecx, %ecx
+; X64-GISEL-NEXT: cmpl $2139095040, %eax # imm = 0x7F800000
+; X64-GISEL-NEXT: setb %al
+; X64-GISEL-NEXT: orb %cl, %al
+; X64-GISEL-NEXT: retq
entry:
%0 = tail call i1 @llvm.is.fpclass.f32(float %x, i32 504) ; 0x1f8 = "finite"
ret i1 %0
}
define i1 @not_isfinite_f(float %x) nounwind {
-; X86-LABEL: not_isfinite_f:
-; X86: # %bb.0: # %entry
-; X86-NEXT: movl $2147483647, %eax # imm = 0x7FFFFFFF
-; X86-NEXT: andl {{[0-9]+}}(%esp), %eax
-; X86-NEXT: cmpl $2139095040, %eax # imm = 0x7F800000
-; X86-NEXT: setge %al
-; X86-NEXT: retl
-;
-; X64-LABEL: not_isfinite_f:
-; X64: # %bb.0: # %entry
-; X64-NEXT: movd %xmm0, %eax
-; X64-NEXT: andl $2147483647, %eax # imm = 0x7FFFFFFF
-; X64-NEXT: cmpl $2139095040, %eax # imm = 0x7F800000
-; X64-NEXT: setge %al
-; X64-NEXT: retq
+; X64-SDAGISEL-LABEL: not_isfinite_f:
+; X64-SDAGISEL: # %bb.0: # %entry
+; X64-SDAGISEL-NEXT: movd %xmm0, %eax
+; X64-SDAGISEL-NEXT: andl $2147483647, %eax # imm = 0x7FFFFFFF
+; X64-SDAGISEL-NEXT: cmpl $2139095040, %eax # imm = 0x7F800000
+; X64-SDAGISEL-NEXT: setge %al
+; X64-SDAGISEL-NEXT: retq
;
; X86-FASTISEL-LABEL: not_isfinite_f:
; X86-FASTISEL: # %bb.0: # %entry
@@ -368,24 +472,39 @@ define i1 @not_isfinite_f(float %x) nounwind {
; X86-FASTISEL-NEXT: setge %al
; X86-FASTISEL-NEXT: popl %ecx
; X86-FASTISEL-NEXT: retl
+;
+; X64-FASTISEL-LABEL: not_isfinite_f:
+; X64-FASTISEL: # %bb.0: # %entry
+; X64-FASTISEL-NEXT: movd %xmm0, %eax
+; X64-FASTISEL-NEXT: andl $2147483647, %eax # imm = 0x7FFFFFFF
+; X64-FASTISEL-NEXT: cmpl $2139095040, %eax # imm = 0x7F800000
+; X64-FASTISEL-NEXT: setge %al
+; X64-FASTISEL-NEXT: retq
+;
+; X64-GISEL-LABEL: not_isfinite_f:
+; X64-GISEL: # %bb.0: # %entry
+; X64-GISEL-NEXT: movd %xmm0, %eax
+; X64-GISEL-NEXT: andl $2147483647, %eax # imm = 0x7FFFFFFF
+; X64-GISEL-NEXT: xorl %ecx, %ecx
+; X64-GISEL-NEXT: cmpl $2139095040, %eax # imm = 0x7F800000
+; X64-GISEL-NEXT: sete %dl
+; X64-GISEL-NEXT: orb %cl, %dl
+; X64-GISEL-NEXT: cmpl $2139095040, %eax # imm = 0x7F800000
+; X64-GISEL-NEXT: seta %al
+; X64-GISEL-NEXT: orb %dl, %al
+; X64-GISEL-NEXT: retq
entry:
%0 = tail call i1 @llvm.is.fpclass.f32(float %x, i32 519) ; ~0x1f8 = "~finite"
ret i1 %0
}
define i1 @is_plus_finite_f(float %x) nounwind {
-; X86-LABEL: is_plus_finite_f:
-; X86: # %bb.0: # %entry
-; X86-NEXT: cmpl $2139095040, {{[0-9]+}}(%esp) # imm = 0x7F800000
-; X86-NEXT: setb %al
-; X86-NEXT: retl
-;
-; X64-LABEL: is_plus_finite_f:
-; X64: # %bb.0: # %entry
-; X64-NEXT: movd %xmm0, %eax
-; X64-NEXT: cmpl $2139095040, %eax # imm = 0x7F800000
-; X64-NEXT: setb %al
-; X64-NEXT: retq
+; X64-SDAGISEL-LABEL: is_plus_finite_f:
+; X64-SDAGISEL: # %bb.0: # %entry
+; X64-SDAGISEL-NEXT: movd %xmm0, %eax
+; X64-SDAGISEL-NEXT: cmpl $2139095040, %eax # imm = 0x7F800000
+; X64-SDAGISEL-NEXT: setb %al
+; X64-SDAGISEL-NEXT: retq
;
; X86-FASTISEL-LABEL: is_plus_finite_f:
; X86-FASTISEL: # %bb.0: # %entry
@@ -396,6 +515,22 @@ define i1 @is_plus_finite_f(float %x) nounwind {
; X86-FASTISEL-NEXT: setb %al
; X86-FASTISEL-NEXT: popl %ecx
; X86-FASTISEL-NEXT: retl
+;
+; X64-FASTISEL-LABEL: is_plus_finite_f:
+; X64-FASTISEL: # %bb.0: # %entry
+; X64-FASTISEL-NEXT: movd %xmm0, %eax
+; X64-FASTISEL-NEXT: cmpl $2139095040, %eax # imm = 0x7F800000
+; X64-FASTISEL-NEXT: setb %al
+; X64-FASTISEL-NEXT: retq
+;
+; X64-GISEL-LABEL: is_plus_finite_f:
+; X64-GISEL: # %bb.0: # %entry
+; X64-GISEL-NEXT: xorl %ecx, %ecx
+; X64-GISEL-NEXT: movd %xmm0, %eax
+; X64-GISEL-NEXT: cmpl $2139095040, %eax # imm = 0x7F800000
+; X64-GISEL-NEXT: setb %al
+; X64-GISEL-NEXT: orb %cl, %al
+; X64-GISEL-NEXT: retq
entry:
%0 = tail call i1 @llvm.is.fpclass.f32(float %x, i32 448) ; 0x1c0 = "+finite"
ret i1 %0
>From 13f54782ee11a58909fc687df2138004ba66faa3 Mon Sep 17 00:00:00 2001
From: mattarde <mattarde at intel.com>
Date: Fri, 31 Oct 2025 02:30:30 -0700
Subject: [PATCH 2/2] undo clangformat
---
llvm/lib/CodeGen/GlobalISel/InstructionSelect.cpp | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/llvm/lib/CodeGen/GlobalISel/InstructionSelect.cpp b/llvm/lib/CodeGen/GlobalISel/InstructionSelect.cpp
index 5a499a92d75ac..ac6d5653e13cf 100644
--- a/llvm/lib/CodeGen/GlobalISel/InstructionSelect.cpp
+++ b/llvm/lib/CodeGen/GlobalISel/InstructionSelect.cpp
@@ -261,8 +261,7 @@ bool InstructionSelect::selectMachineFunction(MachineFunction &MF) {
const TargetRegisterInfo &TRI = *MF.getSubtarget().getRegisterInfo();
const TargetRegisterClass *RC = TRI.getSubClassWithSubReg(
MRI.getRegClass(VReg), CopyOpd.getSubReg());
- MRI.constrainRegClass(
- VReg, RC); // 3rd Arg MinRCSize in DAG is 4, we used 0 here.
+ MRI.constrainRegClass(VReg, RC);
}
}
}
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