[llvm] AMDGPU: Preliminary documentation for named barriers (PR #165502)

[Pierre van Houtryve via llvm-commits]

Nicolai =?utf-8?q?Hähnle?= <nicolai.haehnle at amd.com>,
Nicolai =?utf-8?q?Hähnle?= <nicolai.haehnle at amd.com>
Message-ID:
In-Reply-To: <llvm.org/llvm/llvm-project/pull/165502 at github.com>


================
@@ -6621,6 +6668,138 @@ Multiple tags can be used at the same time to synchronize with more than one add
   better code optimization, at the cost of synchronizing additional address
   spaces.
 
+.. _amdgpu-memory-model-barriers:
+
+Hardware Barriers
----------------
Pierre-vh wrote:

I thought about this a bit more and I think it'd be better to not land this section. I'm looking at the barrier execution & memory model right now and it's just going to be confusing if this lands only to be removed short term.
What do you think? I think this patch is fine if it just documents the LDS GV. It doesn't need to extend into a barrier memory model.

Curious to hear what other reviewers think too, if others prefer if this lands even if it's reverted later, then it's also fine for me.

https://github.com/llvm/llvm-project/pull/165502