[llvm] [AArch64][CostModel] Consider i32 --> i64 partial reduce cost as Invalid for FixedLength vectors (PR #165226)

[Sushant Gokhale via llvm-commits]

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@@ -5757,8 +5757,15 @@ InstructionCost AArch64TTIImpl::getPartialReductionCost(
       return Cost;
   }
 
+  if (!ST->useSVEForFixedLengthVectors() &&
+      (AccumLT.second.isFixedLengthVector() && ST->isNeonAvailable() &&
+       ST->hasDotProd()) &&
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sushgokh wrote:

> to only handle this case if the i32->i64 dot product instructions are available (added by SVE2p1 or SME2)

Will add test cases for SVE2p1 or SME2 in some other PR


>this should not just return Invalid for fixed-length vectors?

I am not sure if returning `Invalid` as the last resort(as you have shown below) would always work because:
1. There would `mul` followed by `add`. So, this is atleast 6 cycles(add dependency on mul) as against 5 of SMLAL[BT] 
2. Hopefully that doesn't cause regression on a core like Neoverse-V1 with 256 bit SVE


https://github.com/llvm/llvm-project/pull/165226