[llvm] [AMDGPU] Add pattern to select scalar ops for fshr with uniform operands (PR #165295)

[Jay Foad via llvm-commits]

jayfoad wrote:

I think this patch is _probably_ OK as-is but there are things that could be improved:

- Better handling of the common case where the shift amount is constant, as mentioned.
- It's probably better to expand to s_lshr_b64 instead of two shifts and an OR. The pattern would be something like `(EXTRACT_SUBREG (S_LSHR_B64 (REG_SEQUENCE ...), (S_AND_B32 $src2, 31)), sub0)`. If the shift amount is constant you would not need the S_AND_B32.
- If SIFixSGPRCopies decides to call moveToVALU on this sequence then it will not turn back into v_alignbit. I don't know if it's worth worrying about that.

https://github.com/llvm/llvm-project/pull/165295