[llvm] da15b8f - [AArch64][GlobalISel] Add a constant funnel shift post-legalizer combine. (#151912)
via llvm-commits
llvm-commits at lists.llvm.org
Wed Oct 29 00:47:45 PDT 2025
Author: David Green
Date: 2025-10-29T07:47:41Z
New Revision: da15b8fc2e169788a965b08c8a7cc870072d71f3
URL: https://github.com/llvm/llvm-project/commit/da15b8fc2e169788a965b08c8a7cc870072d71f3
DIFF: https://github.com/llvm/llvm-project/commit/da15b8fc2e169788a965b08c8a7cc870072d71f3.diff
LOG: [AArch64][GlobalISel] Add a constant funnel shift post-legalizer combine. (#151912)
We want to be able to produce extr instructions post-legalization. They
are legal for scalars, acting as a funnel shift with a constant shift
amount. Unfortunately I'm not sure if there is a way currently to
represent that in the legalization rules, but it might be useful for
several operations - to be able to treat and test operands with constant
operands as legal or not.
This adds a change to the existing matchOrShiftToFunnelShift so that
AArch64 can generate such instructions post-legalization providing that
the operation is scalar and the shift amount is constant.
Added:
Modified:
llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h
llvm/include/llvm/Target/GlobalISel/Combine.td
llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
llvm/lib/Target/AArch64/AArch64Combine.td
llvm/test/CodeGen/AArch64/GlobalISel/split-wide-shifts-multiway.ll
llvm/test/CodeGen/AArch64/adc.ll
llvm/test/CodeGen/AArch64/fsh.ll
llvm/test/CodeGen/AArch64/funnel-shift.ll
llvm/test/CodeGen/AArch64/rem-by-const.ll
Removed:
################################################################################
diff --git a/llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h b/llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h
index b0601eb72ba3f..36cb90b1bc134 100644
--- a/llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h
+++ b/llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h
@@ -640,7 +640,8 @@ class CombinerHelper {
/// This variant does not erase \p MI after calling the build function.
void applyBuildFnNoErase(MachineInstr &MI, BuildFnTy &MatchInfo) const;
- bool matchOrShiftToFunnelShift(MachineInstr &MI, BuildFnTy &MatchInfo) const;
+ bool matchOrShiftToFunnelShift(MachineInstr &MI, bool AllowScalarConstants,
+ BuildFnTy &MatchInfo) const;
bool matchFunnelShiftToRotate(MachineInstr &MI) const;
void applyFunnelShiftToRotate(MachineInstr &MI) const;
bool matchRotateOutOfRange(MachineInstr &MI) const;
diff --git a/llvm/include/llvm/Target/GlobalISel/Combine.td b/llvm/include/llvm/Target/GlobalISel/Combine.td
index 47d5d68174b38..119695e53c3cb 100644
--- a/llvm/include/llvm/Target/GlobalISel/Combine.td
+++ b/llvm/include/llvm/Target/GlobalISel/Combine.td
@@ -1013,10 +1013,18 @@ def extract_vec_elt_combines : GICombineGroup<[
def funnel_shift_from_or_shift : GICombineRule<
(defs root:$root, build_fn_matchinfo:$info),
(match (wip_match_opcode G_OR):$root,
- [{ return Helper.matchOrShiftToFunnelShift(*${root}, ${info}); }]),
+ [{ return Helper.matchOrShiftToFunnelShift(*${root}, false, ${info}); }]),
(apply [{ Helper.applyBuildFn(*${root}, ${info}); }])
>;
+def funnel_shift_from_or_shift_constants_are_legal : GICombineRule<
+ (defs root:$root, build_fn_matchinfo:$info),
+ (match (wip_match_opcode G_OR):$root,
+ [{ return Helper.matchOrShiftToFunnelShift(*${root}, true, ${info}); }]),
+ (apply [{ Helper.applyBuildFn(*${root}, ${info}); }])
+>;
+
+
def funnel_shift_to_rotate : GICombineRule<
(defs root:$root),
(match (wip_match_opcode G_FSHL, G_FSHR):$root,
diff --git a/llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp b/llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
index 1f104784a97ec..9ace7d65413ad 100644
--- a/llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
+++ b/llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
@@ -4425,6 +4425,7 @@ void CombinerHelper::applyBuildFnNoErase(
}
bool CombinerHelper::matchOrShiftToFunnelShift(MachineInstr &MI,
+ bool AllowScalarConstants,
BuildFnTy &MatchInfo) const {
assert(MI.getOpcode() == TargetOpcode::G_OR);
@@ -4444,31 +4445,29 @@ bool CombinerHelper::matchOrShiftToFunnelShift(MachineInstr &MI,
// Given constants C0 and C1 such that C0 + C1 is bit-width:
// (or (shl x, C0), (lshr y, C1)) -> (fshl x, y, C0) or (fshr x, y, C1)
- int64_t CstShlAmt, CstLShrAmt;
+ int64_t CstShlAmt = 0, CstLShrAmt;
if (mi_match(ShlAmt, MRI, m_ICstOrSplat(CstShlAmt)) &&
mi_match(LShrAmt, MRI, m_ICstOrSplat(CstLShrAmt)) &&
CstShlAmt + CstLShrAmt == BitWidth) {
FshOpc = TargetOpcode::G_FSHR;
Amt = LShrAmt;
-
} else if (mi_match(LShrAmt, MRI,
m_GSub(m_SpecificICstOrSplat(BitWidth), m_Reg(Amt))) &&
ShlAmt == Amt) {
// (or (shl x, amt), (lshr y, (sub bw, amt))) -> (fshl x, y, amt)
FshOpc = TargetOpcode::G_FSHL;
-
} else if (mi_match(ShlAmt, MRI,
m_GSub(m_SpecificICstOrSplat(BitWidth), m_Reg(Amt))) &&
LShrAmt == Amt) {
// (or (shl x, (sub bw, amt)), (lshr y, amt)) -> (fshr x, y, amt)
FshOpc = TargetOpcode::G_FSHR;
-
} else {
return false;
}
LLT AmtTy = MRI.getType(Amt);
- if (!isLegalOrBeforeLegalizer({FshOpc, {Ty, AmtTy}}))
+ if (!isLegalOrBeforeLegalizer({FshOpc, {Ty, AmtTy}}) &&
+ (!AllowScalarConstants || CstShlAmt == 0 || !Ty.isScalar()))
return false;
MatchInfo = [=](MachineIRBuilder &B) {
diff --git a/llvm/lib/Target/AArch64/AArch64Combine.td b/llvm/lib/Target/AArch64/AArch64Combine.td
index b3ec65cab51fa..278314792bfb9 100644
--- a/llvm/lib/Target/AArch64/AArch64Combine.td
+++ b/llvm/lib/Target/AArch64/AArch64Combine.td
@@ -366,6 +366,7 @@ def AArch64PostLegalizerCombiner
select_to_minmax, or_to_bsp, combine_concat_vector,
commute_constant_to_rhs, extract_vec_elt_combines,
push_freeze_to_prevent_poison_from_propagating,
- combine_mul_cmlt, combine_use_vector_truncate,
- extmultomull, truncsat_combines, lshr_of_trunc_of_lshr]> {
+ combine_mul_cmlt, combine_use_vector_truncate,
+ extmultomull, truncsat_combines, lshr_of_trunc_of_lshr,
+ funnel_shift_from_or_shift_constants_are_legal]> {
}
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/split-wide-shifts-multiway.ll b/llvm/test/CodeGen/AArch64/GlobalISel/split-wide-shifts-multiway.ll
index 41f7ab89094ad..480fcbd6a9788 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/split-wide-shifts-multiway.ll
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/split-wide-shifts-multiway.ll
@@ -4992,28 +4992,21 @@ define void @test_shl_i512_const_32(ptr %result, ptr %input) {
; GISEL-LABEL: test_shl_i512_const_32:
; GISEL: ; %bb.0: ; %entry
; GISEL-NEXT: ldp x8, x9, [x1]
-; GISEL-NEXT: ldp x11, x12, [x1, #16]
-; GISEL-NEXT: ldp x14, x15, [x1, #32]
-; GISEL-NEXT: lsr x10, x8, #32
-; GISEL-NEXT: lsr x13, x9, #32
-; GISEL-NEXT: lsl x8, x8, #32
-; GISEL-NEXT: orr x9, x10, x9, lsl #32
-; GISEL-NEXT: lsr x10, x11, #32
-; GISEL-NEXT: orr x11, x13, x11, lsl #32
-; GISEL-NEXT: ldp x13, x16, [x1, #48]
-; GISEL-NEXT: stp x8, x9, [x0]
-; GISEL-NEXT: lsr x8, x12, #32
-; GISEL-NEXT: orr x10, x10, x12, lsl #32
-; GISEL-NEXT: lsr x12, x14, #32
-; GISEL-NEXT: lsr x9, x15, #32
-; GISEL-NEXT: orr x8, x8, x14, lsl #32
-; GISEL-NEXT: stp x11, x10, [x0, #16]
-; GISEL-NEXT: orr x11, x12, x15, lsl #32
-; GISEL-NEXT: lsr x12, x13, #32
-; GISEL-NEXT: orr x9, x9, x13, lsl #32
-; GISEL-NEXT: stp x8, x11, [x0, #32]
-; GISEL-NEXT: orr x8, x12, x16, lsl #32
-; GISEL-NEXT: stp x9, x8, [x0, #48]
+; GISEL-NEXT: ldp x10, x11, [x1, #16]
+; GISEL-NEXT: ldp x13, x14, [x1, #32]
+; GISEL-NEXT: lsl x12, x8, #32
+; GISEL-NEXT: extr x8, x9, x8, #32
+; GISEL-NEXT: extr x9, x10, x9, #32
+; GISEL-NEXT: extr x10, x11, x10, #32
+; GISEL-NEXT: ldp x15, x16, [x1, #48]
+; GISEL-NEXT: stp x12, x8, [x0]
+; GISEL-NEXT: extr x8, x13, x11, #32
+; GISEL-NEXT: stp x9, x10, [x0, #16]
+; GISEL-NEXT: extr x9, x14, x13, #32
+; GISEL-NEXT: extr x10, x15, x14, #32
+; GISEL-NEXT: stp x8, x9, [x0, #32]
+; GISEL-NEXT: extr x8, x16, x15, #32
+; GISEL-NEXT: stp x10, x8, [x0, #48]
; GISEL-NEXT: ret
entry:
%input_val = load i512, ptr %input, align 64
@@ -5044,30 +5037,22 @@ define void @test_lshr_i512_const_32(ptr %result, ptr %input) {
;
; GISEL-LABEL: test_lshr_i512_const_32:
; GISEL: ; %bb.0: ; %entry
-; GISEL-NEXT: ldp x8, x9, [x1, #8]
-; GISEL-NEXT: ldr x11, [x1]
-; GISEL-NEXT: ldp x10, x14, [x1, #24]
-; GISEL-NEXT: ldr x16, [x1, #56]
-; GISEL-NEXT: lsl x12, x8, #32
-; GISEL-NEXT: lsl x13, x9, #32
-; GISEL-NEXT: lsl x15, x10, #32
-; GISEL-NEXT: orr x11, x12, x11, lsr #32
-; GISEL-NEXT: orr x8, x13, x8, lsr #32
-; GISEL-NEXT: lsl x13, x14, #32
-; GISEL-NEXT: orr x9, x15, x9, lsr #32
-; GISEL-NEXT: ldp x12, x15, [x1, #40]
-; GISEL-NEXT: stp x11, x8, [x0]
-; GISEL-NEXT: orr x10, x13, x10, lsr #32
-; GISEL-NEXT: lsl x8, x16, #32
-; GISEL-NEXT: lsl x11, x12, #32
-; GISEL-NEXT: lsl x13, x15, #32
-; GISEL-NEXT: stp x9, x10, [x0, #16]
-; GISEL-NEXT: orr x8, x8, x15, lsr #32
-; GISEL-NEXT: lsr x10, x16, #32
-; GISEL-NEXT: orr x11, x11, x14, lsr #32
-; GISEL-NEXT: orr x9, x13, x12, lsr #32
-; GISEL-NEXT: stp x8, x10, [x0, #48]
-; GISEL-NEXT: stp x11, x9, [x0, #32]
+; GISEL-NEXT: ldp x8, x9, [x1]
+; GISEL-NEXT: ldp x10, x11, [x1, #16]
+; GISEL-NEXT: ldp x12, x13, [x1, #32]
+; GISEL-NEXT: extr x8, x9, x8, #32
+; GISEL-NEXT: ldp x14, x15, [x1, #48]
+; GISEL-NEXT: extr x9, x10, x9, #32
+; GISEL-NEXT: extr x10, x11, x10, #32
+; GISEL-NEXT: stp x8, x9, [x0]
+; GISEL-NEXT: extr x8, x12, x11, #32
+; GISEL-NEXT: extr x9, x13, x12, #32
+; GISEL-NEXT: stp x10, x8, [x0, #16]
+; GISEL-NEXT: extr x10, x14, x13, #32
+; GISEL-NEXT: extr x8, x15, x14, #32
+; GISEL-NEXT: stp x9, x10, [x0, #32]
+; GISEL-NEXT: lsr x9, x15, #32
+; GISEL-NEXT: stp x8, x9, [x0, #48]
; GISEL-NEXT: ret
entry:
%input_val = load i512, ptr %input, align 64
@@ -5098,32 +5083,24 @@ define void @test_ashr_i512_const_32(ptr %result, ptr %input) {
;
; GISEL-LABEL: test_ashr_i512_const_32:
; GISEL: ; %bb.0: ; %entry
-; GISEL-NEXT: ldp x8, x9, [x1, #8]
-; GISEL-NEXT: ldr x11, [x1]
-; GISEL-NEXT: ldp x10, x13, [x1, #24]
-; GISEL-NEXT: ldr x17, [x1, #56]
-; GISEL-NEXT: lsl x12, x8, #32
-; GISEL-NEXT: lsl x15, x9, #32
-; GISEL-NEXT: lsl x16, x10, #32
-; GISEL-NEXT: orr x11, x12, x11, lsr #32
-; GISEL-NEXT: ldp x14, x12, [x1, #40]
-; GISEL-NEXT: orr x8, x15, x8, lsr #32
-; GISEL-NEXT: lsl x15, x13, #32
-; GISEL-NEXT: orr x9, x16, x9, lsr #32
-; GISEL-NEXT: asr x16, x17, #63
-; GISEL-NEXT: stp x11, x8, [x0]
-; GISEL-NEXT: lsl x11, x14, #32
-; GISEL-NEXT: orr x10, x15, x10, lsr #32
-; GISEL-NEXT: lsl x15, x12, #32
-; GISEL-NEXT: orr x8, x11, x13, lsr #32
-; GISEL-NEXT: lsl x11, x17, #32
-; GISEL-NEXT: stp x9, x10, [x0, #16]
-; GISEL-NEXT: orr x9, x15, x14, lsr #32
-; GISEL-NEXT: lsl x13, x16, #32
-; GISEL-NEXT: orr x10, x11, x12, lsr #32
-; GISEL-NEXT: stp x8, x9, [x0, #32]
-; GISEL-NEXT: orr x8, x13, x17, asr #32
-; GISEL-NEXT: stp x10, x8, [x0, #48]
+; GISEL-NEXT: ldp x8, x9, [x1]
+; GISEL-NEXT: ldp x10, x11, [x1, #16]
+; GISEL-NEXT: ldp x12, x13, [x1, #48]
+; GISEL-NEXT: extr x8, x9, x8, #32
+; GISEL-NEXT: ldp x14, x15, [x1, #32]
+; GISEL-NEXT: extr x9, x10, x9, #32
+; GISEL-NEXT: extr x10, x11, x10, #32
+; GISEL-NEXT: stp x8, x9, [x0]
+; GISEL-NEXT: asr x8, x13, #63
+; GISEL-NEXT: extr x11, x14, x11, #32
+; GISEL-NEXT: extr x9, x15, x14, #32
+; GISEL-NEXT: lsl x8, x8, #32
+; GISEL-NEXT: stp x10, x11, [x0, #16]
+; GISEL-NEXT: extr x10, x12, x15, #32
+; GISEL-NEXT: extr x11, x13, x12, #32
+; GISEL-NEXT: orr x8, x8, x13, asr #32
+; GISEL-NEXT: stp x9, x10, [x0, #32]
+; GISEL-NEXT: stp x11, x8, [x0, #48]
; GISEL-NEXT: ret
entry:
%input_val = load i512, ptr %input, align 64
@@ -5252,23 +5229,17 @@ define void @test_shl_i512_const_96(ptr %result, ptr %input) {
; GISEL-NEXT: ldr x15, [x1, #48]
; GISEL-NEXT: ldp x10, x11, [x1, #16]
; GISEL-NEXT: ldp x12, x13, [x1, #32]
-; GISEL-NEXT: lsr x14, x8, #32
-; GISEL-NEXT: lsr x16, x9, #32
-; GISEL-NEXT: lsl x8, x8, #32
-; GISEL-NEXT: orr x9, x14, x9, lsl #32
-; GISEL-NEXT: lsr x14, x10, #32
-; GISEL-NEXT: orr x10, x16, x10, lsl #32
-; GISEL-NEXT: stp xzr, x8, [x0]
-; GISEL-NEXT: lsr x8, x11, #32
-; GISEL-NEXT: orr x11, x14, x11, lsl #32
-; GISEL-NEXT: lsr x14, x12, #32
-; GISEL-NEXT: stp x9, x10, [x0, #16]
-; GISEL-NEXT: lsr x9, x13, #32
-; GISEL-NEXT: orr x8, x8, x12, lsl #32
-; GISEL-NEXT: orr x10, x14, x13, lsl #32
-; GISEL-NEXT: orr x9, x9, x15, lsl #32
-; GISEL-NEXT: stp x11, x8, [x0, #32]
-; GISEL-NEXT: stp x10, x9, [x0, #48]
+; GISEL-NEXT: lsl x14, x8, #32
+; GISEL-NEXT: extr x8, x9, x8, #32
+; GISEL-NEXT: extr x9, x10, x9, #32
+; GISEL-NEXT: extr x10, x11, x10, #32
+; GISEL-NEXT: stp xzr, x14, [x0]
+; GISEL-NEXT: stp x8, x9, [x0, #16]
+; GISEL-NEXT: extr x8, x12, x11, #32
+; GISEL-NEXT: extr x9, x13, x12, #32
+; GISEL-NEXT: stp x10, x8, [x0, #32]
+; GISEL-NEXT: extr x10, x15, x13, #32
+; GISEL-NEXT: stp x9, x10, [x0, #48]
; GISEL-NEXT: ret
entry:
%input_val = load i512, ptr %input, align 64
@@ -5297,27 +5268,21 @@ define void @test_lshr_i512_const_96(ptr %result, ptr %input) {
;
; GISEL-LABEL: test_lshr_i512_const_96:
; GISEL: ; %bb.0: ; %entry
-; GISEL-NEXT: ldp x8, x9, [x1, #16]
-; GISEL-NEXT: ldr x10, [x1, #8]
-; GISEL-NEXT: ldp x11, x14, [x1, #32]
-; GISEL-NEXT: ldp x15, x16, [x1, #48]
-; GISEL-NEXT: lsl x12, x8, #32
-; GISEL-NEXT: lsl x13, x9, #32
-; GISEL-NEXT: orr x10, x12, x10, lsr #32
-; GISEL-NEXT: lsl x12, x11, #32
-; GISEL-NEXT: orr x8, x13, x8, lsr #32
-; GISEL-NEXT: lsl x13, x14, #32
-; GISEL-NEXT: orr x9, x12, x9, lsr #32
-; GISEL-NEXT: stp x10, x8, [x0]
-; GISEL-NEXT: lsl x10, x15, #32
-; GISEL-NEXT: orr x11, x13, x11, lsr #32
-; GISEL-NEXT: lsl x12, x16, #32
-; GISEL-NEXT: orr x8, x10, x14, lsr #32
-; GISEL-NEXT: lsr x10, x16, #32
-; GISEL-NEXT: stp x9, x11, [x0, #16]
-; GISEL-NEXT: orr x9, x12, x15, lsr #32
-; GISEL-NEXT: stp x10, xzr, [x0, #48]
-; GISEL-NEXT: stp x8, x9, [x0, #32]
+; GISEL-NEXT: ldp x8, x9, [x1, #8]
+; GISEL-NEXT: ldr x14, [x1, #56]
+; GISEL-NEXT: ldp x10, x11, [x1, #24]
+; GISEL-NEXT: ldp x12, x13, [x1, #40]
+; GISEL-NEXT: extr x8, x9, x8, #32
+; GISEL-NEXT: extr x9, x10, x9, #32
+; GISEL-NEXT: extr x10, x11, x10, #32
+; GISEL-NEXT: stp x8, x9, [x0]
+; GISEL-NEXT: extr x8, x12, x11, #32
+; GISEL-NEXT: extr x9, x13, x12, #32
+; GISEL-NEXT: stp x10, x8, [x0, #16]
+; GISEL-NEXT: extr x10, x14, x13, #32
+; GISEL-NEXT: lsr x8, x14, #32
+; GISEL-NEXT: stp x9, x10, [x0, #32]
+; GISEL-NEXT: stp x8, xzr, [x0, #48]
; GISEL-NEXT: ret
entry:
%input_val = load i512, ptr %input, align 64
@@ -5347,29 +5312,23 @@ define void @test_ashr_i512_const_96(ptr %result, ptr %input) {
;
; GISEL-LABEL: test_ashr_i512_const_96:
; GISEL: ; %bb.0: ; %entry
-; GISEL-NEXT: ldp x8, x9, [x1, #16]
-; GISEL-NEXT: ldr x11, [x1, #8]
-; GISEL-NEXT: ldp x10, x13, [x1, #32]
-; GISEL-NEXT: lsl x12, x8, #32
-; GISEL-NEXT: lsl x14, x9, #32
-; GISEL-NEXT: lsl x15, x10, #32
-; GISEL-NEXT: orr x11, x12, x11, lsr #32
-; GISEL-NEXT: ldp x12, x16, [x1, #48]
-; GISEL-NEXT: orr x8, x14, x8, lsr #32
-; GISEL-NEXT: lsl x14, x13, #32
-; GISEL-NEXT: orr x9, x15, x9, lsr #32
-; GISEL-NEXT: asr x15, x16, #63
-; GISEL-NEXT: stp x11, x8, [x0]
-; GISEL-NEXT: lsl x11, x12, #32
-; GISEL-NEXT: orr x10, x14, x10, lsr #32
-; GISEL-NEXT: lsl x14, x16, #32
-; GISEL-NEXT: orr x8, x11, x13, lsr #32
+; GISEL-NEXT: ldp x8, x9, [x1, #8]
+; GISEL-NEXT: ldr x13, [x1, #40]
+; GISEL-NEXT: ldp x10, x11, [x1, #24]
+; GISEL-NEXT: ldp x14, x12, [x1, #48]
+; GISEL-NEXT: extr x8, x9, x8, #32
+; GISEL-NEXT: extr x9, x10, x9, #32
+; GISEL-NEXT: extr x10, x11, x10, #32
+; GISEL-NEXT: asr x15, x12, #63
+; GISEL-NEXT: stp x8, x9, [x0]
+; GISEL-NEXT: extr x8, x13, x11, #32
+; GISEL-NEXT: extr x9, x14, x13, #32
; GISEL-NEXT: lsl x11, x15, #32
-; GISEL-NEXT: stp x9, x10, [x0, #16]
-; GISEL-NEXT: orr x9, x14, x12, lsr #32
-; GISEL-NEXT: orr x10, x11, x16, asr #32
-; GISEL-NEXT: stp x8, x9, [x0, #32]
-; GISEL-NEXT: stp x10, x15, [x0, #48]
+; GISEL-NEXT: stp x10, x8, [x0, #16]
+; GISEL-NEXT: extr x10, x12, x14, #32
+; GISEL-NEXT: orr x8, x11, x12, asr #32
+; GISEL-NEXT: stp x9, x10, [x0, #32]
+; GISEL-NEXT: stp x8, x15, [x0, #48]
; GISEL-NEXT: ret
entry:
%input_val = load i512, ptr %input, align 64
@@ -5404,28 +5363,21 @@ define void @test_shl_i512_const_1(ptr %result, ptr %input) {
; GISEL-LABEL: test_shl_i512_const_1:
; GISEL: ; %bb.0: ; %entry
; GISEL-NEXT: ldp x8, x9, [x1]
-; GISEL-NEXT: ldp x11, x12, [x1, #16]
-; GISEL-NEXT: ldp x14, x15, [x1, #32]
-; GISEL-NEXT: lsr x10, x8, #63
-; GISEL-NEXT: lsr x13, x9, #63
-; GISEL-NEXT: lsl x8, x8, #1
-; GISEL-NEXT: orr x9, x10, x9, lsl #1
-; GISEL-NEXT: lsr x10, x11, #63
-; GISEL-NEXT: orr x11, x13, x11, lsl #1
-; GISEL-NEXT: ldp x13, x16, [x1, #48]
-; GISEL-NEXT: stp x8, x9, [x0]
-; GISEL-NEXT: lsr x8, x12, #63
-; GISEL-NEXT: orr x10, x10, x12, lsl #1
-; GISEL-NEXT: lsr x12, x14, #63
-; GISEL-NEXT: lsr x9, x15, #63
-; GISEL-NEXT: orr x8, x8, x14, lsl #1
-; GISEL-NEXT: stp x11, x10, [x0, #16]
-; GISEL-NEXT: orr x11, x12, x15, lsl #1
-; GISEL-NEXT: lsr x12, x13, #63
-; GISEL-NEXT: orr x9, x9, x13, lsl #1
-; GISEL-NEXT: stp x8, x11, [x0, #32]
-; GISEL-NEXT: orr x8, x12, x16, lsl #1
-; GISEL-NEXT: stp x9, x8, [x0, #48]
+; GISEL-NEXT: ldp x10, x11, [x1, #16]
+; GISEL-NEXT: ldp x13, x14, [x1, #32]
+; GISEL-NEXT: lsl x12, x8, #1
+; GISEL-NEXT: extr x8, x9, x8, #63
+; GISEL-NEXT: extr x9, x10, x9, #63
+; GISEL-NEXT: extr x10, x11, x10, #63
+; GISEL-NEXT: ldp x15, x16, [x1, #48]
+; GISEL-NEXT: stp x12, x8, [x0]
+; GISEL-NEXT: extr x8, x13, x11, #63
+; GISEL-NEXT: stp x9, x10, [x0, #16]
+; GISEL-NEXT: extr x9, x14, x13, #63
+; GISEL-NEXT: extr x10, x15, x14, #63
+; GISEL-NEXT: stp x8, x9, [x0, #32]
+; GISEL-NEXT: extr x8, x16, x15, #63
+; GISEL-NEXT: stp x10, x8, [x0, #48]
; GISEL-NEXT: ret
entry:
%input_val = load i512, ptr %input, align 64
@@ -5457,30 +5409,22 @@ define void @test_lshr_i512_const_1(ptr %result, ptr %input) {
;
; GISEL-LABEL: test_lshr_i512_const_1:
; GISEL: ; %bb.0: ; %entry
-; GISEL-NEXT: ldp x8, x9, [x1, #8]
-; GISEL-NEXT: ldr x11, [x1]
-; GISEL-NEXT: ldp x10, x14, [x1, #24]
-; GISEL-NEXT: ldr x16, [x1, #56]
-; GISEL-NEXT: lsl x12, x8, #63
-; GISEL-NEXT: lsl x13, x9, #63
-; GISEL-NEXT: lsl x15, x10, #63
-; GISEL-NEXT: orr x11, x12, x11, lsr #1
-; GISEL-NEXT: orr x8, x13, x8, lsr #1
-; GISEL-NEXT: lsl x13, x14, #63
-; GISEL-NEXT: orr x9, x15, x9, lsr #1
-; GISEL-NEXT: ldp x12, x15, [x1, #40]
-; GISEL-NEXT: stp x11, x8, [x0]
-; GISEL-NEXT: orr x10, x13, x10, lsr #1
-; GISEL-NEXT: lsl x8, x16, #63
-; GISEL-NEXT: lsl x11, x12, #63
-; GISEL-NEXT: lsl x13, x15, #63
-; GISEL-NEXT: stp x9, x10, [x0, #16]
-; GISEL-NEXT: orr x8, x8, x15, lsr #1
-; GISEL-NEXT: lsr x10, x16, #1
-; GISEL-NEXT: orr x11, x11, x14, lsr #1
-; GISEL-NEXT: orr x9, x13, x12, lsr #1
-; GISEL-NEXT: stp x8, x10, [x0, #48]
-; GISEL-NEXT: stp x11, x9, [x0, #32]
+; GISEL-NEXT: ldp x8, x9, [x1]
+; GISEL-NEXT: ldp x10, x11, [x1, #16]
+; GISEL-NEXT: ldp x12, x13, [x1, #32]
+; GISEL-NEXT: extr x8, x9, x8, #1
+; GISEL-NEXT: ldp x14, x15, [x1, #48]
+; GISEL-NEXT: extr x9, x10, x9, #1
+; GISEL-NEXT: extr x10, x11, x10, #1
+; GISEL-NEXT: stp x8, x9, [x0]
+; GISEL-NEXT: extr x8, x12, x11, #1
+; GISEL-NEXT: extr x9, x13, x12, #1
+; GISEL-NEXT: stp x10, x8, [x0, #16]
+; GISEL-NEXT: extr x10, x14, x13, #1
+; GISEL-NEXT: extr x8, x15, x14, #1
+; GISEL-NEXT: stp x9, x10, [x0, #32]
+; GISEL-NEXT: lsr x9, x15, #1
+; GISEL-NEXT: stp x8, x9, [x0, #48]
; GISEL-NEXT: ret
entry:
%input_val = load i512, ptr %input, align 64
@@ -5512,32 +5456,24 @@ define void @test_ashr_i512_const_1(ptr %result, ptr %input) {
;
; GISEL-LABEL: test_ashr_i512_const_1:
; GISEL: ; %bb.0: ; %entry
-; GISEL-NEXT: ldp x8, x9, [x1, #8]
-; GISEL-NEXT: ldr x11, [x1]
-; GISEL-NEXT: ldp x10, x13, [x1, #24]
-; GISEL-NEXT: ldr x17, [x1, #56]
-; GISEL-NEXT: lsl x12, x8, #63
-; GISEL-NEXT: lsl x15, x9, #63
-; GISEL-NEXT: lsl x16, x10, #63
-; GISEL-NEXT: orr x11, x12, x11, lsr #1
-; GISEL-NEXT: ldp x14, x12, [x1, #40]
-; GISEL-NEXT: orr x8, x15, x8, lsr #1
-; GISEL-NEXT: lsl x15, x13, #63
-; GISEL-NEXT: orr x9, x16, x9, lsr #1
-; GISEL-NEXT: asr x16, x17, #63
-; GISEL-NEXT: stp x11, x8, [x0]
-; GISEL-NEXT: lsl x11, x14, #63
-; GISEL-NEXT: orr x10, x15, x10, lsr #1
-; GISEL-NEXT: lsl x15, x12, #63
-; GISEL-NEXT: orr x8, x11, x13, lsr #1
-; GISEL-NEXT: lsl x11, x17, #63
-; GISEL-NEXT: stp x9, x10, [x0, #16]
-; GISEL-NEXT: orr x9, x15, x14, lsr #1
-; GISEL-NEXT: lsl x13, x16, #63
-; GISEL-NEXT: orr x10, x11, x12, lsr #1
-; GISEL-NEXT: stp x8, x9, [x0, #32]
-; GISEL-NEXT: orr x8, x13, x17, asr #1
-; GISEL-NEXT: stp x10, x8, [x0, #48]
+; GISEL-NEXT: ldp x8, x9, [x1]
+; GISEL-NEXT: ldp x10, x11, [x1, #16]
+; GISEL-NEXT: ldp x12, x13, [x1, #48]
+; GISEL-NEXT: extr x8, x9, x8, #1
+; GISEL-NEXT: ldp x14, x15, [x1, #32]
+; GISEL-NEXT: extr x9, x10, x9, #1
+; GISEL-NEXT: extr x10, x11, x10, #1
+; GISEL-NEXT: stp x8, x9, [x0]
+; GISEL-NEXT: asr x8, x13, #63
+; GISEL-NEXT: extr x11, x14, x11, #1
+; GISEL-NEXT: extr x9, x15, x14, #1
+; GISEL-NEXT: lsl x8, x8, #63
+; GISEL-NEXT: stp x10, x11, [x0, #16]
+; GISEL-NEXT: extr x10, x12, x15, #1
+; GISEL-NEXT: extr x11, x13, x12, #1
+; GISEL-NEXT: orr x8, x8, x13, asr #1
+; GISEL-NEXT: stp x9, x10, [x0, #32]
+; GISEL-NEXT: stp x11, x8, [x0, #48]
; GISEL-NEXT: ret
entry:
%input_val = load i512, ptr %input, align 64
@@ -5571,28 +5507,21 @@ define void @test_shl_i512_const_15(ptr %result, ptr %input) {
; GISEL-LABEL: test_shl_i512_const_15:
; GISEL: ; %bb.0: ; %entry
; GISEL-NEXT: ldp x8, x9, [x1]
-; GISEL-NEXT: ldp x11, x12, [x1, #16]
-; GISEL-NEXT: ldp x14, x15, [x1, #32]
-; GISEL-NEXT: lsr x10, x8, #49
-; GISEL-NEXT: lsr x13, x9, #49
-; GISEL-NEXT: lsl x8, x8, #15
-; GISEL-NEXT: orr x9, x10, x9, lsl #15
-; GISEL-NEXT: lsr x10, x11, #49
-; GISEL-NEXT: orr x11, x13, x11, lsl #15
-; GISEL-NEXT: ldp x13, x16, [x1, #48]
-; GISEL-NEXT: stp x8, x9, [x0]
-; GISEL-NEXT: lsr x8, x12, #49
-; GISEL-NEXT: orr x10, x10, x12, lsl #15
-; GISEL-NEXT: lsr x12, x14, #49
-; GISEL-NEXT: lsr x9, x15, #49
-; GISEL-NEXT: orr x8, x8, x14, lsl #15
-; GISEL-NEXT: stp x11, x10, [x0, #16]
-; GISEL-NEXT: orr x11, x12, x15, lsl #15
-; GISEL-NEXT: lsr x12, x13, #49
-; GISEL-NEXT: orr x9, x9, x13, lsl #15
-; GISEL-NEXT: stp x8, x11, [x0, #32]
-; GISEL-NEXT: orr x8, x12, x16, lsl #15
-; GISEL-NEXT: stp x9, x8, [x0, #48]
+; GISEL-NEXT: ldp x10, x11, [x1, #16]
+; GISEL-NEXT: ldp x13, x14, [x1, #32]
+; GISEL-NEXT: lsl x12, x8, #15
+; GISEL-NEXT: extr x8, x9, x8, #49
+; GISEL-NEXT: extr x9, x10, x9, #49
+; GISEL-NEXT: extr x10, x11, x10, #49
+; GISEL-NEXT: ldp x15, x16, [x1, #48]
+; GISEL-NEXT: stp x12, x8, [x0]
+; GISEL-NEXT: extr x8, x13, x11, #49
+; GISEL-NEXT: stp x9, x10, [x0, #16]
+; GISEL-NEXT: extr x9, x14, x13, #49
+; GISEL-NEXT: extr x10, x15, x14, #49
+; GISEL-NEXT: stp x8, x9, [x0, #32]
+; GISEL-NEXT: extr x8, x16, x15, #49
+; GISEL-NEXT: stp x10, x8, [x0, #48]
; GISEL-NEXT: ret
entry:
%input_val = load i512, ptr %input, align 64
@@ -5624,30 +5553,22 @@ define void @test_lshr_i512_const_15(ptr %result, ptr %input) {
;
; GISEL-LABEL: test_lshr_i512_const_15:
; GISEL: ; %bb.0: ; %entry
-; GISEL-NEXT: ldp x8, x9, [x1, #8]
-; GISEL-NEXT: ldr x11, [x1]
-; GISEL-NEXT: ldp x10, x14, [x1, #24]
-; GISEL-NEXT: ldr x16, [x1, #56]
-; GISEL-NEXT: lsl x12, x8, #49
-; GISEL-NEXT: lsl x13, x9, #49
-; GISEL-NEXT: lsl x15, x10, #49
-; GISEL-NEXT: orr x11, x12, x11, lsr #15
-; GISEL-NEXT: orr x8, x13, x8, lsr #15
-; GISEL-NEXT: lsl x13, x14, #49
-; GISEL-NEXT: orr x9, x15, x9, lsr #15
-; GISEL-NEXT: ldp x12, x15, [x1, #40]
-; GISEL-NEXT: stp x11, x8, [x0]
-; GISEL-NEXT: orr x10, x13, x10, lsr #15
-; GISEL-NEXT: lsl x8, x16, #49
-; GISEL-NEXT: lsl x11, x12, #49
-; GISEL-NEXT: lsl x13, x15, #49
-; GISEL-NEXT: stp x9, x10, [x0, #16]
-; GISEL-NEXT: orr x8, x8, x15, lsr #15
-; GISEL-NEXT: lsr x10, x16, #15
-; GISEL-NEXT: orr x11, x11, x14, lsr #15
-; GISEL-NEXT: orr x9, x13, x12, lsr #15
-; GISEL-NEXT: stp x8, x10, [x0, #48]
-; GISEL-NEXT: stp x11, x9, [x0, #32]
+; GISEL-NEXT: ldp x8, x9, [x1]
+; GISEL-NEXT: ldp x10, x11, [x1, #16]
+; GISEL-NEXT: ldp x12, x13, [x1, #32]
+; GISEL-NEXT: extr x8, x9, x8, #15
+; GISEL-NEXT: ldp x14, x15, [x1, #48]
+; GISEL-NEXT: extr x9, x10, x9, #15
+; GISEL-NEXT: extr x10, x11, x10, #15
+; GISEL-NEXT: stp x8, x9, [x0]
+; GISEL-NEXT: extr x8, x12, x11, #15
+; GISEL-NEXT: extr x9, x13, x12, #15
+; GISEL-NEXT: stp x10, x8, [x0, #16]
+; GISEL-NEXT: extr x10, x14, x13, #15
+; GISEL-NEXT: extr x8, x15, x14, #15
+; GISEL-NEXT: stp x9, x10, [x0, #32]
+; GISEL-NEXT: lsr x9, x15, #15
+; GISEL-NEXT: stp x8, x9, [x0, #48]
; GISEL-NEXT: ret
entry:
%input_val = load i512, ptr %input, align 64
@@ -5679,32 +5600,24 @@ define void @test_ashr_i512_const_15(ptr %result, ptr %input) {
;
; GISEL-LABEL: test_ashr_i512_const_15:
; GISEL: ; %bb.0: ; %entry
-; GISEL-NEXT: ldp x8, x9, [x1, #8]
-; GISEL-NEXT: ldr x11, [x1]
-; GISEL-NEXT: ldp x10, x13, [x1, #24]
-; GISEL-NEXT: ldr x17, [x1, #56]
-; GISEL-NEXT: lsl x12, x8, #49
-; GISEL-NEXT: lsl x15, x9, #49
-; GISEL-NEXT: lsl x16, x10, #49
-; GISEL-NEXT: orr x11, x12, x11, lsr #15
-; GISEL-NEXT: ldp x14, x12, [x1, #40]
-; GISEL-NEXT: orr x8, x15, x8, lsr #15
-; GISEL-NEXT: lsl x15, x13, #49
-; GISEL-NEXT: orr x9, x16, x9, lsr #15
-; GISEL-NEXT: asr x16, x17, #63
-; GISEL-NEXT: stp x11, x8, [x0]
-; GISEL-NEXT: lsl x11, x14, #49
-; GISEL-NEXT: orr x10, x15, x10, lsr #15
-; GISEL-NEXT: lsl x15, x12, #49
-; GISEL-NEXT: orr x8, x11, x13, lsr #15
-; GISEL-NEXT: lsl x11, x17, #49
-; GISEL-NEXT: stp x9, x10, [x0, #16]
-; GISEL-NEXT: orr x9, x15, x14, lsr #15
-; GISEL-NEXT: lsl x13, x16, #49
-; GISEL-NEXT: orr x10, x11, x12, lsr #15
-; GISEL-NEXT: stp x8, x9, [x0, #32]
-; GISEL-NEXT: orr x8, x13, x17, asr #15
-; GISEL-NEXT: stp x10, x8, [x0, #48]
+; GISEL-NEXT: ldp x8, x9, [x1]
+; GISEL-NEXT: ldp x10, x11, [x1, #16]
+; GISEL-NEXT: ldp x12, x13, [x1, #48]
+; GISEL-NEXT: extr x8, x9, x8, #15
+; GISEL-NEXT: ldp x14, x15, [x1, #32]
+; GISEL-NEXT: extr x9, x10, x9, #15
+; GISEL-NEXT: extr x10, x11, x10, #15
+; GISEL-NEXT: stp x8, x9, [x0]
+; GISEL-NEXT: asr x8, x13, #63
+; GISEL-NEXT: extr x11, x14, x11, #15
+; GISEL-NEXT: extr x9, x15, x14, #15
+; GISEL-NEXT: lsl x8, x8, #49
+; GISEL-NEXT: stp x10, x11, [x0, #16]
+; GISEL-NEXT: extr x10, x12, x15, #15
+; GISEL-NEXT: extr x11, x13, x12, #15
+; GISEL-NEXT: orr x8, x8, x13, asr #15
+; GISEL-NEXT: stp x9, x10, [x0, #32]
+; GISEL-NEXT: stp x11, x8, [x0, #48]
; GISEL-NEXT: ret
entry:
%input_val = load i512, ptr %input, align 64
@@ -5738,28 +5651,21 @@ define void @test_shl_i512_const_63(ptr %result, ptr %input) {
; GISEL-LABEL: test_shl_i512_const_63:
; GISEL: ; %bb.0: ; %entry
; GISEL-NEXT: ldp x8, x9, [x1]
-; GISEL-NEXT: ldp x11, x12, [x1, #16]
-; GISEL-NEXT: ldp x14, x15, [x1, #32]
-; GISEL-NEXT: lsr x10, x8, #1
-; GISEL-NEXT: lsr x13, x9, #1
-; GISEL-NEXT: lsl x8, x8, #63
-; GISEL-NEXT: orr x9, x10, x9, lsl #63
-; GISEL-NEXT: lsr x10, x11, #1
-; GISEL-NEXT: orr x11, x13, x11, lsl #63
-; GISEL-NEXT: ldp x13, x16, [x1, #48]
-; GISEL-NEXT: stp x8, x9, [x0]
-; GISEL-NEXT: lsr x8, x12, #1
-; GISEL-NEXT: orr x10, x10, x12, lsl #63
-; GISEL-NEXT: lsr x12, x14, #1
-; GISEL-NEXT: lsr x9, x15, #1
-; GISEL-NEXT: orr x8, x8, x14, lsl #63
-; GISEL-NEXT: stp x11, x10, [x0, #16]
-; GISEL-NEXT: orr x11, x12, x15, lsl #63
-; GISEL-NEXT: lsr x12, x13, #1
-; GISEL-NEXT: orr x9, x9, x13, lsl #63
-; GISEL-NEXT: stp x8, x11, [x0, #32]
-; GISEL-NEXT: orr x8, x12, x16, lsl #63
-; GISEL-NEXT: stp x9, x8, [x0, #48]
+; GISEL-NEXT: ldp x10, x11, [x1, #16]
+; GISEL-NEXT: ldp x13, x14, [x1, #32]
+; GISEL-NEXT: lsl x12, x8, #63
+; GISEL-NEXT: extr x8, x9, x8, #1
+; GISEL-NEXT: extr x9, x10, x9, #1
+; GISEL-NEXT: extr x10, x11, x10, #1
+; GISEL-NEXT: ldp x15, x16, [x1, #48]
+; GISEL-NEXT: stp x12, x8, [x0]
+; GISEL-NEXT: extr x8, x13, x11, #1
+; GISEL-NEXT: stp x9, x10, [x0, #16]
+; GISEL-NEXT: extr x9, x14, x13, #1
+; GISEL-NEXT: extr x10, x15, x14, #1
+; GISEL-NEXT: stp x8, x9, [x0, #32]
+; GISEL-NEXT: extr x8, x16, x15, #1
+; GISEL-NEXT: stp x10, x8, [x0, #48]
; GISEL-NEXT: ret
entry:
%input_val = load i512, ptr %input, align 64
@@ -5791,30 +5697,22 @@ define void @test_lshr_i512_const_63(ptr %result, ptr %input) {
;
; GISEL-LABEL: test_lshr_i512_const_63:
; GISEL: ; %bb.0: ; %entry
-; GISEL-NEXT: ldp x8, x9, [x1, #8]
-; GISEL-NEXT: ldr x11, [x1]
-; GISEL-NEXT: ldp x10, x14, [x1, #24]
-; GISEL-NEXT: ldr x16, [x1, #56]
-; GISEL-NEXT: lsl x12, x8, #1
-; GISEL-NEXT: lsl x13, x9, #1
-; GISEL-NEXT: lsl x15, x10, #1
-; GISEL-NEXT: orr x11, x12, x11, lsr #63
-; GISEL-NEXT: orr x8, x13, x8, lsr #63
-; GISEL-NEXT: lsl x13, x14, #1
-; GISEL-NEXT: orr x9, x15, x9, lsr #63
-; GISEL-NEXT: ldp x12, x15, [x1, #40]
-; GISEL-NEXT: stp x11, x8, [x0]
-; GISEL-NEXT: orr x10, x13, x10, lsr #63
-; GISEL-NEXT: lsl x8, x16, #1
-; GISEL-NEXT: lsl x11, x12, #1
-; GISEL-NEXT: lsl x13, x15, #1
-; GISEL-NEXT: stp x9, x10, [x0, #16]
-; GISEL-NEXT: orr x8, x8, x15, lsr #63
-; GISEL-NEXT: lsr x10, x16, #63
-; GISEL-NEXT: orr x11, x11, x14, lsr #63
-; GISEL-NEXT: orr x9, x13, x12, lsr #63
-; GISEL-NEXT: stp x8, x10, [x0, #48]
-; GISEL-NEXT: stp x11, x9, [x0, #32]
+; GISEL-NEXT: ldp x8, x9, [x1]
+; GISEL-NEXT: ldp x10, x11, [x1, #16]
+; GISEL-NEXT: ldp x12, x13, [x1, #32]
+; GISEL-NEXT: extr x8, x9, x8, #63
+; GISEL-NEXT: ldp x14, x15, [x1, #48]
+; GISEL-NEXT: extr x9, x10, x9, #63
+; GISEL-NEXT: extr x10, x11, x10, #63
+; GISEL-NEXT: stp x8, x9, [x0]
+; GISEL-NEXT: extr x8, x12, x11, #63
+; GISEL-NEXT: extr x9, x13, x12, #63
+; GISEL-NEXT: stp x10, x8, [x0, #16]
+; GISEL-NEXT: extr x10, x14, x13, #63
+; GISEL-NEXT: extr x8, x15, x14, #63
+; GISEL-NEXT: stp x9, x10, [x0, #32]
+; GISEL-NEXT: lsr x9, x15, #63
+; GISEL-NEXT: stp x8, x9, [x0, #48]
; GISEL-NEXT: ret
entry:
%input_val = load i512, ptr %input, align 64
@@ -5846,30 +5744,22 @@ define void @test_ashr_i512_const_63(ptr %result, ptr %input) {
;
; GISEL-LABEL: test_ashr_i512_const_63:
; GISEL: ; %bb.0: ; %entry
-; GISEL-NEXT: ldp x8, x9, [x1, #8]
-; GISEL-NEXT: ldr x10, [x1]
-; GISEL-NEXT: ldp x11, x13, [x1, #24]
-; GISEL-NEXT: ldr x17, [x1, #56]
-; GISEL-NEXT: lsl x15, x9, #1
-; GISEL-NEXT: lsl x12, x8, #1
-; GISEL-NEXT: lsl x16, x11, #1
-; GISEL-NEXT: orr x8, x15, x8, lsr #63
-; GISEL-NEXT: lsl x15, x13, #1
-; GISEL-NEXT: orr x10, x12, x10, lsr #63
-; GISEL-NEXT: ldp x14, x12, [x1, #40]
-; GISEL-NEXT: orr x9, x16, x9, lsr #63
-; GISEL-NEXT: orr x11, x15, x11, lsr #63
-; GISEL-NEXT: stp x10, x8, [x0]
-; GISEL-NEXT: lsl x8, x17, #1
-; GISEL-NEXT: lsl x16, x14, #1
-; GISEL-NEXT: lsl x10, x12, #1
-; GISEL-NEXT: stp x9, x11, [x0, #16]
-; GISEL-NEXT: asr x9, x17, #63
-; GISEL-NEXT: orr x8, x8, x12, lsr #63
-; GISEL-NEXT: orr x13, x16, x13, lsr #63
-; GISEL-NEXT: orr x10, x10, x14, lsr #63
-; GISEL-NEXT: orr x9, x9, x9, lsl #1
-; GISEL-NEXT: stp x13, x10, [x0, #32]
+; GISEL-NEXT: ldp x8, x9, [x1]
+; GISEL-NEXT: ldp x10, x11, [x1, #16]
+; GISEL-NEXT: ldp x12, x13, [x1, #32]
+; GISEL-NEXT: extr x8, x9, x8, #63
+; GISEL-NEXT: ldp x14, x15, [x1, #48]
+; GISEL-NEXT: extr x9, x10, x9, #63
+; GISEL-NEXT: extr x10, x11, x10, #63
+; GISEL-NEXT: stp x8, x9, [x0]
+; GISEL-NEXT: extr x8, x12, x11, #63
+; GISEL-NEXT: extr x9, x13, x12, #63
+; GISEL-NEXT: extr x11, x14, x13, #63
+; GISEL-NEXT: stp x10, x8, [x0, #16]
+; GISEL-NEXT: asr x10, x15, #63
+; GISEL-NEXT: extr x8, x15, x14, #63
+; GISEL-NEXT: stp x9, x11, [x0, #32]
+; GISEL-NEXT: orr x9, x10, x10, lsl #1
; GISEL-NEXT: stp x8, x9, [x0, #48]
; GISEL-NEXT: ret
entry:
@@ -5906,23 +5796,17 @@ define void @test_shl_i512_const_65(ptr %result, ptr %input) {
; GISEL-NEXT: ldr x15, [x1, #48]
; GISEL-NEXT: ldp x10, x11, [x1, #16]
; GISEL-NEXT: ldp x12, x13, [x1, #32]
-; GISEL-NEXT: lsr x14, x8, #63
-; GISEL-NEXT: lsr x16, x9, #63
-; GISEL-NEXT: lsl x8, x8, #1
-; GISEL-NEXT: orr x9, x14, x9, lsl #1
-; GISEL-NEXT: lsr x14, x10, #63
-; GISEL-NEXT: orr x10, x16, x10, lsl #1
-; GISEL-NEXT: stp xzr, x8, [x0]
-; GISEL-NEXT: lsr x8, x11, #63
-; GISEL-NEXT: orr x11, x14, x11, lsl #1
-; GISEL-NEXT: lsr x14, x12, #63
-; GISEL-NEXT: stp x9, x10, [x0, #16]
-; GISEL-NEXT: lsr x9, x13, #63
-; GISEL-NEXT: orr x8, x8, x12, lsl #1
-; GISEL-NEXT: orr x10, x14, x13, lsl #1
-; GISEL-NEXT: orr x9, x9, x15, lsl #1
-; GISEL-NEXT: stp x11, x8, [x0, #32]
-; GISEL-NEXT: stp x10, x9, [x0, #48]
+; GISEL-NEXT: lsl x14, x8, #1
+; GISEL-NEXT: extr x8, x9, x8, #63
+; GISEL-NEXT: extr x9, x10, x9, #63
+; GISEL-NEXT: extr x10, x11, x10, #63
+; GISEL-NEXT: stp xzr, x14, [x0]
+; GISEL-NEXT: stp x8, x9, [x0, #16]
+; GISEL-NEXT: extr x8, x12, x11, #63
+; GISEL-NEXT: extr x9, x13, x12, #63
+; GISEL-NEXT: stp x10, x8, [x0, #32]
+; GISEL-NEXT: extr x10, x15, x13, #63
+; GISEL-NEXT: stp x9, x10, [x0, #48]
; GISEL-NEXT: ret
entry:
%input_val = load i512, ptr %input, align 64
@@ -5953,27 +5837,21 @@ define void @test_lshr_i512_const_65(ptr %result, ptr %input) {
;
; GISEL-LABEL: test_lshr_i512_const_65:
; GISEL: ; %bb.0: ; %entry
-; GISEL-NEXT: ldp x8, x9, [x1, #16]
-; GISEL-NEXT: ldr x10, [x1, #8]
-; GISEL-NEXT: ldp x11, x14, [x1, #32]
-; GISEL-NEXT: ldp x15, x16, [x1, #48]
-; GISEL-NEXT: lsl x12, x8, #63
-; GISEL-NEXT: lsl x13, x9, #63
-; GISEL-NEXT: orr x10, x12, x10, lsr #1
-; GISEL-NEXT: lsl x12, x11, #63
-; GISEL-NEXT: orr x8, x13, x8, lsr #1
-; GISEL-NEXT: lsl x13, x14, #63
-; GISEL-NEXT: orr x9, x12, x9, lsr #1
-; GISEL-NEXT: stp x10, x8, [x0]
-; GISEL-NEXT: lsl x10, x15, #63
-; GISEL-NEXT: orr x11, x13, x11, lsr #1
-; GISEL-NEXT: lsl x12, x16, #63
-; GISEL-NEXT: orr x8, x10, x14, lsr #1
-; GISEL-NEXT: lsr x10, x16, #1
-; GISEL-NEXT: stp x9, x11, [x0, #16]
-; GISEL-NEXT: orr x9, x12, x15, lsr #1
-; GISEL-NEXT: stp x10, xzr, [x0, #48]
-; GISEL-NEXT: stp x8, x9, [x0, #32]
+; GISEL-NEXT: ldp x8, x9, [x1, #8]
+; GISEL-NEXT: ldr x14, [x1, #56]
+; GISEL-NEXT: ldp x10, x11, [x1, #24]
+; GISEL-NEXT: ldp x12, x13, [x1, #40]
+; GISEL-NEXT: extr x8, x9, x8, #1
+; GISEL-NEXT: extr x9, x10, x9, #1
+; GISEL-NEXT: extr x10, x11, x10, #1
+; GISEL-NEXT: stp x8, x9, [x0]
+; GISEL-NEXT: extr x8, x12, x11, #1
+; GISEL-NEXT: extr x9, x13, x12, #1
+; GISEL-NEXT: stp x10, x8, [x0, #16]
+; GISEL-NEXT: extr x10, x14, x13, #1
+; GISEL-NEXT: lsr x8, x14, #1
+; GISEL-NEXT: stp x9, x10, [x0, #32]
+; GISEL-NEXT: stp x8, xzr, [x0, #48]
; GISEL-NEXT: ret
entry:
%input_val = load i512, ptr %input, align 64
@@ -6005,29 +5883,23 @@ define void @test_ashr_i512_const_65(ptr %result, ptr %input) {
;
; GISEL-LABEL: test_ashr_i512_const_65:
; GISEL: ; %bb.0: ; %entry
-; GISEL-NEXT: ldp x8, x9, [x1, #16]
-; GISEL-NEXT: ldr x11, [x1, #8]
-; GISEL-NEXT: ldp x10, x13, [x1, #32]
-; GISEL-NEXT: lsl x12, x8, #63
-; GISEL-NEXT: lsl x14, x9, #63
-; GISEL-NEXT: lsl x15, x10, #63
-; GISEL-NEXT: orr x11, x12, x11, lsr #1
-; GISEL-NEXT: ldp x12, x16, [x1, #48]
-; GISEL-NEXT: orr x8, x14, x8, lsr #1
-; GISEL-NEXT: lsl x14, x13, #63
-; GISEL-NEXT: orr x9, x15, x9, lsr #1
-; GISEL-NEXT: asr x15, x16, #63
-; GISEL-NEXT: stp x11, x8, [x0]
-; GISEL-NEXT: lsl x11, x12, #63
-; GISEL-NEXT: orr x10, x14, x10, lsr #1
-; GISEL-NEXT: lsl x14, x16, #63
-; GISEL-NEXT: orr x8, x11, x13, lsr #1
+; GISEL-NEXT: ldp x8, x9, [x1, #8]
+; GISEL-NEXT: ldr x13, [x1, #40]
+; GISEL-NEXT: ldp x10, x11, [x1, #24]
+; GISEL-NEXT: ldp x14, x12, [x1, #48]
+; GISEL-NEXT: extr x8, x9, x8, #1
+; GISEL-NEXT: extr x9, x10, x9, #1
+; GISEL-NEXT: extr x10, x11, x10, #1
+; GISEL-NEXT: asr x15, x12, #63
+; GISEL-NEXT: stp x8, x9, [x0]
+; GISEL-NEXT: extr x8, x13, x11, #1
+; GISEL-NEXT: extr x9, x14, x13, #1
; GISEL-NEXT: lsl x11, x15, #63
-; GISEL-NEXT: stp x9, x10, [x0, #16]
-; GISEL-NEXT: orr x9, x14, x12, lsr #1
-; GISEL-NEXT: orr x10, x11, x16, asr #1
-; GISEL-NEXT: stp x8, x9, [x0, #32]
-; GISEL-NEXT: stp x10, x15, [x0, #48]
+; GISEL-NEXT: stp x10, x8, [x0, #16]
+; GISEL-NEXT: extr x10, x12, x14, #1
+; GISEL-NEXT: orr x8, x11, x12, asr #1
+; GISEL-NEXT: stp x9, x10, [x0, #32]
+; GISEL-NEXT: stp x8, x15, [x0, #48]
; GISEL-NEXT: ret
entry:
%input_val = load i512, ptr %input, align 64
@@ -6062,23 +5934,17 @@ define void @test_shl_i512_const_100(ptr %result, ptr %input) {
; GISEL-NEXT: ldr x15, [x1, #48]
; GISEL-NEXT: ldp x10, x11, [x1, #16]
; GISEL-NEXT: ldp x12, x13, [x1, #32]
-; GISEL-NEXT: lsr x14, x8, #28
-; GISEL-NEXT: lsr x16, x9, #28
-; GISEL-NEXT: lsl x8, x8, #36
-; GISEL-NEXT: orr x9, x14, x9, lsl #36
-; GISEL-NEXT: lsr x14, x10, #28
-; GISEL-NEXT: orr x10, x16, x10, lsl #36
-; GISEL-NEXT: stp xzr, x8, [x0]
-; GISEL-NEXT: lsr x8, x11, #28
-; GISEL-NEXT: orr x11, x14, x11, lsl #36
-; GISEL-NEXT: lsr x14, x12, #28
-; GISEL-NEXT: stp x9, x10, [x0, #16]
-; GISEL-NEXT: lsr x9, x13, #28
-; GISEL-NEXT: orr x8, x8, x12, lsl #36
-; GISEL-NEXT: orr x10, x14, x13, lsl #36
-; GISEL-NEXT: orr x9, x9, x15, lsl #36
-; GISEL-NEXT: stp x11, x8, [x0, #32]
-; GISEL-NEXT: stp x10, x9, [x0, #48]
+; GISEL-NEXT: lsl x14, x8, #36
+; GISEL-NEXT: extr x8, x9, x8, #28
+; GISEL-NEXT: extr x9, x10, x9, #28
+; GISEL-NEXT: extr x10, x11, x10, #28
+; GISEL-NEXT: stp xzr, x14, [x0]
+; GISEL-NEXT: stp x8, x9, [x0, #16]
+; GISEL-NEXT: extr x8, x12, x11, #28
+; GISEL-NEXT: extr x9, x13, x12, #28
+; GISEL-NEXT: stp x10, x8, [x0, #32]
+; GISEL-NEXT: extr x10, x15, x13, #28
+; GISEL-NEXT: stp x9, x10, [x0, #48]
; GISEL-NEXT: ret
entry:
%input_val = load i512, ptr %input, align 64
@@ -6109,27 +5975,21 @@ define void @test_lshr_i512_const_100(ptr %result, ptr %input) {
;
; GISEL-LABEL: test_lshr_i512_const_100:
; GISEL: ; %bb.0: ; %entry
-; GISEL-NEXT: ldp x8, x9, [x1, #16]
-; GISEL-NEXT: ldr x10, [x1, #8]
-; GISEL-NEXT: ldp x11, x14, [x1, #32]
-; GISEL-NEXT: ldp x15, x16, [x1, #48]
-; GISEL-NEXT: lsl x12, x8, #28
-; GISEL-NEXT: lsl x13, x9, #28
-; GISEL-NEXT: orr x10, x12, x10, lsr #36
-; GISEL-NEXT: lsl x12, x11, #28
-; GISEL-NEXT: orr x8, x13, x8, lsr #36
-; GISEL-NEXT: lsl x13, x14, #28
-; GISEL-NEXT: orr x9, x12, x9, lsr #36
-; GISEL-NEXT: stp x10, x8, [x0]
-; GISEL-NEXT: lsl x10, x15, #28
-; GISEL-NEXT: orr x11, x13, x11, lsr #36
-; GISEL-NEXT: lsl x12, x16, #28
-; GISEL-NEXT: orr x8, x10, x14, lsr #36
-; GISEL-NEXT: lsr x10, x16, #36
-; GISEL-NEXT: stp x9, x11, [x0, #16]
-; GISEL-NEXT: orr x9, x12, x15, lsr #36
-; GISEL-NEXT: stp x10, xzr, [x0, #48]
-; GISEL-NEXT: stp x8, x9, [x0, #32]
+; GISEL-NEXT: ldp x8, x9, [x1, #8]
+; GISEL-NEXT: ldr x14, [x1, #56]
+; GISEL-NEXT: ldp x10, x11, [x1, #24]
+; GISEL-NEXT: ldp x12, x13, [x1, #40]
+; GISEL-NEXT: extr x8, x9, x8, #36
+; GISEL-NEXT: extr x9, x10, x9, #36
+; GISEL-NEXT: extr x10, x11, x10, #36
+; GISEL-NEXT: stp x8, x9, [x0]
+; GISEL-NEXT: extr x8, x12, x11, #36
+; GISEL-NEXT: extr x9, x13, x12, #36
+; GISEL-NEXT: stp x10, x8, [x0, #16]
+; GISEL-NEXT: extr x10, x14, x13, #36
+; GISEL-NEXT: lsr x8, x14, #36
+; GISEL-NEXT: stp x9, x10, [x0, #32]
+; GISEL-NEXT: stp x8, xzr, [x0, #48]
; GISEL-NEXT: ret
entry:
%input_val = load i512, ptr %input, align 64
@@ -6161,29 +6021,23 @@ define void @test_ashr_i512_const_100(ptr %result, ptr %input) {
;
; GISEL-LABEL: test_ashr_i512_const_100:
; GISEL: ; %bb.0: ; %entry
-; GISEL-NEXT: ldp x8, x9, [x1, #16]
-; GISEL-NEXT: ldr x11, [x1, #8]
-; GISEL-NEXT: ldp x10, x13, [x1, #32]
-; GISEL-NEXT: lsl x12, x8, #28
-; GISEL-NEXT: lsl x14, x9, #28
-; GISEL-NEXT: lsl x15, x10, #28
-; GISEL-NEXT: orr x11, x12, x11, lsr #36
-; GISEL-NEXT: ldp x12, x16, [x1, #48]
-; GISEL-NEXT: orr x8, x14, x8, lsr #36
-; GISEL-NEXT: lsl x14, x13, #28
-; GISEL-NEXT: orr x9, x15, x9, lsr #36
-; GISEL-NEXT: asr x15, x16, #63
-; GISEL-NEXT: stp x11, x8, [x0]
-; GISEL-NEXT: lsl x11, x12, #28
-; GISEL-NEXT: orr x10, x14, x10, lsr #36
-; GISEL-NEXT: lsl x14, x16, #28
-; GISEL-NEXT: orr x8, x11, x13, lsr #36
+; GISEL-NEXT: ldp x8, x9, [x1, #8]
+; GISEL-NEXT: ldr x13, [x1, #40]
+; GISEL-NEXT: ldp x10, x11, [x1, #24]
+; GISEL-NEXT: ldp x14, x12, [x1, #48]
+; GISEL-NEXT: extr x8, x9, x8, #36
+; GISEL-NEXT: extr x9, x10, x9, #36
+; GISEL-NEXT: extr x10, x11, x10, #36
+; GISEL-NEXT: asr x15, x12, #63
+; GISEL-NEXT: stp x8, x9, [x0]
+; GISEL-NEXT: extr x8, x13, x11, #36
+; GISEL-NEXT: extr x9, x14, x13, #36
; GISEL-NEXT: lsl x11, x15, #28
-; GISEL-NEXT: stp x9, x10, [x0, #16]
-; GISEL-NEXT: orr x9, x14, x12, lsr #36
-; GISEL-NEXT: orr x10, x11, x16, asr #36
-; GISEL-NEXT: stp x8, x9, [x0, #32]
-; GISEL-NEXT: stp x10, x15, [x0, #48]
+; GISEL-NEXT: stp x10, x8, [x0, #16]
+; GISEL-NEXT: extr x10, x12, x14, #36
+; GISEL-NEXT: orr x8, x11, x12, asr #36
+; GISEL-NEXT: stp x9, x10, [x0, #32]
+; GISEL-NEXT: stp x8, x15, [x0, #48]
; GISEL-NEXT: ret
entry:
%input_val = load i512, ptr %input, align 64
@@ -6219,23 +6073,17 @@ define void @test_shl_i512_const_127(ptr %result, ptr %input) {
; GISEL-NEXT: ldr x15, [x1, #48]
; GISEL-NEXT: ldp x10, x11, [x1, #16]
; GISEL-NEXT: ldp x12, x13, [x1, #32]
-; GISEL-NEXT: lsr x14, x8, #1
-; GISEL-NEXT: lsr x16, x9, #1
-; GISEL-NEXT: lsl x8, x8, #63
-; GISEL-NEXT: orr x9, x14, x9, lsl #63
-; GISEL-NEXT: lsr x14, x10, #1
-; GISEL-NEXT: orr x10, x16, x10, lsl #63
-; GISEL-NEXT: stp xzr, x8, [x0]
-; GISEL-NEXT: lsr x8, x11, #1
-; GISEL-NEXT: orr x11, x14, x11, lsl #63
-; GISEL-NEXT: lsr x14, x12, #1
-; GISEL-NEXT: stp x9, x10, [x0, #16]
-; GISEL-NEXT: lsr x9, x13, #1
-; GISEL-NEXT: orr x8, x8, x12, lsl #63
-; GISEL-NEXT: orr x10, x14, x13, lsl #63
-; GISEL-NEXT: orr x9, x9, x15, lsl #63
-; GISEL-NEXT: stp x11, x8, [x0, #32]
-; GISEL-NEXT: stp x10, x9, [x0, #48]
+; GISEL-NEXT: lsl x14, x8, #63
+; GISEL-NEXT: extr x8, x9, x8, #1
+; GISEL-NEXT: extr x9, x10, x9, #1
+; GISEL-NEXT: extr x10, x11, x10, #1
+; GISEL-NEXT: stp xzr, x14, [x0]
+; GISEL-NEXT: stp x8, x9, [x0, #16]
+; GISEL-NEXT: extr x8, x12, x11, #1
+; GISEL-NEXT: extr x9, x13, x12, #1
+; GISEL-NEXT: stp x10, x8, [x0, #32]
+; GISEL-NEXT: extr x10, x15, x13, #1
+; GISEL-NEXT: stp x9, x10, [x0, #48]
; GISEL-NEXT: ret
entry:
%input_val = load i512, ptr %input, align 64
@@ -6266,27 +6114,21 @@ define void @test_lshr_i512_const_127(ptr %result, ptr %input) {
;
; GISEL-LABEL: test_lshr_i512_const_127:
; GISEL: ; %bb.0: ; %entry
-; GISEL-NEXT: ldp x8, x9, [x1, #16]
-; GISEL-NEXT: ldr x10, [x1, #8]
-; GISEL-NEXT: ldp x11, x14, [x1, #32]
-; GISEL-NEXT: ldp x15, x16, [x1, #48]
-; GISEL-NEXT: lsl x12, x8, #1
-; GISEL-NEXT: lsl x13, x9, #1
-; GISEL-NEXT: orr x10, x12, x10, lsr #63
-; GISEL-NEXT: lsl x12, x11, #1
-; GISEL-NEXT: orr x8, x13, x8, lsr #63
-; GISEL-NEXT: lsl x13, x14, #1
-; GISEL-NEXT: orr x9, x12, x9, lsr #63
-; GISEL-NEXT: stp x10, x8, [x0]
-; GISEL-NEXT: lsl x10, x15, #1
-; GISEL-NEXT: orr x11, x13, x11, lsr #63
-; GISEL-NEXT: lsl x12, x16, #1
-; GISEL-NEXT: orr x8, x10, x14, lsr #63
-; GISEL-NEXT: lsr x10, x16, #63
-; GISEL-NEXT: stp x9, x11, [x0, #16]
-; GISEL-NEXT: orr x9, x12, x15, lsr #63
-; GISEL-NEXT: stp x10, xzr, [x0, #48]
-; GISEL-NEXT: stp x8, x9, [x0, #32]
+; GISEL-NEXT: ldp x8, x9, [x1, #8]
+; GISEL-NEXT: ldr x14, [x1, #56]
+; GISEL-NEXT: ldp x10, x11, [x1, #24]
+; GISEL-NEXT: ldp x12, x13, [x1, #40]
+; GISEL-NEXT: extr x8, x9, x8, #63
+; GISEL-NEXT: extr x9, x10, x9, #63
+; GISEL-NEXT: extr x10, x11, x10, #63
+; GISEL-NEXT: stp x8, x9, [x0]
+; GISEL-NEXT: extr x8, x12, x11, #63
+; GISEL-NEXT: extr x9, x13, x12, #63
+; GISEL-NEXT: stp x10, x8, [x0, #16]
+; GISEL-NEXT: extr x10, x14, x13, #63
+; GISEL-NEXT: lsr x8, x14, #63
+; GISEL-NEXT: stp x9, x10, [x0, #32]
+; GISEL-NEXT: stp x8, xzr, [x0, #48]
; GISEL-NEXT: ret
entry:
%input_val = load i512, ptr %input, align 64
@@ -6317,28 +6159,22 @@ define void @test_ashr_i512_const_127(ptr %result, ptr %input) {
;
; GISEL-LABEL: test_ashr_i512_const_127:
; GISEL: ; %bb.0: ; %entry
-; GISEL-NEXT: ldp x8, x9, [x1, #16]
-; GISEL-NEXT: ldr x10, [x1, #8]
-; GISEL-NEXT: ldp x11, x14, [x1, #32]
-; GISEL-NEXT: ldp x15, x16, [x1, #48]
-; GISEL-NEXT: lsl x12, x8, #1
-; GISEL-NEXT: lsl x13, x9, #1
-; GISEL-NEXT: orr x10, x12, x10, lsr #63
-; GISEL-NEXT: lsl x12, x11, #1
-; GISEL-NEXT: orr x8, x13, x8, lsr #63
-; GISEL-NEXT: lsl x13, x14, #1
-; GISEL-NEXT: orr x9, x12, x9, lsr #63
-; GISEL-NEXT: lsl x12, x15, #1
-; GISEL-NEXT: stp x10, x8, [x0]
-; GISEL-NEXT: lsl x10, x16, #1
-; GISEL-NEXT: orr x11, x13, x11, lsr #63
-; GISEL-NEXT: asr x8, x16, #63
-; GISEL-NEXT: orr x12, x12, x14, lsr #63
-; GISEL-NEXT: stp x9, x11, [x0, #16]
-; GISEL-NEXT: orr x9, x10, x15, lsr #63
-; GISEL-NEXT: orr x10, x8, x8, lsl #1
-; GISEL-NEXT: stp x12, x9, [x0, #32]
-; GISEL-NEXT: stp x10, x8, [x0, #48]
+; GISEL-NEXT: ldp x8, x9, [x1, #8]
+; GISEL-NEXT: ldr x14, [x1, #56]
+; GISEL-NEXT: ldp x10, x11, [x1, #24]
+; GISEL-NEXT: ldp x12, x13, [x1, #40]
+; GISEL-NEXT: extr x8, x9, x8, #63
+; GISEL-NEXT: extr x9, x10, x9, #63
+; GISEL-NEXT: extr x10, x11, x10, #63
+; GISEL-NEXT: stp x8, x9, [x0]
+; GISEL-NEXT: extr x8, x12, x11, #63
+; GISEL-NEXT: asr x9, x14, #63
+; GISEL-NEXT: extr x11, x13, x12, #63
+; GISEL-NEXT: stp x10, x8, [x0, #16]
+; GISEL-NEXT: extr x10, x14, x13, #63
+; GISEL-NEXT: orr x8, x9, x9, lsl #1
+; GISEL-NEXT: stp x11, x10, [x0, #32]
+; GISEL-NEXT: stp x8, x9, [x0, #48]
; GISEL-NEXT: ret
entry:
%input_val = load i512, ptr %input, align 64
diff --git a/llvm/test/CodeGen/AArch64/adc.ll b/llvm/test/CodeGen/AArch64/adc.ll
index 12e8bf26c9eac..03f3cf192102d 100644
--- a/llvm/test/CodeGen/AArch64/adc.ll
+++ b/llvm/test/CodeGen/AArch64/adc.ll
@@ -71,9 +71,8 @@ define i128 @test_shifted(i128 %a, i128 %b) {
;
; CHECK-GI-LABEL: test_shifted:
; CHECK-GI: ; %bb.0:
-; CHECK-GI-NEXT: lsr x8, x2, #19
+; CHECK-GI-NEXT: extr x8, x3, x2, #19
; CHECK-GI-NEXT: adds x0, x0, x2, lsl #45
-; CHECK-GI-NEXT: orr x8, x8, x3, lsl #45
; CHECK-GI-NEXT: adc x1, x1, x8
; CHECK-GI-NEXT: ret
%rhs = shl i128 %b, 45
@@ -108,8 +107,7 @@ define i128 @test_extended(i128 %a, i16 %b) {
; CHECK-GI-NEXT: sxth x8, w2
; CHECK-GI-NEXT: adds x0, x0, w2, sxth #3
; CHECK-GI-NEXT: asr x9, x8, #63
-; CHECK-GI-NEXT: lsr x8, x8, #61
-; CHECK-GI-NEXT: orr x8, x8, x9, lsl #3
+; CHECK-GI-NEXT: extr x8, x9, x8, #61
; CHECK-GI-NEXT: adc x1, x1, x8
; CHECK-GI-NEXT: ret
%ext = sext i16 %b to i128
diff --git a/llvm/test/CodeGen/AArch64/fsh.ll b/llvm/test/CodeGen/AArch64/fsh.ll
index 765f6b77b41a9..7f07ef476b8aa 100644
--- a/llvm/test/CodeGen/AArch64/fsh.ll
+++ b/llvm/test/CodeGen/AArch64/fsh.ll
@@ -510,41 +510,40 @@ define i128 @fshl_i128(i128 %a, i128 %b, i128 %c) {
;
; CHECK-GI-LABEL: fshl_i128:
; CHECK-GI: // %bb.0: // %entry
+; CHECK-GI-NEXT: mov w8, #64 // =0x40
; CHECK-GI-NEXT: and x9, x4, #0x7f
-; CHECK-GI-NEXT: mov w10, #64 // =0x40
-; CHECK-GI-NEXT: lsl x14, x3, #63
-; CHECK-GI-NEXT: sub x12, x10, x9
+; CHECK-GI-NEXT: mov w10, #127 // =0x7f
+; CHECK-GI-NEXT: sub x12, x8, x9
; CHECK-GI-NEXT: lsl x13, x1, x9
-; CHECK-GI-NEXT: mov w8, #127 // =0x7f
+; CHECK-GI-NEXT: bic x10, x10, x4
; CHECK-GI-NEXT: lsr x12, x0, x12
-; CHECK-GI-NEXT: bic x8, x8, x4
-; CHECK-GI-NEXT: sub x15, x9, #64
+; CHECK-GI-NEXT: sub x14, x9, #64
+; CHECK-GI-NEXT: lsl x15, x0, x9
+; CHECK-GI-NEXT: extr x16, x3, x2, #1
; CHECK-GI-NEXT: cmp x9, #64
-; CHECK-GI-NEXT: lsl x9, x0, x9
-; CHECK-GI-NEXT: lsl x15, x0, x15
-; CHECK-GI-NEXT: orr x12, x12, x13
-; CHECK-GI-NEXT: orr x13, x14, x2, lsr #1
-; CHECK-GI-NEXT: lsr x14, x3, #1
-; CHECK-GI-NEXT: sub x10, x10, x8
-; CHECK-GI-NEXT: sub x16, x8, #64
-; CHECK-GI-NEXT: csel x9, x9, xzr, lo
-; CHECK-GI-NEXT: lsr x17, x13, x8
-; CHECK-GI-NEXT: lsl x10, x14, x10
-; CHECK-GI-NEXT: csel x12, x12, x15, lo
+; CHECK-GI-NEXT: sub x8, x8, x10
+; CHECK-GI-NEXT: orr x9, x12, x13
+; CHECK-GI-NEXT: lsr x12, x3, #1
+; CHECK-GI-NEXT: lsl x13, x0, x14
+; CHECK-GI-NEXT: csel x14, x15, xzr, lo
+; CHECK-GI-NEXT: sub x15, x10, #64
+; CHECK-GI-NEXT: lsr x17, x16, x10
+; CHECK-GI-NEXT: lsl x8, x12, x8
+; CHECK-GI-NEXT: csel x9, x9, x13, lo
; CHECK-GI-NEXT: tst x4, #0x7f
-; CHECK-GI-NEXT: lsr x15, x14, x16
+; CHECK-GI-NEXT: lsr x13, x12, x15
; CHECK-GI-NEXT: mvn x11, x4
-; CHECK-GI-NEXT: csel x12, x1, x12, eq
-; CHECK-GI-NEXT: orr x10, x17, x10
-; CHECK-GI-NEXT: cmp x8, #64
-; CHECK-GI-NEXT: lsr x14, x14, x8
-; CHECK-GI-NEXT: csel x10, x10, x15, lo
+; CHECK-GI-NEXT: csel x9, x1, x9, eq
+; CHECK-GI-NEXT: orr x8, x17, x8
+; CHECK-GI-NEXT: cmp x10, #64
+; CHECK-GI-NEXT: lsr x12, x12, x10
+; CHECK-GI-NEXT: csel x8, x8, x13, lo
; CHECK-GI-NEXT: tst x11, #0x7f
-; CHECK-GI-NEXT: csel x10, x13, x10, eq
-; CHECK-GI-NEXT: cmp x8, #64
-; CHECK-GI-NEXT: csel x8, x14, xzr, lo
-; CHECK-GI-NEXT: orr x0, x9, x10
-; CHECK-GI-NEXT: orr x1, x12, x8
+; CHECK-GI-NEXT: csel x8, x16, x8, eq
+; CHECK-GI-NEXT: cmp x10, #64
+; CHECK-GI-NEXT: csel x10, x12, xzr, lo
+; CHECK-GI-NEXT: orr x0, x14, x8
+; CHECK-GI-NEXT: orr x1, x9, x10
; CHECK-GI-NEXT: ret
entry:
%d = call i128 @llvm.fshl(i128 %a, i128 %b, i128 %c)
@@ -571,41 +570,40 @@ define i128 @fshr_i128(i128 %a, i128 %b, i128 %c) {
;
; CHECK-GI-LABEL: fshr_i128:
; CHECK-GI: // %bb.0: // %entry
-; CHECK-GI-NEXT: lsr x8, x0, #63
-; CHECK-GI-NEXT: mov w9, #127 // =0x7f
-; CHECK-GI-NEXT: mov w10, #64 // =0x40
-; CHECK-GI-NEXT: bic x9, x9, x4
-; CHECK-GI-NEXT: lsl x11, x0, #1
-; CHECK-GI-NEXT: and x12, x4, #0x7f
-; CHECK-GI-NEXT: orr x8, x8, x1, lsl #1
-; CHECK-GI-NEXT: sub x14, x10, x9
-; CHECK-GI-NEXT: sub x17, x9, #64
-; CHECK-GI-NEXT: lsl x15, x11, x9
-; CHECK-GI-NEXT: lsr x14, x11, x14
-; CHECK-GI-NEXT: cmp x9, #64
-; CHECK-GI-NEXT: lsl x16, x8, x9
-; CHECK-GI-NEXT: sub x9, x10, x12
-; CHECK-GI-NEXT: lsl x10, x11, x17
-; CHECK-GI-NEXT: mvn x13, x4
-; CHECK-GI-NEXT: csel x11, x15, xzr, lo
-; CHECK-GI-NEXT: sub x15, x12, #64
-; CHECK-GI-NEXT: orr x14, x14, x16
-; CHECK-GI-NEXT: lsr x16, x2, x12
-; CHECK-GI-NEXT: lsl x9, x3, x9
-; CHECK-GI-NEXT: csel x10, x14, x10, lo
-; CHECK-GI-NEXT: tst x13, #0x7f
-; CHECK-GI-NEXT: lsr x13, x3, x15
-; CHECK-GI-NEXT: csel x8, x8, x10, eq
-; CHECK-GI-NEXT: orr x9, x16, x9
-; CHECK-GI-NEXT: cmp x12, #64
-; CHECK-GI-NEXT: lsr x10, x3, x12
-; CHECK-GI-NEXT: csel x9, x9, x13, lo
+; CHECK-GI-NEXT: mov w8, #127 // =0x7f
+; CHECK-GI-NEXT: lsl x9, x0, #1
+; CHECK-GI-NEXT: extr x10, x1, x0, #63
+; CHECK-GI-NEXT: bic x8, x8, x4
+; CHECK-GI-NEXT: mov w11, #64 // =0x40
+; CHECK-GI-NEXT: and x14, x4, #0x7f
+; CHECK-GI-NEXT: sub x12, x11, x8
+; CHECK-GI-NEXT: lsl x13, x10, x8
+; CHECK-GI-NEXT: lsl x16, x9, x8
+; CHECK-GI-NEXT: lsr x12, x9, x12
+; CHECK-GI-NEXT: sub x17, x8, #64
+; CHECK-GI-NEXT: cmp x8, #64
+; CHECK-GI-NEXT: lsl x8, x9, x17
+; CHECK-GI-NEXT: sub x11, x11, x14
+; CHECK-GI-NEXT: mvn x15, x4
+; CHECK-GI-NEXT: orr x12, x12, x13
+; CHECK-GI-NEXT: csel x9, x16, xzr, lo
+; CHECK-GI-NEXT: sub x13, x14, #64
+; CHECK-GI-NEXT: lsr x16, x2, x14
+; CHECK-GI-NEXT: lsl x11, x3, x11
+; CHECK-GI-NEXT: csel x8, x12, x8, lo
+; CHECK-GI-NEXT: tst x15, #0x7f
+; CHECK-GI-NEXT: lsr x12, x3, x13
+; CHECK-GI-NEXT: csel x8, x10, x8, eq
+; CHECK-GI-NEXT: orr x10, x16, x11
+; CHECK-GI-NEXT: cmp x14, #64
+; CHECK-GI-NEXT: lsr x11, x3, x14
+; CHECK-GI-NEXT: csel x10, x10, x12, lo
; CHECK-GI-NEXT: tst x4, #0x7f
-; CHECK-GI-NEXT: csel x9, x2, x9, eq
-; CHECK-GI-NEXT: cmp x12, #64
-; CHECK-GI-NEXT: csel x10, x10, xzr, lo
-; CHECK-GI-NEXT: orr x0, x11, x9
-; CHECK-GI-NEXT: orr x1, x8, x10
+; CHECK-GI-NEXT: csel x10, x2, x10, eq
+; CHECK-GI-NEXT: cmp x14, #64
+; CHECK-GI-NEXT: csel x11, x11, xzr, lo
+; CHECK-GI-NEXT: orr x0, x9, x10
+; CHECK-GI-NEXT: orr x1, x8, x11
; CHECK-GI-NEXT: ret
entry:
%d = call i128 @llvm.fshr(i128 %a, i128 %b, i128 %c)
@@ -720,10 +718,9 @@ define i128 @rotl_i128_c(i128 %a) {
;
; CHECK-GI-LABEL: rotl_i128_c:
; CHECK-GI: // %bb.0: // %entry
-; CHECK-GI-NEXT: lsr x8, x0, #61
-; CHECK-GI-NEXT: lsr x9, x1, #61
-; CHECK-GI-NEXT: orr x1, x8, x1, lsl #3
-; CHECK-GI-NEXT: orr x0, x9, x0, lsl #3
+; CHECK-GI-NEXT: extr x8, x1, x0, #61
+; CHECK-GI-NEXT: extr x0, x0, x1, #61
+; CHECK-GI-NEXT: mov x1, x8
; CHECK-GI-NEXT: ret
entry:
%d = call i128 @llvm.fshl(i128 %a, i128 %a, i128 3)
@@ -731,20 +728,12 @@ entry:
}
define i128 @rotr_i128_c(i128 %a) {
-; CHECK-SD-LABEL: rotr_i128_c:
-; CHECK-SD: // %bb.0: // %entry
-; CHECK-SD-NEXT: extr x8, x1, x0, #3
-; CHECK-SD-NEXT: extr x1, x0, x1, #3
-; CHECK-SD-NEXT: mov x0, x8
-; CHECK-SD-NEXT: ret
-;
-; CHECK-GI-LABEL: rotr_i128_c:
-; CHECK-GI: // %bb.0: // %entry
-; CHECK-GI-NEXT: lsl x8, x1, #61
-; CHECK-GI-NEXT: lsl x9, x0, #61
-; CHECK-GI-NEXT: orr x0, x8, x0, lsr #3
-; CHECK-GI-NEXT: orr x1, x9, x1, lsr #3
-; CHECK-GI-NEXT: ret
+; CHECK-LABEL: rotr_i128_c:
+; CHECK: // %bb.0: // %entry
+; CHECK-NEXT: extr x8, x1, x0, #3
+; CHECK-NEXT: extr x1, x0, x1, #3
+; CHECK-NEXT: mov x0, x8
+; CHECK-NEXT: ret
entry:
%d = call i128 @llvm.fshr(i128 %a, i128 %a, i128 3)
ret i128 %d
@@ -868,10 +857,8 @@ define i128 @fshl_i128_c(i128 %a, i128 %b) {
;
; CHECK-GI-LABEL: fshl_i128_c:
; CHECK-GI: // %bb.0: // %entry
-; CHECK-GI-NEXT: lsr x8, x0, #61
-; CHECK-GI-NEXT: lsr x9, x3, #61
-; CHECK-GI-NEXT: orr x1, x8, x1, lsl #3
-; CHECK-GI-NEXT: orr x0, x9, x0, lsl #3
+; CHECK-GI-NEXT: extr x1, x1, x0, #61
+; CHECK-GI-NEXT: extr x0, x0, x3, #61
; CHECK-GI-NEXT: ret
entry:
%d = call i128 @llvm.fshl(i128 %a, i128 %b, i128 3)
@@ -879,21 +866,12 @@ entry:
}
define i128 @fshr_i128_c(i128 %a, i128 %b) {
-; CHECK-SD-LABEL: fshr_i128_c:
-; CHECK-SD: // %bb.0: // %entry
-; CHECK-SD-NEXT: extr x8, x3, x2, #3
-; CHECK-SD-NEXT: extr x1, x0, x3, #3
-; CHECK-SD-NEXT: mov x0, x8
-; CHECK-SD-NEXT: ret
-;
-; CHECK-GI-LABEL: fshr_i128_c:
-; CHECK-GI: // %bb.0: // %entry
-; CHECK-GI-NEXT: lsl x8, x3, #61
-; CHECK-GI-NEXT: lsr x9, x3, #3
-; CHECK-GI-NEXT: orr x8, x8, x2, lsr #3
-; CHECK-GI-NEXT: orr x1, x9, x0, lsl #61
-; CHECK-GI-NEXT: mov x0, x8
-; CHECK-GI-NEXT: ret
+; CHECK-LABEL: fshr_i128_c:
+; CHECK: // %bb.0: // %entry
+; CHECK-NEXT: extr x8, x3, x2, #3
+; CHECK-NEXT: extr x1, x0, x3, #3
+; CHECK-NEXT: mov x0, x8
+; CHECK-NEXT: ret
entry:
%d = call i128 @llvm.fshr(i128 %a, i128 %b, i128 3)
ret i128 %d
@@ -3013,75 +2991,73 @@ define <2 x i128> @fshl_v2i128(<2 x i128> %a, <2 x i128> %b, <2 x i128> %c) {
; CHECK-GI-NEXT: .cfi_def_cfa_offset 16
; CHECK-GI-NEXT: .cfi_offset w19, -16
; CHECK-GI-NEXT: ldr x11, [sp, #16]
-; CHECK-GI-NEXT: mov w10, #64 // =0x40
+; CHECK-GI-NEXT: mov w9, #64 // =0x40
; CHECK-GI-NEXT: ldr x12, [sp, #32]
; CHECK-GI-NEXT: mov w13, #127 // =0x7f
-; CHECK-GI-NEXT: and x9, x11, #0x7f
+; CHECK-GI-NEXT: and x8, x11, #0x7f
; CHECK-GI-NEXT: and x14, x12, #0x7f
-; CHECK-GI-NEXT: mvn x15, x11
-; CHECK-GI-NEXT: sub x8, x10, x9
-; CHECK-GI-NEXT: sub x16, x9, #64
-; CHECK-GI-NEXT: lsl x19, x1, x9
-; CHECK-GI-NEXT: lsr x18, x0, x8
-; CHECK-GI-NEXT: lsl x17, x0, x9
-; CHECK-GI-NEXT: lsl x16, x0, x16
-; CHECK-GI-NEXT: cmp x9, #64
-; CHECK-GI-NEXT: bic x0, x13, x11
-; CHECK-GI-NEXT: mvn x8, x12
-; CHECK-GI-NEXT: orr x18, x18, x19
-; CHECK-GI-NEXT: csel x9, x17, xzr, lo
+; CHECK-GI-NEXT: mvn x18, x11
+; CHECK-GI-NEXT: sub x10, x9, x8
+; CHECK-GI-NEXT: sub x15, x8, #64
+; CHECK-GI-NEXT: lsl x17, x1, x8
+; CHECK-GI-NEXT: lsr x16, x0, x10
+; CHECK-GI-NEXT: lsl x15, x0, x15
+; CHECK-GI-NEXT: cmp x8, #64
+; CHECK-GI-NEXT: lsl x19, x0, x8
+; CHECK-GI-NEXT: lsl x0, x3, x14
+; CHECK-GI-NEXT: mvn x10, x12
+; CHECK-GI-NEXT: orr x16, x16, x17
; CHECK-GI-NEXT: sub x17, x14, #64
-; CHECK-GI-NEXT: csel x16, x18, x16, lo
+; CHECK-GI-NEXT: csel x15, x16, x15, lo
+; CHECK-GI-NEXT: sub x16, x9, x14
+; CHECK-GI-NEXT: csel x8, x19, xzr, lo
+; CHECK-GI-NEXT: lsr x16, x2, x16
; CHECK-GI-NEXT: tst x11, #0x7f
-; CHECK-GI-NEXT: sub x11, x10, x14
-; CHECK-GI-NEXT: lsr x11, x2, x11
-; CHECK-GI-NEXT: lsl x18, x3, x14
-; CHECK-GI-NEXT: csel x16, x1, x16, eq
-; CHECK-GI-NEXT: lsl x1, x2, x14
+; CHECK-GI-NEXT: lsl x19, x2, x14
; CHECK-GI-NEXT: lsl x17, x2, x17
+; CHECK-GI-NEXT: csel x15, x1, x15, eq
; CHECK-GI-NEXT: cmp x14, #64
-; CHECK-GI-NEXT: lsl x14, x5, #63
-; CHECK-GI-NEXT: orr x11, x11, x18
-; CHECK-GI-NEXT: bic x13, x13, x12
-; CHECK-GI-NEXT: csel x18, x1, xzr, lo
-; CHECK-GI-NEXT: csel x11, x11, x17, lo
+; CHECK-GI-NEXT: orr x16, x16, x0
+; CHECK-GI-NEXT: bic x11, x13, x11
+; CHECK-GI-NEXT: csel x14, x19, xzr, lo
+; CHECK-GI-NEXT: csel x16, x16, x17, lo
; CHECK-GI-NEXT: tst x12, #0x7f
-; CHECK-GI-NEXT: lsr x12, x5, #1
-; CHECK-GI-NEXT: orr x14, x14, x4, lsr #1
-; CHECK-GI-NEXT: lsl x17, x7, #63
-; CHECK-GI-NEXT: sub x1, x10, x0
-; CHECK-GI-NEXT: csel x11, x3, x11, eq
-; CHECK-GI-NEXT: sub x2, x0, #64
-; CHECK-GI-NEXT: lsr x3, x14, x0
-; CHECK-GI-NEXT: lsl x1, x12, x1
-; CHECK-GI-NEXT: lsr x4, x7, #1
-; CHECK-GI-NEXT: orr x17, x17, x6, lsr #1
-; CHECK-GI-NEXT: lsr x2, x12, x2
-; CHECK-GI-NEXT: cmp x0, #64
-; CHECK-GI-NEXT: orr x1, x3, x1
-; CHECK-GI-NEXT: sub x10, x10, x13
-; CHECK-GI-NEXT: lsr x12, x12, x0
-; CHECK-GI-NEXT: csel x1, x1, x2, lo
-; CHECK-GI-NEXT: tst x15, #0x7f
-; CHECK-GI-NEXT: sub x15, x13, #64
-; CHECK-GI-NEXT: lsr x2, x17, x13
-; CHECK-GI-NEXT: lsl x10, x4, x10
-; CHECK-GI-NEXT: csel x14, x14, x1, eq
-; CHECK-GI-NEXT: cmp x0, #64
-; CHECK-GI-NEXT: lsr x15, x4, x15
-; CHECK-GI-NEXT: lsr x0, x4, x13
-; CHECK-GI-NEXT: csel x12, x12, xzr, lo
-; CHECK-GI-NEXT: orr x10, x2, x10
-; CHECK-GI-NEXT: cmp x13, #64
-; CHECK-GI-NEXT: csel x10, x10, x15, lo
-; CHECK-GI-NEXT: tst x8, #0x7f
-; CHECK-GI-NEXT: orr x1, x16, x12
-; CHECK-GI-NEXT: csel x8, x17, x10, eq
-; CHECK-GI-NEXT: cmp x13, #64
-; CHECK-GI-NEXT: csel x10, x0, xzr, lo
-; CHECK-GI-NEXT: orr x0, x9, x14
-; CHECK-GI-NEXT: orr x2, x18, x8
-; CHECK-GI-NEXT: orr x3, x11, x10
+; CHECK-GI-NEXT: lsr x17, x5, #1
+; CHECK-GI-NEXT: extr x0, x5, x4, #1
+; CHECK-GI-NEXT: bic x12, x13, x12
+; CHECK-GI-NEXT: csel x13, x3, x16, eq
+; CHECK-GI-NEXT: sub x16, x9, x11
+; CHECK-GI-NEXT: sub x1, x11, #64
+; CHECK-GI-NEXT: lsr x3, x7, #1
+; CHECK-GI-NEXT: lsr x2, x0, x11
+; CHECK-GI-NEXT: lsl x16, x17, x16
+; CHECK-GI-NEXT: extr x4, x7, x6, #1
+; CHECK-GI-NEXT: lsr x1, x17, x1
+; CHECK-GI-NEXT: cmp x11, #64
+; CHECK-GI-NEXT: sub x9, x9, x12
+; CHECK-GI-NEXT: orr x16, x2, x16
+; CHECK-GI-NEXT: lsr x17, x17, x11
+; CHECK-GI-NEXT: lsl x9, x3, x9
+; CHECK-GI-NEXT: csel x16, x16, x1, lo
+; CHECK-GI-NEXT: tst x18, #0x7f
+; CHECK-GI-NEXT: sub x18, x12, #64
+; CHECK-GI-NEXT: lsr x1, x4, x12
+; CHECK-GI-NEXT: csel x16, x0, x16, eq
+; CHECK-GI-NEXT: cmp x11, #64
+; CHECK-GI-NEXT: lsr x11, x3, x18
+; CHECK-GI-NEXT: csel x17, x17, xzr, lo
+; CHECK-GI-NEXT: cmp x12, #64
+; CHECK-GI-NEXT: orr x9, x1, x9
+; CHECK-GI-NEXT: lsr x18, x3, x12
+; CHECK-GI-NEXT: orr x0, x8, x16
+; CHECK-GI-NEXT: csel x9, x9, x11, lo
+; CHECK-GI-NEXT: tst x10, #0x7f
+; CHECK-GI-NEXT: orr x1, x15, x17
+; CHECK-GI-NEXT: csel x9, x4, x9, eq
+; CHECK-GI-NEXT: cmp x12, #64
+; CHECK-GI-NEXT: csel x10, x18, xzr, lo
+; CHECK-GI-NEXT: orr x2, x14, x9
+; CHECK-GI-NEXT: orr x3, x13, x10
; CHECK-GI-NEXT: ldr x19, [sp], #16 // 8-byte Folded Reload
; CHECK-GI-NEXT: ret
entry:
@@ -3125,75 +3101,73 @@ define <2 x i128> @fshr_v2i128(<2 x i128> %a, <2 x i128> %b, <2 x i128> %c) {
; CHECK-GI-LABEL: fshr_v2i128:
; CHECK-GI: // %bb.0: // %entry
; CHECK-GI-NEXT: ldr x9, [sp]
-; CHECK-GI-NEXT: lsl x12, x1, #1
-; CHECK-GI-NEXT: mov w11, #127 // =0x7f
-; CHECK-GI-NEXT: mov w14, #64 // =0x40
-; CHECK-GI-NEXT: lsl x15, x0, #1
+; CHECK-GI-NEXT: mov w10, #127 // =0x7f
+; CHECK-GI-NEXT: mov w12, #64 // =0x40
+; CHECK-GI-NEXT: lsl x13, x0, #1
+; CHECK-GI-NEXT: extr x14, x1, x0, #63
; CHECK-GI-NEXT: ldr x8, [sp, #16]
-; CHECK-GI-NEXT: bic x13, x11, x9
-; CHECK-GI-NEXT: orr x12, x12, x0, lsr #63
-; CHECK-GI-NEXT: lsl x1, x3, #1
-; CHECK-GI-NEXT: sub x17, x14, x13
-; CHECK-GI-NEXT: sub x18, x13, #64
-; CHECK-GI-NEXT: lsl x3, x15, x13
-; CHECK-GI-NEXT: lsr x17, x15, x17
-; CHECK-GI-NEXT: lsl x0, x12, x13
-; CHECK-GI-NEXT: lsl x15, x15, x18
-; CHECK-GI-NEXT: bic x11, x11, x8
+; CHECK-GI-NEXT: bic x11, x10, x9
+; CHECK-GI-NEXT: mvn x16, x9
+; CHECK-GI-NEXT: and x15, x9, #0x7f
+; CHECK-GI-NEXT: sub x17, x12, x11
+; CHECK-GI-NEXT: sub x18, x11, #64
+; CHECK-GI-NEXT: lsl x0, x14, x11
+; CHECK-GI-NEXT: lsr x17, x13, x17
+; CHECK-GI-NEXT: lsl x1, x13, x11
+; CHECK-GI-NEXT: lsl x13, x13, x18
+; CHECK-GI-NEXT: bic x10, x10, x8
; CHECK-GI-NEXT: lsl x18, x2, #1
-; CHECK-GI-NEXT: cmp x13, #64
+; CHECK-GI-NEXT: cmp x11, #64
; CHECK-GI-NEXT: orr x17, x17, x0
-; CHECK-GI-NEXT: orr x13, x1, x2, lsr #63
-; CHECK-GI-NEXT: mvn x16, x9
-; CHECK-GI-NEXT: csel x15, x17, x15, lo
-; CHECK-GI-NEXT: sub x17, x14, x11
-; CHECK-GI-NEXT: csel x0, x3, xzr, lo
+; CHECK-GI-NEXT: extr x11, x3, x2, #63
+; CHECK-GI-NEXT: csel x0, x1, xzr, lo
+; CHECK-GI-NEXT: csel x13, x17, x13, lo
+; CHECK-GI-NEXT: sub x17, x12, x10
; CHECK-GI-NEXT: tst x16, #0x7f
-; CHECK-GI-NEXT: sub x16, x11, #64
+; CHECK-GI-NEXT: sub x16, x10, #64
; CHECK-GI-NEXT: lsr x17, x18, x17
-; CHECK-GI-NEXT: lsl x2, x13, x11
-; CHECK-GI-NEXT: lsl x1, x18, x11
-; CHECK-GI-NEXT: csel x12, x12, x15, eq
-; CHECK-GI-NEXT: lsl x15, x18, x16
-; CHECK-GI-NEXT: and x10, x9, #0x7f
-; CHECK-GI-NEXT: cmp x11, #64
-; CHECK-GI-NEXT: mvn x11, x8
+; CHECK-GI-NEXT: lsl x2, x11, x10
+; CHECK-GI-NEXT: lsl x1, x18, x10
+; CHECK-GI-NEXT: csel x13, x14, x13, eq
+; CHECK-GI-NEXT: lsl x14, x18, x16
+; CHECK-GI-NEXT: cmp x10, #64
+; CHECK-GI-NEXT: mvn x10, x8
; CHECK-GI-NEXT: orr x16, x17, x2
; CHECK-GI-NEXT: csel x17, x1, xzr, lo
-; CHECK-GI-NEXT: csel x15, x16, x15, lo
-; CHECK-GI-NEXT: tst x11, #0x7f
-; CHECK-GI-NEXT: sub x11, x14, x10
-; CHECK-GI-NEXT: sub x16, x10, #64
-; CHECK-GI-NEXT: lsr x18, x4, x10
-; CHECK-GI-NEXT: lsl x11, x5, x11
-; CHECK-GI-NEXT: csel x13, x13, x15, eq
-; CHECK-GI-NEXT: lsr x15, x5, x16
+; CHECK-GI-NEXT: csel x14, x16, x14, lo
+; CHECK-GI-NEXT: tst x10, #0x7f
+; CHECK-GI-NEXT: sub x10, x12, x15
+; CHECK-GI-NEXT: sub x16, x15, #64
+; CHECK-GI-NEXT: lsr x18, x4, x15
+; CHECK-GI-NEXT: lsl x10, x5, x10
+; CHECK-GI-NEXT: csel x11, x11, x14, eq
+; CHECK-GI-NEXT: lsr x14, x5, x16
; CHECK-GI-NEXT: and x1, x8, #0x7f
-; CHECK-GI-NEXT: orr x11, x18, x11
-; CHECK-GI-NEXT: cmp x10, #64
-; CHECK-GI-NEXT: lsr x16, x5, x10
-; CHECK-GI-NEXT: csel x11, x11, x15, lo
+; CHECK-GI-NEXT: cmp x15, #64
+; CHECK-GI-NEXT: lsr x16, x5, x15
+; CHECK-GI-NEXT: orr x10, x18, x10
+; CHECK-GI-NEXT: csel x10, x10, x14, lo
; CHECK-GI-NEXT: tst x9, #0x7f
-; CHECK-GI-NEXT: sub x9, x14, x1
-; CHECK-GI-NEXT: sub x14, x1, #64
-; CHECK-GI-NEXT: lsr x15, x6, x1
+; CHECK-GI-NEXT: sub x9, x12, x1
+; CHECK-GI-NEXT: sub x12, x1, #64
+; CHECK-GI-NEXT: lsr x14, x6, x1
; CHECK-GI-NEXT: lsl x9, x7, x9
-; CHECK-GI-NEXT: csel x11, x4, x11, eq
-; CHECK-GI-NEXT: cmp x10, #64
-; CHECK-GI-NEXT: lsr x10, x7, x14
-; CHECK-GI-NEXT: csel x14, x16, xzr, lo
-; CHECK-GI-NEXT: orr x9, x15, x9
+; CHECK-GI-NEXT: csel x10, x4, x10, eq
+; CHECK-GI-NEXT: cmp x15, #64
+; CHECK-GI-NEXT: lsr x12, x7, x12
+; CHECK-GI-NEXT: csel x15, x16, xzr, lo
+; CHECK-GI-NEXT: orr x9, x14, x9
; CHECK-GI-NEXT: cmp x1, #64
-; CHECK-GI-NEXT: lsr x15, x7, x1
-; CHECK-GI-NEXT: csel x9, x9, x10, lo
+; CHECK-GI-NEXT: lsr x14, x7, x1
+; CHECK-GI-NEXT: csel x9, x9, x12, lo
; CHECK-GI-NEXT: tst x8, #0x7f
; CHECK-GI-NEXT: csel x8, x6, x9, eq
; CHECK-GI-NEXT: cmp x1, #64
-; CHECK-GI-NEXT: orr x0, x0, x11
-; CHECK-GI-NEXT: csel x9, x15, xzr, lo
-; CHECK-GI-NEXT: orr x1, x12, x14
+; CHECK-GI-NEXT: orr x0, x0, x10
+; CHECK-GI-NEXT: csel x9, x14, xzr, lo
+; CHECK-GI-NEXT: orr x1, x13, x15
; CHECK-GI-NEXT: orr x2, x17, x8
-; CHECK-GI-NEXT: orr x3, x13, x9
+; CHECK-GI-NEXT: orr x3, x11, x9
; CHECK-GI-NEXT: ret
entry:
%d = call <2 x i128> @llvm.fshr(<2 x i128> %a, <2 x i128> %b, <2 x i128> %c)
@@ -3863,15 +3837,12 @@ define <2 x i128> @rotl_v2i128_c(<2 x i128> %a) {
;
; CHECK-GI-LABEL: rotl_v2i128_c:
; CHECK-GI: // %bb.0: // %entry
-; CHECK-GI-NEXT: lsr x8, x1, #61
-; CHECK-GI-NEXT: lsl x9, x1, #3
-; CHECK-GI-NEXT: lsl x10, x3, #3
-; CHECK-GI-NEXT: lsr x11, x3, #61
-; CHECK-GI-NEXT: orr x8, x8, x0, lsl #3
-; CHECK-GI-NEXT: orr x1, x9, x0, lsr #61
-; CHECK-GI-NEXT: orr x3, x10, x2, lsr #61
-; CHECK-GI-NEXT: orr x2, x11, x2, lsl #3
+; CHECK-GI-NEXT: extr x8, x0, x1, #61
+; CHECK-GI-NEXT: extr x9, x3, x2, #61
+; CHECK-GI-NEXT: extr x1, x1, x0, #61
+; CHECK-GI-NEXT: extr x2, x2, x3, #61
; CHECK-GI-NEXT: mov x0, x8
+; CHECK-GI-NEXT: mov x3, x9
; CHECK-GI-NEXT: ret
entry:
%d = call <2 x i128> @llvm.fshl(<2 x i128> %a, <2 x i128> %a, <2 x i128> <i128 3, i128 3>)
@@ -3891,14 +3862,12 @@ define <2 x i128> @rotr_v2i128_c(<2 x i128> %a) {
;
; CHECK-GI-LABEL: rotr_v2i128_c:
; CHECK-GI: // %bb.0: // %entry
-; CHECK-GI-NEXT: lsl x8, x1, #61
-; CHECK-GI-NEXT: lsl x9, x3, #61
-; CHECK-GI-NEXT: lsl x10, x0, #61
-; CHECK-GI-NEXT: lsl x11, x2, #61
-; CHECK-GI-NEXT: orr x0, x8, x0, lsr #3
-; CHECK-GI-NEXT: orr x2, x9, x2, lsr #3
-; CHECK-GI-NEXT: orr x1, x10, x1, lsr #3
-; CHECK-GI-NEXT: orr x3, x11, x3, lsr #3
+; CHECK-GI-NEXT: extr x8, x1, x0, #3
+; CHECK-GI-NEXT: extr x9, x3, x2, #3
+; CHECK-GI-NEXT: extr x1, x0, x1, #3
+; CHECK-GI-NEXT: extr x3, x2, x3, #3
+; CHECK-GI-NEXT: mov x0, x8
+; CHECK-GI-NEXT: mov x2, x9
; CHECK-GI-NEXT: ret
entry:
%d = call <2 x i128> @llvm.fshr(<2 x i128> %a, <2 x i128> %a, <2 x i128> <i128 3, i128 3>)
@@ -4464,14 +4433,10 @@ define <2 x i128> @fshl_v2i128_c(<2 x i128> %a, <2 x i128> %b) {
;
; CHECK-GI-LABEL: fshl_v2i128_c:
; CHECK-GI: // %bb.0: // %entry
-; CHECK-GI-NEXT: lsr x8, x5, #61
-; CHECK-GI-NEXT: lsl x9, x1, #3
-; CHECK-GI-NEXT: lsl x10, x3, #3
-; CHECK-GI-NEXT: lsr x11, x7, #61
-; CHECK-GI-NEXT: orr x8, x8, x0, lsl #3
-; CHECK-GI-NEXT: orr x1, x9, x0, lsr #61
-; CHECK-GI-NEXT: orr x3, x10, x2, lsr #61
-; CHECK-GI-NEXT: orr x2, x11, x2, lsl #3
+; CHECK-GI-NEXT: extr x8, x0, x5, #61
+; CHECK-GI-NEXT: extr x1, x1, x0, #61
+; CHECK-GI-NEXT: extr x3, x3, x2, #61
+; CHECK-GI-NEXT: extr x2, x2, x7, #61
; CHECK-GI-NEXT: mov x0, x8
; CHECK-GI-NEXT: ret
entry:
@@ -4480,29 +4445,15 @@ entry:
}
define <2 x i128> @fshr_v2i128_c(<2 x i128> %a, <2 x i128> %b) {
-; CHECK-SD-LABEL: fshr_v2i128_c:
-; CHECK-SD: // %bb.0: // %entry
-; CHECK-SD-NEXT: extr x8, x5, x4, #3
-; CHECK-SD-NEXT: extr x9, x7, x6, #3
-; CHECK-SD-NEXT: extr x1, x0, x5, #3
-; CHECK-SD-NEXT: extr x3, x2, x7, #3
-; CHECK-SD-NEXT: mov x0, x8
-; CHECK-SD-NEXT: mov x2, x9
-; CHECK-SD-NEXT: ret
-;
-; CHECK-GI-LABEL: fshr_v2i128_c:
-; CHECK-GI: // %bb.0: // %entry
-; CHECK-GI-NEXT: lsl x8, x5, #61
-; CHECK-GI-NEXT: lsl x9, x7, #61
-; CHECK-GI-NEXT: lsr x10, x5, #3
-; CHECK-GI-NEXT: lsr x11, x7, #3
-; CHECK-GI-NEXT: orr x8, x8, x4, lsr #3
-; CHECK-GI-NEXT: orr x9, x9, x6, lsr #3
-; CHECK-GI-NEXT: orr x1, x10, x0, lsl #61
-; CHECK-GI-NEXT: orr x3, x11, x2, lsl #61
-; CHECK-GI-NEXT: mov x0, x8
-; CHECK-GI-NEXT: mov x2, x9
-; CHECK-GI-NEXT: ret
+; CHECK-LABEL: fshr_v2i128_c:
+; CHECK: // %bb.0: // %entry
+; CHECK-NEXT: extr x8, x5, x4, #3
+; CHECK-NEXT: extr x9, x7, x6, #3
+; CHECK-NEXT: extr x1, x0, x5, #3
+; CHECK-NEXT: extr x3, x2, x7, #3
+; CHECK-NEXT: mov x0, x8
+; CHECK-NEXT: mov x2, x9
+; CHECK-NEXT: ret
entry:
%d = call <2 x i128> @llvm.fshr(<2 x i128> %a, <2 x i128> %b, <2 x i128> <i128 3, i128 3>)
ret <2 x i128> %d
diff --git a/llvm/test/CodeGen/AArch64/funnel-shift.ll b/llvm/test/CodeGen/AArch64/funnel-shift.ll
index f9fd2ad1b5b6c..90fb10258dffb 100644
--- a/llvm/test/CodeGen/AArch64/funnel-shift.ll
+++ b/llvm/test/CodeGen/AArch64/funnel-shift.ll
@@ -85,41 +85,40 @@ define i128 @fshl_i128(i128 %x, i128 %y, i128 %z) nounwind {
;
; CHECK-GI-LABEL: fshl_i128:
; CHECK-GI: // %bb.0:
+; CHECK-GI-NEXT: mov w8, #64 // =0x40
; CHECK-GI-NEXT: and x9, x4, #0x7f
-; CHECK-GI-NEXT: mov w10, #64 // =0x40
-; CHECK-GI-NEXT: lsl x14, x3, #63
-; CHECK-GI-NEXT: sub x12, x10, x9
+; CHECK-GI-NEXT: mov w10, #127 // =0x7f
+; CHECK-GI-NEXT: sub x12, x8, x9
; CHECK-GI-NEXT: lsl x13, x1, x9
-; CHECK-GI-NEXT: mov w8, #127 // =0x7f
+; CHECK-GI-NEXT: bic x10, x10, x4
; CHECK-GI-NEXT: lsr x12, x0, x12
-; CHECK-GI-NEXT: bic x8, x8, x4
-; CHECK-GI-NEXT: sub x15, x9, #64
+; CHECK-GI-NEXT: sub x14, x9, #64
+; CHECK-GI-NEXT: lsl x15, x0, x9
+; CHECK-GI-NEXT: extr x16, x3, x2, #1
; CHECK-GI-NEXT: cmp x9, #64
-; CHECK-GI-NEXT: lsl x9, x0, x9
-; CHECK-GI-NEXT: lsl x15, x0, x15
-; CHECK-GI-NEXT: orr x12, x12, x13
-; CHECK-GI-NEXT: orr x13, x14, x2, lsr #1
-; CHECK-GI-NEXT: lsr x14, x3, #1
-; CHECK-GI-NEXT: sub x10, x10, x8
-; CHECK-GI-NEXT: sub x16, x8, #64
-; CHECK-GI-NEXT: csel x9, x9, xzr, lo
-; CHECK-GI-NEXT: lsr x17, x13, x8
-; CHECK-GI-NEXT: lsl x10, x14, x10
-; CHECK-GI-NEXT: csel x12, x12, x15, lo
+; CHECK-GI-NEXT: sub x8, x8, x10
+; CHECK-GI-NEXT: orr x9, x12, x13
+; CHECK-GI-NEXT: lsr x12, x3, #1
+; CHECK-GI-NEXT: lsl x13, x0, x14
+; CHECK-GI-NEXT: csel x14, x15, xzr, lo
+; CHECK-GI-NEXT: sub x15, x10, #64
+; CHECK-GI-NEXT: lsr x17, x16, x10
+; CHECK-GI-NEXT: lsl x8, x12, x8
+; CHECK-GI-NEXT: csel x9, x9, x13, lo
; CHECK-GI-NEXT: tst x4, #0x7f
-; CHECK-GI-NEXT: lsr x15, x14, x16
+; CHECK-GI-NEXT: lsr x13, x12, x15
; CHECK-GI-NEXT: mvn x11, x4
-; CHECK-GI-NEXT: csel x12, x1, x12, eq
-; CHECK-GI-NEXT: orr x10, x17, x10
-; CHECK-GI-NEXT: cmp x8, #64
-; CHECK-GI-NEXT: lsr x14, x14, x8
-; CHECK-GI-NEXT: csel x10, x10, x15, lo
+; CHECK-GI-NEXT: csel x9, x1, x9, eq
+; CHECK-GI-NEXT: orr x8, x17, x8
+; CHECK-GI-NEXT: cmp x10, #64
+; CHECK-GI-NEXT: lsr x12, x12, x10
+; CHECK-GI-NEXT: csel x8, x8, x13, lo
; CHECK-GI-NEXT: tst x11, #0x7f
-; CHECK-GI-NEXT: csel x10, x13, x10, eq
-; CHECK-GI-NEXT: cmp x8, #64
-; CHECK-GI-NEXT: csel x8, x14, xzr, lo
-; CHECK-GI-NEXT: orr x0, x9, x10
-; CHECK-GI-NEXT: orr x1, x12, x8
+; CHECK-GI-NEXT: csel x8, x16, x8, eq
+; CHECK-GI-NEXT: cmp x10, #64
+; CHECK-GI-NEXT: csel x10, x12, xzr, lo
+; CHECK-GI-NEXT: orr x0, x14, x8
+; CHECK-GI-NEXT: orr x1, x9, x10
; CHECK-GI-NEXT: ret
%f = call i128 @llvm.fshl.i128(i128 %x, i128 %y, i128 %z)
ret i128 %f
diff --git a/llvm/test/CodeGen/AArch64/rem-by-const.ll b/llvm/test/CodeGen/AArch64/rem-by-const.ll
index 1cb92e46cbcd1..87b11086e28d5 100644
--- a/llvm/test/CodeGen/AArch64/rem-by-const.ll
+++ b/llvm/test/CodeGen/AArch64/rem-by-const.ll
@@ -559,20 +559,18 @@ define i128 @ui128_7(i128 %a, i128 %b) {
; CHECK-GI-NEXT: add x8, x8, x10
; CHECK-GI-NEXT: subs x10, x0, x9
; CHECK-GI-NEXT: sbc x11, x1, x8
-; CHECK-GI-NEXT: lsl x12, x11, #63
+; CHECK-GI-NEXT: extr x10, x11, x10, #1
; CHECK-GI-NEXT: lsr x11, x11, #1
-; CHECK-GI-NEXT: orr x10, x12, x10, lsr #1
; CHECK-GI-NEXT: adds x9, x10, x9
+; CHECK-GI-NEXT: mov w10, #7 // =0x7
; CHECK-GI-NEXT: adc x8, x11, x8
-; CHECK-GI-NEXT: lsl x10, x8, #62
+; CHECK-GI-NEXT: extr x9, x8, x9, #2
; CHECK-GI-NEXT: lsr x8, x8, #2
-; CHECK-GI-NEXT: orr x9, x10, x9, lsr #2
-; CHECK-GI-NEXT: mov w10, #7 // =0x7
-; CHECK-GI-NEXT: lsl x12, x8, #3
; CHECK-GI-NEXT: umulh x10, x9, x10
; CHECK-GI-NEXT: lsl x11, x9, #3
-; CHECK-GI-NEXT: sub x8, x12, x8
+; CHECK-GI-NEXT: lsl x12, x8, #3
; CHECK-GI-NEXT: sub x9, x11, x9
+; CHECK-GI-NEXT: sub x8, x12, x8
; CHECK-GI-NEXT: subs x0, x0, x9
; CHECK-GI-NEXT: add x8, x8, x10
; CHECK-GI-NEXT: sbc x1, x1, x8
@@ -640,10 +638,9 @@ define i128 @ui128_100(i128 %a, i128 %b) {
; CHECK-GI-NEXT: add x10, x11, x12
; CHECK-GI-NEXT: add x8, x8, x14
; CHECK-GI-NEXT: add x8, x8, x10
-; CHECK-GI-NEXT: lsl x10, x8, #60
-; CHECK-GI-NEXT: lsr x8, x8, #4
-; CHECK-GI-NEXT: orr x9, x10, x9, lsr #4
; CHECK-GI-NEXT: mov w10, #100 // =0x64
+; CHECK-GI-NEXT: extr x9, x8, x9, #4
+; CHECK-GI-NEXT: lsr x8, x8, #4
; CHECK-GI-NEXT: umulh x11, x9, x10
; CHECK-GI-NEXT: mul x9, x9, x10
; CHECK-GI-NEXT: madd x8, x8, x10, x11
@@ -3317,36 +3314,32 @@ define <2 x i128> @uv2i128_7(<2 x i128> %d, <2 x i128> %e) {
; CHECK-GI-NEXT: sbc x14, x1, x12
; CHECK-GI-NEXT: add x8, x8, x13
; CHECK-GI-NEXT: subs x13, x2, x10
-; CHECK-GI-NEXT: lsl x15, x14, #63
-; CHECK-GI-NEXT: sbc x16, x3, x8
+; CHECK-GI-NEXT: extr x9, x14, x9, #1
+; CHECK-GI-NEXT: sbc x15, x3, x8
; CHECK-GI-NEXT: lsr x14, x14, #1
-; CHECK-GI-NEXT: orr x9, x15, x9, lsr #1
-; CHECK-GI-NEXT: lsl x15, x16, #63
-; CHECK-GI-NEXT: orr x13, x15, x13, lsr #1
+; CHECK-GI-NEXT: extr x13, x15, x13, #1
; CHECK-GI-NEXT: adds x9, x9, x11
-; CHECK-GI-NEXT: lsr x11, x16, #1
+; CHECK-GI-NEXT: lsr x11, x15, #1
; CHECK-GI-NEXT: adc x12, x14, x12
; CHECK-GI-NEXT: adds x10, x13, x10
-; CHECK-GI-NEXT: lsl x13, x12, #62
-; CHECK-GI-NEXT: lsr x12, x12, #2
-; CHECK-GI-NEXT: adc x8, x11, x8
-; CHECK-GI-NEXT: lsl x11, x8, #62
-; CHECK-GI-NEXT: orr x9, x13, x9, lsr #2
+; CHECK-GI-NEXT: extr x9, x12, x9, #2
; CHECK-GI-NEXT: mov w13, #7 // =0x7
+; CHECK-GI-NEXT: adc x8, x11, x8
+; CHECK-GI-NEXT: lsr x11, x12, #2
+; CHECK-GI-NEXT: extr x10, x8, x10, #2
+; CHECK-GI-NEXT: umulh x12, x9, x13
; CHECK-GI-NEXT: lsr x8, x8, #2
-; CHECK-GI-NEXT: lsl x14, x12, #3
-; CHECK-GI-NEXT: orr x10, x11, x10, lsr #2
-; CHECK-GI-NEXT: umulh x11, x9, x13
+; CHECK-GI-NEXT: lsl x14, x11, #3
; CHECK-GI-NEXT: lsl x15, x9, #3
-; CHECK-GI-NEXT: sub x12, x14, x12
-; CHECK-GI-NEXT: lsl x16, x8, #3
; CHECK-GI-NEXT: umulh x13, x10, x13
+; CHECK-GI-NEXT: lsl x16, x8, #3
+; CHECK-GI-NEXT: sub x11, x14, x11
; CHECK-GI-NEXT: lsl x14, x10, #3
; CHECK-GI-NEXT: sub x9, x15, x9
; CHECK-GI-NEXT: sub x8, x16, x8
; CHECK-GI-NEXT: subs x0, x0, x9
+; CHECK-GI-NEXT: add x11, x11, x12
; CHECK-GI-NEXT: sub x10, x14, x10
-; CHECK-GI-NEXT: add x11, x12, x11
; CHECK-GI-NEXT: sbc x1, x1, x11
; CHECK-GI-NEXT: subs x2, x2, x10
; CHECK-GI-NEXT: add x8, x8, x13
@@ -3394,9 +3387,10 @@ define <2 x i128> @uv2i128_100(<2 x i128> %d, <2 x i128> %e) {
; CHECK-GI: // %bb.0: // %entry
; CHECK-GI-NEXT: mov x10, #23593 // =0x5c29
; CHECK-GI-NEXT: mov x8, #62914 // =0xf5c2
-; CHECK-GI-NEXT: sub x18, x0, x0
+; CHECK-GI-NEXT: and x5, xzr, #0x1
; CHECK-GI-NEXT: movk x10, #49807, lsl #16
; CHECK-GI-NEXT: movk x8, #23592, lsl #16
+; CHECK-GI-NEXT: umulh x18, x0, xzr
; CHECK-GI-NEXT: movk x10, #10485, lsl #32
; CHECK-GI-NEXT: movk x8, #49807, lsl #32
; CHECK-GI-NEXT: movk x10, #36700, lsl #48
@@ -3409,84 +3403,81 @@ define <2 x i128> @uv2i128_100(<2 x i128> %d, <2 x i128> %e) {
; CHECK-GI-NEXT: umulh x15, x1, x10
; CHECK-GI-NEXT: cset w12, hs
; CHECK-GI-NEXT: cmn x11, x13
-; CHECK-GI-NEXT: and x11, x12, #0x1
-; CHECK-GI-NEXT: umulh x16, x0, x8
-; CHECK-GI-NEXT: cset w12, hs
+; CHECK-GI-NEXT: sub x13, x0, x0
; CHECK-GI-NEXT: and x12, x12, #0x1
-; CHECK-GI-NEXT: add x14, x14, x18
-; CHECK-GI-NEXT: add x11, x11, x12
-; CHECK-GI-NEXT: and x12, xzr, #0x1
+; CHECK-GI-NEXT: umulh x16, x0, x8
+; CHECK-GI-NEXT: cset w11, hs
+; CHECK-GI-NEXT: add x13, x14, x13
+; CHECK-GI-NEXT: and x11, x11, #0x1
+; CHECK-GI-NEXT: and x14, xzr, #0x1
; CHECK-GI-NEXT: umulh x9, xzr, x10
-; CHECK-GI-NEXT: adds x14, x14, x15
-; CHECK-GI-NEXT: and x15, xzr, #0x1
+; CHECK-GI-NEXT: add x11, x12, x11
+; CHECK-GI-NEXT: add x12, x5, x14
+; CHECK-GI-NEXT: adds x13, x13, x15
; CHECK-GI-NEXT: umulh x17, x1, x8
-; CHECK-GI-NEXT: cset w4, hs
-; CHECK-GI-NEXT: add x15, x12, x15
-; CHECK-GI-NEXT: adds x12, x14, x16
-; CHECK-GI-NEXT: and x4, x4, #0x1
-; CHECK-GI-NEXT: mul x18, x3, x10
; CHECK-GI-NEXT: cset w14, hs
-; CHECK-GI-NEXT: adds x12, x12, x11
-; CHECK-GI-NEXT: add x11, x15, x4
; CHECK-GI-NEXT: and x14, x14, #0x1
-; CHECK-GI-NEXT: cset w15, hs
-; CHECK-GI-NEXT: mul x5, x2, x8
-; CHECK-GI-NEXT: add x11, x11, x14
-; CHECK-GI-NEXT: and x14, x15, #0x1
-; CHECK-GI-NEXT: add x17, x9, x17
-; CHECK-GI-NEXT: add x14, x11, x14
-; CHECK-GI-NEXT: mov w11, #100 // =0x64
-; CHECK-GI-NEXT: umulh x13, x0, xzr
-; CHECK-GI-NEXT: umulh x16, x2, x10
-; CHECK-GI-NEXT: adds x18, x18, x5
-; CHECK-GI-NEXT: mul x15, x3, x8
-; CHECK-GI-NEXT: add x13, x17, x13
-; CHECK-GI-NEXT: cset w17, hs
-; CHECK-GI-NEXT: umulh x10, x3, x10
-; CHECK-GI-NEXT: add x13, x13, x14
-; CHECK-GI-NEXT: and x17, x17, #0x1
-; CHECK-GI-NEXT: cmn x18, x16
-; CHECK-GI-NEXT: sub x18, x2, x2
-; CHECK-GI-NEXT: umulh x16, x2, x8
+; CHECK-GI-NEXT: adds x13, x13, x16
+; CHECK-GI-NEXT: mul x4, x3, x10
+; CHECK-GI-NEXT: add x12, x12, x14
; CHECK-GI-NEXT: cset w14, hs
-; CHECK-GI-NEXT: and x14, x14, #0x1
-; CHECK-GI-NEXT: add x15, x15, x18
+; CHECK-GI-NEXT: adds x11, x13, x11
+; CHECK-GI-NEXT: and x13, x14, #0x1
+; CHECK-GI-NEXT: mul x15, x2, x8
+; CHECK-GI-NEXT: cset w14, hs
+; CHECK-GI-NEXT: add x12, x12, x13
+; CHECK-GI-NEXT: and x13, x14, #0x1
+; CHECK-GI-NEXT: add x14, x9, x17
+; CHECK-GI-NEXT: sub x17, x2, x2
+; CHECK-GI-NEXT: umulh x16, x2, x10
+; CHECK-GI-NEXT: add x12, x12, x13
+; CHECK-GI-NEXT: add x13, x14, x18
+; CHECK-GI-NEXT: add x12, x13, x12
; CHECK-GI-NEXT: and x18, xzr, #0x1
-; CHECK-GI-NEXT: add x14, x17, x14
+; CHECK-GI-NEXT: mul x5, x3, x8
+; CHECK-GI-NEXT: extr x11, x12, x11, #4
+; CHECK-GI-NEXT: adds x13, x4, x15
+; CHECK-GI-NEXT: umulh x14, x3, x10
+; CHECK-GI-NEXT: cset w15, hs
+; CHECK-GI-NEXT: mov w10, #100 // =0x64
+; CHECK-GI-NEXT: cmn x13, x16
+; CHECK-GI-NEXT: and x15, x15, #0x1
+; CHECK-GI-NEXT: umulh x13, x2, x8
+; CHECK-GI-NEXT: cset w16, hs
+; CHECK-GI-NEXT: add x17, x5, x17
+; CHECK-GI-NEXT: and x16, x16, #0x1
; CHECK-GI-NEXT: umulh x8, x3, x8
+; CHECK-GI-NEXT: add x15, x15, x16
+; CHECK-GI-NEXT: adds x14, x17, x14
; CHECK-GI-NEXT: and x17, xzr, #0x1
-; CHECK-GI-NEXT: adds x10, x15, x10
-; CHECK-GI-NEXT: add x15, x17, x18
+; CHECK-GI-NEXT: add x16, x18, x17
; CHECK-GI-NEXT: cset w17, hs
-; CHECK-GI-NEXT: umulh x18, x2, xzr
+; CHECK-GI-NEXT: adds x13, x14, x13
+; CHECK-GI-NEXT: umulh x14, x2, xzr
; CHECK-GI-NEXT: and x17, x17, #0x1
-; CHECK-GI-NEXT: adds x10, x10, x16
-; CHECK-GI-NEXT: lsl x16, x13, #60
-; CHECK-GI-NEXT: add x15, x15, x17
-; CHECK-GI-NEXT: cset w17, hs
-; CHECK-GI-NEXT: adds x10, x10, x14
-; CHECK-GI-NEXT: and x14, x17, #0x1
+; CHECK-GI-NEXT: cset w18, hs
+; CHECK-GI-NEXT: adds x13, x13, x15
+; CHECK-GI-NEXT: add x15, x16, x17
+; CHECK-GI-NEXT: and x16, x18, #0x1
; CHECK-GI-NEXT: cset w17, hs
; CHECK-GI-NEXT: add x8, x9, x8
-; CHECK-GI-NEXT: add x14, x15, x14
-; CHECK-GI-NEXT: and x15, x17, #0x1
-; CHECK-GI-NEXT: orr x12, x16, x12, lsr #4
-; CHECK-GI-NEXT: add x9, x14, x15
-; CHECK-GI-NEXT: add x8, x8, x18
-; CHECK-GI-NEXT: add x8, x8, x9
-; CHECK-GI-NEXT: lsr x9, x13, #4
-; CHECK-GI-NEXT: umulh x14, x12, x11
-; CHECK-GI-NEXT: lsl x13, x8, #60
+; CHECK-GI-NEXT: add x15, x15, x16
+; CHECK-GI-NEXT: and x16, x17, #0x1
+; CHECK-GI-NEXT: lsr x9, x12, #4
+; CHECK-GI-NEXT: add x15, x15, x16
+; CHECK-GI-NEXT: umulh x17, x11, x10
+; CHECK-GI-NEXT: add x8, x8, x14
+; CHECK-GI-NEXT: add x8, x8, x15
+; CHECK-GI-NEXT: mul x11, x11, x10
+; CHECK-GI-NEXT: extr x12, x8, x13, #4
; CHECK-GI-NEXT: lsr x8, x8, #4
-; CHECK-GI-NEXT: mul x12, x12, x11
-; CHECK-GI-NEXT: orr x10, x13, x10, lsr #4
-; CHECK-GI-NEXT: madd x9, x9, x11, x14
-; CHECK-GI-NEXT: umulh x13, x10, x11
-; CHECK-GI-NEXT: subs x0, x0, x12
-; CHECK-GI-NEXT: mul x10, x10, x11
+; CHECK-GI-NEXT: madd x9, x9, x10, x17
+; CHECK-GI-NEXT: umulh x13, x12, x10
+; CHECK-GI-NEXT: subs x0, x0, x11
+; CHECK-GI-NEXT: mul x12, x12, x10
; CHECK-GI-NEXT: sbc x1, x1, x9
-; CHECK-GI-NEXT: madd x8, x8, x11, x13
-; CHECK-GI-NEXT: subs x2, x2, x10
+; CHECK-GI-NEXT: madd x8, x8, x10, x13
+; CHECK-GI-NEXT: subs x2, x2, x12
; CHECK-GI-NEXT: sbc x3, x3, x8
; CHECK-GI-NEXT: ret
entry:
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