[llvm] [LoongArch] Make fminnum/fmaxnum legal for lsx/lasx (PR #162768)
Zhaoxin Yang via llvm-commits
llvm-commits at lists.llvm.org
Tue Oct 28 20:24:58 PDT 2025
https://github.com/ylzsx updated https://github.com/llvm/llvm-project/pull/162768
>From 5a213787657c2ad3b3a66afe332b4e685a4805dd Mon Sep 17 00:00:00 2001
From: yangzhaoxin <yangzhaoxin at loongson.cn>
Date: Fri, 10 Oct 2025 11:38:34 +0800
Subject: [PATCH] [LoongArch] Make fminnum/fmaxnum legal for lsx/lasx
---
.../LoongArch/LoongArchISelLowering.cpp | 4 +
.../LoongArch/LoongArchLASXInstrInfo.td | 4 +
.../Target/LoongArch/LoongArchLSXInstrInfo.td | 4 +
.../test/CodeGen/LoongArch/lasx/fp-max-min.ll | 116 +++---------------
llvm/test/CodeGen/LoongArch/lsx/fp-max-min.ll | 68 +++-------
5 files changed, 40 insertions(+), 156 deletions(-)
diff --git a/llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp b/llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
index 80c96c6dc8eb6..3901150dbeab8 100644
--- a/llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
+++ b/llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
@@ -366,6 +366,8 @@ LoongArchTargetLowering::LoongArchTargetLowering(const TargetMachine &TM,
ISD::SETUGE, ISD::SETUGT},
VT, Expand);
setOperationAction(ISD::SCALAR_TO_VECTOR, VT, Legal);
+ setOperationAction(ISD::FMINNUM, VT, Legal);
+ setOperationAction(ISD::FMAXNUM, VT, Legal);
}
setOperationAction(ISD::CTPOP, GRLenVT, Legal);
setOperationAction(ISD::FCEIL, {MVT::f32, MVT::f64}, Legal);
@@ -447,6 +449,8 @@ LoongArchTargetLowering::LoongArchTargetLowering(const TargetMachine &TM,
ISD::SETUGE, ISD::SETUGT},
VT, Expand);
setOperationAction(ISD::SCALAR_TO_VECTOR, VT, Legal);
+ setOperationAction(ISD::FMINNUM, VT, Legal);
+ setOperationAction(ISD::FMAXNUM, VT, Legal);
}
}
diff --git a/llvm/lib/Target/LoongArch/LoongArchLASXInstrInfo.td b/llvm/lib/Target/LoongArch/LoongArchLASXInstrInfo.td
index 613dea6093f5f..dd7083e2fe1eb 100644
--- a/llvm/lib/Target/LoongArch/LoongArchLASXInstrInfo.td
+++ b/llvm/lib/Target/LoongArch/LoongArchLASXInstrInfo.td
@@ -1558,6 +1558,10 @@ defm : PatXrXrF<fmul, "XVFMUL">;
// XVFDIV_{S/D}
defm : PatXrXrF<fdiv, "XVFDIV">;
+// XVFMAX_{S/D}, XVFMIN_{S/D}
+defm : PatXrXrF<fmaxnum, "XVFMAX">;
+defm : PatXrXrF<fminnum, "XVFMIN">;
+
// XVFMADD_{S/D}
def : Pat<(fma v8f32:$xj, v8f32:$xk, v8f32:$xa),
(XVFMADD_S v8f32:$xj, v8f32:$xk, v8f32:$xa)>;
diff --git a/llvm/lib/Target/LoongArch/LoongArchLSXInstrInfo.td b/llvm/lib/Target/LoongArch/LoongArchLSXInstrInfo.td
index 4619c6bd248a6..f4b919463df21 100644
--- a/llvm/lib/Target/LoongArch/LoongArchLSXInstrInfo.td
+++ b/llvm/lib/Target/LoongArch/LoongArchLSXInstrInfo.td
@@ -1748,6 +1748,10 @@ defm : PatVrVrF<fmul, "VFMUL">;
// VFDIV_{S/D}
defm : PatVrVrF<fdiv, "VFDIV">;
+// VFMAX_{S/D}, VFMIN_{S/D}
+defm : PatVrVrF<fmaxnum, "VFMAX">;
+defm : PatVrVrF<fminnum, "VFMIN">;
+
// VFMADD_{S/D}
def : Pat<(fma v4f32:$vj, v4f32:$vk, v4f32:$va),
(VFMADD_S v4f32:$vj, v4f32:$vk, v4f32:$va)>;
diff --git a/llvm/test/CodeGen/LoongArch/lasx/fp-max-min.ll b/llvm/test/CodeGen/LoongArch/lasx/fp-max-min.ll
index 48ec98c3a74bb..8e08e1ee9e094 100644
--- a/llvm/test/CodeGen/LoongArch/lasx/fp-max-min.ll
+++ b/llvm/test/CodeGen/LoongArch/lasx/fp-max-min.ll
@@ -5,40 +5,10 @@
define void @minnum_v8f32(ptr %res, ptr %x, ptr %y) nounwind {
; CHECK-LABEL: minnum_v8f32:
; CHECK: # %bb.0: # %entry
-; CHECK-NEXT: xvld $xr0, $a2, 0
-; CHECK-NEXT: xvld $xr1, $a1, 0
-; CHECK-NEXT: xvpickve.w $xr2, $xr0, 5
-; CHECK-NEXT: xvpickve.w $xr3, $xr1, 5
-; CHECK-NEXT: fmin.s $fa2, $fa3, $fa2
-; CHECK-NEXT: xvpickve.w $xr3, $xr0, 4
-; CHECK-NEXT: xvpickve.w $xr4, $xr1, 4
-; CHECK-NEXT: fmin.s $fa3, $fa4, $fa3
-; CHECK-NEXT: vextrins.w $vr3, $vr2, 16
-; CHECK-NEXT: xvpickve.w $xr2, $xr0, 6
-; CHECK-NEXT: xvpickve.w $xr4, $xr1, 6
-; CHECK-NEXT: fmin.s $fa2, $fa4, $fa2
-; CHECK-NEXT: vextrins.w $vr3, $vr2, 32
-; CHECK-NEXT: xvpickve.w $xr2, $xr0, 7
-; CHECK-NEXT: xvpickve.w $xr4, $xr1, 7
-; CHECK-NEXT: fmin.s $fa2, $fa4, $fa2
-; CHECK-NEXT: vextrins.w $vr3, $vr2, 48
-; CHECK-NEXT: xvpickve.w $xr2, $xr0, 1
-; CHECK-NEXT: xvpickve.w $xr4, $xr1, 1
-; CHECK-NEXT: fmin.s $fa2, $fa4, $fa2
-; CHECK-NEXT: xvpickve.w $xr4, $xr0, 0
-; CHECK-NEXT: xvpickve.w $xr5, $xr1, 0
-; CHECK-NEXT: fmin.s $fa4, $fa5, $fa4
-; CHECK-NEXT: vextrins.w $vr4, $vr2, 16
-; CHECK-NEXT: xvpickve.w $xr2, $xr0, 2
-; CHECK-NEXT: xvpickve.w $xr5, $xr1, 2
-; CHECK-NEXT: fmin.s $fa2, $fa5, $fa2
-; CHECK-NEXT: vextrins.w $vr4, $vr2, 32
-; CHECK-NEXT: xvpickve.w $xr0, $xr0, 3
-; CHECK-NEXT: xvpickve.w $xr1, $xr1, 3
-; CHECK-NEXT: fmin.s $fa0, $fa1, $fa0
-; CHECK-NEXT: vextrins.w $vr4, $vr0, 48
-; CHECK-NEXT: xvpermi.q $xr4, $xr3, 2
-; CHECK-NEXT: xvst $xr4, $a0, 0
+; CHECK-NEXT: xvld $xr0, $a1, 0
+; CHECK-NEXT: xvld $xr1, $a2, 0
+; CHECK-NEXT: xvfmin.s $xr0, $xr0, $xr1
+; CHECK-NEXT: xvst $xr0, $a0, 0
; CHECK-NEXT: ret
entry:
%v0 = load <8 x float>, ptr %x
@@ -51,23 +21,9 @@ entry:
define void @minnum_v4f64(ptr %res, ptr %x, ptr %y) nounwind {
; CHECK-LABEL: minnum_v4f64:
; CHECK: # %bb.0: # %entry
-; CHECK-NEXT: xvld $xr0, $a2, 0
-; CHECK-NEXT: xvld $xr1, $a1, 0
-; CHECK-NEXT: xvpickve.d $xr2, $xr0, 3
-; CHECK-NEXT: xvpickve.d $xr3, $xr1, 3
-; CHECK-NEXT: fmin.d $fa2, $fa3, $fa2
-; CHECK-NEXT: xvpickve.d $xr3, $xr0, 2
-; CHECK-NEXT: xvpickve.d $xr4, $xr1, 2
-; CHECK-NEXT: fmin.d $fa3, $fa4, $fa3
-; CHECK-NEXT: vextrins.d $vr3, $vr2, 16
-; CHECK-NEXT: xvpickve.d $xr2, $xr0, 1
-; CHECK-NEXT: xvpickve.d $xr4, $xr1, 1
-; CHECK-NEXT: fmin.d $fa2, $fa4, $fa2
-; CHECK-NEXT: xvpickve.d $xr0, $xr0, 0
-; CHECK-NEXT: xvpickve.d $xr1, $xr1, 0
-; CHECK-NEXT: fmin.d $fa0, $fa1, $fa0
-; CHECK-NEXT: vextrins.d $vr0, $vr2, 16
-; CHECK-NEXT: xvpermi.q $xr0, $xr3, 2
+; CHECK-NEXT: xvld $xr0, $a1, 0
+; CHECK-NEXT: xvld $xr1, $a2, 0
+; CHECK-NEXT: xvfmin.d $xr0, $xr0, $xr1
; CHECK-NEXT: xvst $xr0, $a0, 0
; CHECK-NEXT: ret
entry:
@@ -81,40 +37,10 @@ entry:
define void @maxnum_v8f32(ptr %res, ptr %x, ptr %y) nounwind {
; CHECK-LABEL: maxnum_v8f32:
; CHECK: # %bb.0: # %entry
-; CHECK-NEXT: xvld $xr0, $a2, 0
-; CHECK-NEXT: xvld $xr1, $a1, 0
-; CHECK-NEXT: xvpickve.w $xr2, $xr0, 5
-; CHECK-NEXT: xvpickve.w $xr3, $xr1, 5
-; CHECK-NEXT: fmax.s $fa2, $fa3, $fa2
-; CHECK-NEXT: xvpickve.w $xr3, $xr0, 4
-; CHECK-NEXT: xvpickve.w $xr4, $xr1, 4
-; CHECK-NEXT: fmax.s $fa3, $fa4, $fa3
-; CHECK-NEXT: vextrins.w $vr3, $vr2, 16
-; CHECK-NEXT: xvpickve.w $xr2, $xr0, 6
-; CHECK-NEXT: xvpickve.w $xr4, $xr1, 6
-; CHECK-NEXT: fmax.s $fa2, $fa4, $fa2
-; CHECK-NEXT: vextrins.w $vr3, $vr2, 32
-; CHECK-NEXT: xvpickve.w $xr2, $xr0, 7
-; CHECK-NEXT: xvpickve.w $xr4, $xr1, 7
-; CHECK-NEXT: fmax.s $fa2, $fa4, $fa2
-; CHECK-NEXT: vextrins.w $vr3, $vr2, 48
-; CHECK-NEXT: xvpickve.w $xr2, $xr0, 1
-; CHECK-NEXT: xvpickve.w $xr4, $xr1, 1
-; CHECK-NEXT: fmax.s $fa2, $fa4, $fa2
-; CHECK-NEXT: xvpickve.w $xr4, $xr0, 0
-; CHECK-NEXT: xvpickve.w $xr5, $xr1, 0
-; CHECK-NEXT: fmax.s $fa4, $fa5, $fa4
-; CHECK-NEXT: vextrins.w $vr4, $vr2, 16
-; CHECK-NEXT: xvpickve.w $xr2, $xr0, 2
-; CHECK-NEXT: xvpickve.w $xr5, $xr1, 2
-; CHECK-NEXT: fmax.s $fa2, $fa5, $fa2
-; CHECK-NEXT: vextrins.w $vr4, $vr2, 32
-; CHECK-NEXT: xvpickve.w $xr0, $xr0, 3
-; CHECK-NEXT: xvpickve.w $xr1, $xr1, 3
-; CHECK-NEXT: fmax.s $fa0, $fa1, $fa0
-; CHECK-NEXT: vextrins.w $vr4, $vr0, 48
-; CHECK-NEXT: xvpermi.q $xr4, $xr3, 2
-; CHECK-NEXT: xvst $xr4, $a0, 0
+; CHECK-NEXT: xvld $xr0, $a1, 0
+; CHECK-NEXT: xvld $xr1, $a2, 0
+; CHECK-NEXT: xvfmax.s $xr0, $xr0, $xr1
+; CHECK-NEXT: xvst $xr0, $a0, 0
; CHECK-NEXT: ret
entry:
%v0 = load <8 x float>, ptr %x
@@ -127,23 +53,9 @@ entry:
define void @maxnum_v4f64(ptr %res, ptr %x, ptr %y) nounwind {
; CHECK-LABEL: maxnum_v4f64:
; CHECK: # %bb.0: # %entry
-; CHECK-NEXT: xvld $xr0, $a2, 0
-; CHECK-NEXT: xvld $xr1, $a1, 0
-; CHECK-NEXT: xvpickve.d $xr2, $xr0, 3
-; CHECK-NEXT: xvpickve.d $xr3, $xr1, 3
-; CHECK-NEXT: fmax.d $fa2, $fa3, $fa2
-; CHECK-NEXT: xvpickve.d $xr3, $xr0, 2
-; CHECK-NEXT: xvpickve.d $xr4, $xr1, 2
-; CHECK-NEXT: fmax.d $fa3, $fa4, $fa3
-; CHECK-NEXT: vextrins.d $vr3, $vr2, 16
-; CHECK-NEXT: xvpickve.d $xr2, $xr0, 1
-; CHECK-NEXT: xvpickve.d $xr4, $xr1, 1
-; CHECK-NEXT: fmax.d $fa2, $fa4, $fa2
-; CHECK-NEXT: xvpickve.d $xr0, $xr0, 0
-; CHECK-NEXT: xvpickve.d $xr1, $xr1, 0
-; CHECK-NEXT: fmax.d $fa0, $fa1, $fa0
-; CHECK-NEXT: vextrins.d $vr0, $vr2, 16
-; CHECK-NEXT: xvpermi.q $xr0, $xr3, 2
+; CHECK-NEXT: xvld $xr0, $a1, 0
+; CHECK-NEXT: xvld $xr1, $a2, 0
+; CHECK-NEXT: xvfmax.d $xr0, $xr0, $xr1
; CHECK-NEXT: xvst $xr0, $a0, 0
; CHECK-NEXT: ret
entry:
diff --git a/llvm/test/CodeGen/LoongArch/lsx/fp-max-min.ll b/llvm/test/CodeGen/LoongArch/lsx/fp-max-min.ll
index 27ecb759c2ea3..c17309230ee72 100644
--- a/llvm/test/CodeGen/LoongArch/lsx/fp-max-min.ll
+++ b/llvm/test/CodeGen/LoongArch/lsx/fp-max-min.ll
@@ -5,24 +5,10 @@
define void @minnum_v4f32(ptr %res, ptr %x, ptr %y) nounwind {
; CHECK-LABEL: minnum_v4f32:
; CHECK: # %bb.0: # %entry
-; CHECK-NEXT: vld $vr0, $a2, 0
-; CHECK-NEXT: vld $vr1, $a1, 0
-; CHECK-NEXT: vreplvei.w $vr2, $vr0, 1
-; CHECK-NEXT: vreplvei.w $vr3, $vr1, 1
-; CHECK-NEXT: fmin.s $fa2, $fa3, $fa2
-; CHECK-NEXT: vreplvei.w $vr3, $vr0, 0
-; CHECK-NEXT: vreplvei.w $vr4, $vr1, 0
-; CHECK-NEXT: fmin.s $fa3, $fa4, $fa3
-; CHECK-NEXT: vextrins.w $vr3, $vr2, 16
-; CHECK-NEXT: vreplvei.w $vr2, $vr0, 2
-; CHECK-NEXT: vreplvei.w $vr4, $vr1, 2
-; CHECK-NEXT: fmin.s $fa2, $fa4, $fa2
-; CHECK-NEXT: vextrins.w $vr3, $vr2, 32
-; CHECK-NEXT: vreplvei.w $vr0, $vr0, 3
-; CHECK-NEXT: vreplvei.w $vr1, $vr1, 3
-; CHECK-NEXT: fmin.s $fa0, $fa1, $fa0
-; CHECK-NEXT: vextrins.w $vr3, $vr0, 48
-; CHECK-NEXT: vst $vr3, $a0, 0
+; CHECK-NEXT: vld $vr0, $a1, 0
+; CHECK-NEXT: vld $vr1, $a2, 0
+; CHECK-NEXT: vfmin.s $vr0, $vr0, $vr1
+; CHECK-NEXT: vst $vr0, $a0, 0
; CHECK-NEXT: ret
entry:
%v0 = load <4 x float>, ptr %x
@@ -35,15 +21,9 @@ entry:
define void @minnum_v2f64(ptr %res, ptr %x, ptr %y) nounwind {
; CHECK-LABEL: minnum_v2f64:
; CHECK: # %bb.0: # %entry
-; CHECK-NEXT: vld $vr0, $a2, 0
-; CHECK-NEXT: vld $vr1, $a1, 0
-; CHECK-NEXT: vreplvei.d $vr2, $vr0, 1
-; CHECK-NEXT: vreplvei.d $vr3, $vr1, 1
-; CHECK-NEXT: fmin.d $fa2, $fa3, $fa2
-; CHECK-NEXT: vreplvei.d $vr0, $vr0, 0
-; CHECK-NEXT: vreplvei.d $vr1, $vr1, 0
-; CHECK-NEXT: fmin.d $fa0, $fa1, $fa0
-; CHECK-NEXT: vextrins.d $vr0, $vr2, 16
+; CHECK-NEXT: vld $vr0, $a1, 0
+; CHECK-NEXT: vld $vr1, $a2, 0
+; CHECK-NEXT: vfmin.d $vr0, $vr0, $vr1
; CHECK-NEXT: vst $vr0, $a0, 0
; CHECK-NEXT: ret
entry:
@@ -57,24 +37,10 @@ entry:
define void @maxnum_v4f32(ptr %res, ptr %x, ptr %y) nounwind {
; CHECK-LABEL: maxnum_v4f32:
; CHECK: # %bb.0: # %entry
-; CHECK-NEXT: vld $vr0, $a2, 0
-; CHECK-NEXT: vld $vr1, $a1, 0
-; CHECK-NEXT: vreplvei.w $vr2, $vr0, 1
-; CHECK-NEXT: vreplvei.w $vr3, $vr1, 1
-; CHECK-NEXT: fmax.s $fa2, $fa3, $fa2
-; CHECK-NEXT: vreplvei.w $vr3, $vr0, 0
-; CHECK-NEXT: vreplvei.w $vr4, $vr1, 0
-; CHECK-NEXT: fmax.s $fa3, $fa4, $fa3
-; CHECK-NEXT: vextrins.w $vr3, $vr2, 16
-; CHECK-NEXT: vreplvei.w $vr2, $vr0, 2
-; CHECK-NEXT: vreplvei.w $vr4, $vr1, 2
-; CHECK-NEXT: fmax.s $fa2, $fa4, $fa2
-; CHECK-NEXT: vextrins.w $vr3, $vr2, 32
-; CHECK-NEXT: vreplvei.w $vr0, $vr0, 3
-; CHECK-NEXT: vreplvei.w $vr1, $vr1, 3
-; CHECK-NEXT: fmax.s $fa0, $fa1, $fa0
-; CHECK-NEXT: vextrins.w $vr3, $vr0, 48
-; CHECK-NEXT: vst $vr3, $a0, 0
+; CHECK-NEXT: vld $vr0, $a1, 0
+; CHECK-NEXT: vld $vr1, $a2, 0
+; CHECK-NEXT: vfmax.s $vr0, $vr0, $vr1
+; CHECK-NEXT: vst $vr0, $a0, 0
; CHECK-NEXT: ret
entry:
%v0 = load <4 x float>, ptr %x
@@ -87,15 +53,9 @@ entry:
define void @maxnum_v2f64(ptr %res, ptr %x, ptr %y) nounwind {
; CHECK-LABEL: maxnum_v2f64:
; CHECK: # %bb.0: # %entry
-; CHECK-NEXT: vld $vr0, $a2, 0
-; CHECK-NEXT: vld $vr1, $a1, 0
-; CHECK-NEXT: vreplvei.d $vr2, $vr0, 1
-; CHECK-NEXT: vreplvei.d $vr3, $vr1, 1
-; CHECK-NEXT: fmax.d $fa2, $fa3, $fa2
-; CHECK-NEXT: vreplvei.d $vr0, $vr0, 0
-; CHECK-NEXT: vreplvei.d $vr1, $vr1, 0
-; CHECK-NEXT: fmax.d $fa0, $fa1, $fa0
-; CHECK-NEXT: vextrins.d $vr0, $vr2, 16
+; CHECK-NEXT: vld $vr0, $a1, 0
+; CHECK-NEXT: vld $vr1, $a2, 0
+; CHECK-NEXT: vfmax.d $vr0, $vr0, $vr1
; CHECK-NEXT: vst $vr0, $a0, 0
; CHECK-NEXT: ret
entry:
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