[llvm] 817aff6 - [llvm] Use nullptr instead of 0 or NULL (NFC) (#165396)
via llvm-commits
llvm-commits at lists.llvm.org
Tue Oct 28 16:15:05 PDT 2025
Author: Kazu Hirata
Date: 2025-10-28T16:15:01-07:00
New Revision: 817aff6960b10f8b679865da574e1ebbae2b295d
URL: https://github.com/llvm/llvm-project/commit/817aff6960b10f8b679865da574e1ebbae2b295d
DIFF: https://github.com/llvm/llvm-project/commit/817aff6960b10f8b679865da574e1ebbae2b295d.diff
LOG: [llvm] Use nullptr instead of 0 or NULL (NFC) (#165396)
Identified with modernize-use-nullptr.
Added:
Modified:
llvm/include/llvm/CodeGen/TargetLowering.h
llvm/lib/DebugInfo/GSYM/GsymCreator.cpp
llvm/lib/ExecutionEngine/Orc/TargetProcess/JITLoaderPerf.cpp
llvm/lib/SandboxIR/Context.cpp
llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp
llvm/lib/TargetParser/Host.cpp
llvm/lib/Transforms/IPO/ExpandVariadics.cpp
llvm/unittests/ProfileData/InstrProfTest.cpp
Removed:
################################################################################
diff --git a/llvm/include/llvm/CodeGen/TargetLowering.h b/llvm/include/llvm/CodeGen/TargetLowering.h
index 4058dd728e5d1..1920b98c8a1ef 100644
--- a/llvm/include/llvm/CodeGen/TargetLowering.h
+++ b/llvm/include/llvm/CodeGen/TargetLowering.h
@@ -3761,7 +3761,7 @@ class LLVM_ABI TargetLoweringBase {
/// register class is the largest legal super-reg register class of the
/// register class of the specified type. e.g. On x86, i8, i16, and i32's
/// representative class would be GR32.
- const TargetRegisterClass *RepRegClassForVT[MVT::VALUETYPE_SIZE] = {0};
+ const TargetRegisterClass *RepRegClassForVT[MVT::VALUETYPE_SIZE] = {nullptr};
/// This indicates the "cost" of the "representative" register class for each
/// ValueType. The cost is used by the scheduler to approximate register
diff --git a/llvm/lib/DebugInfo/GSYM/GsymCreator.cpp b/llvm/lib/DebugInfo/GSYM/GsymCreator.cpp
index 93ff3b924db32..d87cb4d2210a6 100644
--- a/llvm/lib/DebugInfo/GSYM/GsymCreator.cpp
+++ b/llvm/lib/DebugInfo/GSYM/GsymCreator.cpp
@@ -552,7 +552,7 @@ llvm::Error GsymCreator::saveSegments(StringRef Path,
createSegment(SegmentSize, FuncIdx);
if (ExpectedGC) {
GsymCreator *GC = ExpectedGC->get();
- if (GC == NULL)
+ if (!GC)
break; // We had not more functions to encode.
// Don't collect any messages at all
OutputAggregator Out(nullptr);
diff --git a/llvm/lib/ExecutionEngine/Orc/TargetProcess/JITLoaderPerf.cpp b/llvm/lib/ExecutionEngine/Orc/TargetProcess/JITLoaderPerf.cpp
index 1a61d3188a820..e609a7d3dc08e 100644
--- a/llvm/lib/ExecutionEngine/Orc/TargetProcess/JITLoaderPerf.cpp
+++ b/llvm/lib/ExecutionEngine/Orc/TargetProcess/JITLoaderPerf.cpp
@@ -55,7 +55,7 @@ struct PerfState {
std::unique_ptr<raw_fd_ostream> Dumpstream;
// perf mmap marker
- void *MarkerAddr = NULL;
+ void *MarkerAddr = nullptr;
};
// prevent concurrent dumps from messing up the output file
diff --git a/llvm/lib/SandboxIR/Context.cpp b/llvm/lib/SandboxIR/Context.cpp
index 70ac68abbcb0d..fb6ff6203567a 100644
--- a/llvm/lib/SandboxIR/Context.cpp
+++ b/llvm/lib/SandboxIR/Context.cpp
@@ -443,7 +443,7 @@ Argument *Context::getOrCreateArgument(llvm::Argument *LLVMArg) {
}
Constant *Context::getOrCreateConstant(llvm::Constant *LLVMC) {
- return cast<Constant>(getOrCreateValueInternal(LLVMC, 0));
+ return cast<Constant>(getOrCreateValueInternal(LLVMC, nullptr));
}
BasicBlock *Context::createBasicBlock(llvm::BasicBlock *LLVMBB) {
diff --git a/llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp b/llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp
index 6181abb281cc6..47022b3f89a8b 100644
--- a/llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp
+++ b/llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp
@@ -745,7 +745,7 @@ Register SPIRVGlobalRegistry::buildGlobalVariable(
.addDef(ResVReg)
.addUse(getSPIRVTypeID(BaseType))
.addImm(static_cast<uint32_t>(Storage));
- if (Init != 0)
+ if (Init)
MIB.addUse(Init->getOperand(0).getReg());
// ISel may introduce a new register on this step, so we need to add it to
// DT and correct its type avoiding fails on the next stage.
diff --git a/llvm/lib/TargetParser/Host.cpp b/llvm/lib/TargetParser/Host.cpp
index c8d193887d92f..0849fc7d55a32 100644
--- a/llvm/lib/TargetParser/Host.cpp
+++ b/llvm/lib/TargetParser/Host.cpp
@@ -1179,7 +1179,7 @@ static const char *getAMDProcessorTypeAndSubtype(unsigned Family,
const unsigned *Features,
unsigned *Type,
unsigned *Subtype) {
- const char *CPU = 0;
+ const char *CPU = nullptr;
switch (Family) {
case 4:
diff --git a/llvm/lib/Transforms/IPO/ExpandVariadics.cpp b/llvm/lib/Transforms/IPO/ExpandVariadics.cpp
index 042578d26818a..6a11aec6c5cb0 100644
--- a/llvm/lib/Transforms/IPO/ExpandVariadics.cpp
+++ b/llvm/lib/Transforms/IPO/ExpandVariadics.cpp
@@ -380,7 +380,7 @@ bool ExpandVariadics::runOnModule(Module &M) {
if (CB->isIndirectCall()) {
FunctionType *FTy = CB->getFunctionType();
if (FTy->isVarArg())
- Changed |= expandCall(M, Builder, CB, FTy, 0);
+ Changed |= expandCall(M, Builder, CB, FTy, /*NF=*/nullptr);
}
}
}
diff --git a/llvm/unittests/ProfileData/InstrProfTest.cpp b/llvm/unittests/ProfileData/InstrProfTest.cpp
index dd17844aef8a6..8641b939dd35d 100644
--- a/llvm/unittests/ProfileData/InstrProfTest.cpp
+++ b/llvm/unittests/ProfileData/InstrProfTest.cpp
@@ -914,7 +914,7 @@ TEST_P(MaybeSparseInstrProfTest, annotate_vp_data) {
ASSERT_THAT(ValueData, SizeIs(0));
// Remove the MD_prof metadata
- Inst->setMetadata(LLVMContext::MD_prof, 0);
+ Inst->setMetadata(LLVMContext::MD_prof, nullptr);
// Annotate 5 records this time.
annotateValueSite(*M, *Inst, R.get(), IPVK_IndirectCallTarget, 0, 5);
ValueData = getValueProfDataFromInst(*Inst, IPVK_IndirectCallTarget, 5, T);
@@ -932,7 +932,7 @@ TEST_P(MaybeSparseInstrProfTest, annotate_vp_data) {
ASSERT_EQ(2U, ValueData[4].Count);
// Remove the MD_prof metadata
- Inst->setMetadata(LLVMContext::MD_prof, 0);
+ Inst->setMetadata(LLVMContext::MD_prof, nullptr);
// Annotate with 4 records.
InstrProfValueData VD0Sorted[] = {{1000, 6}, {2000, 5}, {3000, 4}, {4000, 3},
{5000, 2}, {6000, 1}};
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