[llvm] [CodeGen] Add MO_LaneMask type and a new COPY_LANEMASK instruction (PR #151944)

Jay Foad via llvm-commits llvm-commits at lists.llvm.org
Tue Oct 28 10:35:52 PDT 2025


================
@@ -807,6 +807,23 @@ For an int eq predicate ``ICMP_EQ``, the syntax is:
 
    %2:gpr(s32) = G_ICMP intpred(eq), %0, %1
 
+Lanemask Operands
+^^^^^^^^^^^^^^^^^^
+
+A Lanemask operand is a 64-bit unsigned value that can store lane information 
+for a register operand in the instruction. It can be used as many times as needed
+in an instruction, with one or more register operands associated with it. While 
+the active bits represent the live subregister (in virtual registers) or regUnits
+(in physical registers), the remaining bits can represent the UNDEF part of it. 
----------------
jayfoad wrote:

This should mostly just defer to the description of what a lane mask is. Unfortunately that is not covered in the MIR docs, only in LaneBitmask.h.

This should not mention UNDEF - that belongs in the documentation for COPY_LANEMASK.

Suggestion:

A LaneMask operand contains a ``LaneBitmask`` struct representing the covering of a register with sub-registers. [That's what it says in LaneBitmask.h!] Instructions typically associate a LaneMask operand with one or more Register operands, and use it to represent sub-register granularity information like liveness for those Register operands.

https://github.com/llvm/llvm-project/pull/151944


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