[llvm] [HEXAGON] [MachinePipeliner] Fix the DAG in case of dependent phis. (PR #135925)

[Abinaya Saravanan via llvm-commits]

quic-asaravan wrote:

@kasuga-fj Can you please point me to the specific lines of code in isLoopCarriedDep()? A corresponding example with PHI-PHI edges would help me understand more on what you are suggesting hereh https://github.com/llvm/llvm-project/pull/135925#discussion_r2055807672



https://github.com/llvm/llvm-project/pull/135925