[llvm] [RISCV][llvm] Preliminary P extension codegen support (PR #162668)

[Brandon Wu via llvm-commits]

================
@@ -8134,6 +8233,17 @@ SDValue RISCVTargetLowering::LowerOperation(SDValue Op,
     auto *Store = cast<StoreSDNode>(Op);
     SDValue StoredVal = Store->getValue();
     EVT VT = StoredVal.getValueType();
+    if (Subtarget.hasStdExtP()) {
+      if (VT == MVT::v2i16 || VT == MVT::v4i8) {
----------------
4vtomat wrote:

I think we can use bitcast -> right shift -> truncate?

https://github.com/llvm/llvm-project/pull/162668