[llvm] [RISCV][llvm] Preliminary P extension codegen support (PR #162668)

Craig Topper via llvm-commits llvm-commits at lists.llvm.org
Mon Oct 27 10:11:53 PDT 2025


================
@@ -4311,6 +4369,34 @@ static SDValue lowerBUILD_VECTOR(SDValue Op, SelectionDAG &DAG,
   MVT XLenVT = Subtarget.getXLenVT();
 
   SDLoc DL(Op);
+  // Handle P extension packed vector BUILD_VECTOR with PLI for splat constants
+  if (Subtarget.hasStdExtP() && EnablePExtCodeGen) {
+    bool IsPExtVector =
+        (VT == MVT::v2i16 || VT == MVT::v4i8) ||
+        (Subtarget.is64Bit() &&
+         (VT == MVT::v4i16 || VT == MVT::v8i8 || VT == MVT::v2i32));
+    if (IsPExtVector) {
+      if (SDValue SplatValue = cast<BuildVectorSDNode>(Op)->getSplatValue()) {
+        if (auto *C = dyn_cast<ConstantSDNode>(SplatValue)) {
+          int64_t SplatImm = C->getSExtValue();
+          bool IsValidImm = false;
+
+          // Check immediate range based on vector type
+          if (VT == MVT::v8i8 || VT == MVT::v4i8)
+            // PLI_B uses 8-bit unsigned immediate
----------------
topperc wrote:

I'm not sure it is guaranteed that it will canonicalize by sign extending. Especially if it starts as weird type like <4 x i7>.

https://github.com/llvm/llvm-project/pull/162668


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