[llvm] [AMDGPU] Precommit test for sinking vector ops PR 162580 (PR #165050)

[Gheorghe-Teodor Bercea via llvm-commits]

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@@ -0,0 +1,240 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 6
+; RUN: opt -S -passes='require<profile-summary>,function(codegenprepare)' -mtriple=amdgcn-amd-amdhsa -mcpu=gfx942 < %s | FileCheck -check-prefix=OPT %s
+
+; testing insert case
+define amdgpu_kernel void @runningSum(ptr addrspace(1) %out0, ptr addrspace(1) %out1, i32 %inputElement0, i32 %inputElement1, i32 %inputIter) {
+; OPT-LABEL: define amdgpu_kernel void @runningSum(
+; OPT-SAME: ptr addrspace(1) [[OUT0:%.*]], ptr addrspace(1) [[OUT1:%.*]], i32 [[INPUTELEMENT0:%.*]], i32 [[INPUTELEMENT1:%.*]], i32 [[INPUTITER:%.*]]) #[[ATTR0:[0-9]+]] {
+; OPT-NEXT:  [[PREHEADER:.*]]:
+; OPT-NEXT:    [[VECELEMENT0:%.*]] = insertelement <2 x i32> poison, i32 [[INPUTELEMENT0]], i64 0
+; OPT-NEXT:    [[BROADCAST0:%.*]] = shufflevector <2 x i32> [[VECELEMENT0]], <2 x i32> poison, <2 x i32> zeroinitializer
+; OPT-NEXT:    [[VECELEMENT1:%.*]] = insertelement <2 x i32> poison, i32 [[INPUTELEMENT1]], i64 0
+; OPT-NEXT:    [[TMP1:%.*]] = shufflevector <2 x i32> [[VECELEMENT1]], <2 x i32> poison, <2 x i32> zeroinitializer
+; OPT-NEXT:    br label %[[LOOPBODY:.*]]
+; OPT:       [[LOOPBODY]]:
+; OPT-NEXT:    [[PREVIOUSSUM:%.*]] = phi <2 x i32> [ [[TMP1]], %[[PREHEADER]] ], [ [[RUNNINGSUM:%.*]], %[[LOOPBODY]] ]
+; OPT-NEXT:    [[ITERCOUNT:%.*]] = phi i32 [ [[INPUTITER]], %[[PREHEADER]] ], [ [[ITERSLEFT:%.*]], %[[LOOPBODY]] ]
+; OPT-NEXT:    [[RUNNINGSUM]] = add <2 x i32> [[TMP1]], [[PREVIOUSSUM]]
+; OPT-NEXT:    [[ITERSLEFT]] = sub i32 [[ITERCOUNT]], 1
+; OPT-NEXT:    [[COND:%.*]] = icmp eq i32 [[ITERSLEFT]], 0
+; OPT-NEXT:    br i1 [[COND]], label %[[LOOPEXIT:.*]], label %[[LOOPBODY]]
+; OPT:       [[LOOPEXIT]]:
+; OPT-NEXT:    [[SUMELEMENT0:%.*]] = extractelement <2 x i32> [[RUNNINGSUM]], i64 0
+; OPT-NEXT:    [[SUMELEMENT1:%.*]] = extractelement <2 x i32> [[RUNNINGSUM]], i64 1
+; OPT-NEXT:    store i32 [[SUMELEMENT0]], ptr addrspace(1) [[OUT0]], align 4
+; OPT-NEXT:    store i32 [[SUMELEMENT1]], ptr addrspace(1) [[OUT1]], align 4
+; OPT-NEXT:    ret void
+;
+preheader:
+  %vecElement0 = insertelement <2 x i32> poison, i32 %inputElement0, i64 0
+  %broadcast0 = shufflevector <2 x i32> %vecElement0, <2 x i32> poison, <2 x i32> zeroinitializer
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doru1004 wrote:

Fixed :)

https://github.com/llvm/llvm-project/pull/165050