[llvm] [PredicateInfo] Reformat PT_Switch's annotation as valid comments (PR #165249)
Kunqiu Chen via llvm-commits
llvm-commits at lists.llvm.org
Mon Oct 27 06:27:02 PDT 2025
https://github.com/Camsyn created https://github.com/llvm/llvm-project/pull/165249
Previously, PredicateInfo brutally annotated `PT_Switch` as follows:
```python
f'"; switch predicate info ... CaseValue: ... Switch: {*PS->Switch} Edge: ... RenamedOp: ..."'
```
However, the `switch` instruction in LLVM might cross >1 lines, leading to the annotation of `PT_Switch` being **illegal comments**, e.g.,
```LLVM
; switch predicate info { CaseValue: i32 1 Switch: switch i32 %x, label %default [
i32 0, label %case0
i32 1, label %case1
i32 2, label %case0
i32 3, label %case3
i32 4, label %default
] Edge: [label %sw,label %case1], RenamedOp: %x }
x.0 = bitcast i32 %x to i32
```
This patch reformats the `PT_Switch`'s annotation as follows:
```python
f'"; switch predicate info ... CaseValue: ... Edge: ... Switch: \n{with_lines_commented(*PS->Switch)}\n; RenamedOp: ..."'
```
, e.g.,
```LLVM
; switch predicate info { CaseValue: i32 1 Edge: [label %sw,label %case1] Switch:
; switch i32 %x, label %default [
; i32 0, label %case0
; i32 1, label %case1
; i32 2, label %case0
; i32 3, label %case3
; i32 4, label %default
; ]
; , RenamedOp: %x }
x.0 = bitcast i32 %x to i32
```
` RenamedOp: ...` is still the trailing content of the annotation to keep consistency with the annotation of `PT_Assme`/`PT_Bracnh`.
>From 15b589712ea072d47dffc23bbfb266e7c540f7e0 Mon Sep 17 00:00:00 2001
From: Camsyn <camsyn at foxmail.com>
Date: Mon, 27 Oct 2025 21:11:29 +0800
Subject: [PATCH 1/2] Reformat PT_Switch annotation to make it as legal
comments
---
llvm/lib/Transforms/Utils/PredicateInfo.cpp | 18 ++++++++++++++++--
1 file changed, 16 insertions(+), 2 deletions(-)
diff --git a/llvm/lib/Transforms/Utils/PredicateInfo.cpp b/llvm/lib/Transforms/Utils/PredicateInfo.cpp
index 978d5a25a57c8..4f0f756ecc3ca 100644
--- a/llvm/lib/Transforms/Utils/PredicateInfo.cpp
+++ b/llvm/lib/Transforms/Utils/PredicateInfo.cpp
@@ -14,6 +14,7 @@
#include "llvm/ADT/DenseMap.h"
#include "llvm/ADT/STLExtras.h"
#include "llvm/ADT/SmallPtrSet.h"
+#include "llvm/ADT/StringRef.h"
#include "llvm/Analysis/AssumptionCache.h"
#include "llvm/IR/AssemblyAnnotationWriter.h"
#include "llvm/IR/Dominators.h"
@@ -25,6 +26,7 @@
#include "llvm/Support/Debug.h"
#include "llvm/Support/DebugCounter.h"
#include "llvm/Support/FormattedStream.h"
+#include "llvm/Support/raw_ostream.h"
#define DEBUG_TYPE "predicateinfo"
using namespace llvm;
using namespace PatternMatch;
@@ -812,11 +814,23 @@ class PredicateInfoAnnotatedWriter : public AssemblyAnnotationWriter {
OS << "]";
} else if (const auto *PS = dyn_cast<PredicateSwitch>(PI)) {
OS << "; switch predicate info { CaseValue: " << *PS->CaseValue
- << " Switch:" << *PS->Switch << " Edge: [";
+ << " Edge: [";
PS->From->printAsOperand(OS);
OS << ",";
PS->To->printAsOperand(OS);
- OS << "]";
+ OS << "] Switch:\n";
+ // A switch might cross > 1 lines, we should add the comment prefix ';'
+ // for each line
+ std::string SwitchStr;
+ {
+ llvm::raw_string_ostream SwitchOS(SwitchStr);
+ PS->Switch->print(SwitchOS);
+ }
+ SmallVector<StringRef, 8> Lines;
+ StringRef(SwitchStr).split(Lines, '\n');
+ for (const auto &Line : Lines)
+ OS << "; " << Line << "\n";
+ OS << "; ";
} else if (const auto *PA = dyn_cast<PredicateAssume>(PI)) {
OS << "; assume predicate info {"
<< " Comparison:" << *PA->Condition;
>From ac779d741dc82fbfb92493473dae4cf72c60c286 Mon Sep 17 00:00:00 2001
From: Camsyn <camsyn at foxmail.com>
Date: Mon, 27 Oct 2025 21:25:31 +0800
Subject: [PATCH 2/2] Regenerate the test
---
.../Transforms/Util/PredicateInfo/condprop.ll | 20 +++++++------------
1 file changed, 7 insertions(+), 13 deletions(-)
diff --git a/llvm/test/Transforms/Util/PredicateInfo/condprop.ll b/llvm/test/Transforms/Util/PredicateInfo/condprop.ll
index 0235732b95a83..256d0d908ec1e 100644
--- a/llvm/test/Transforms/Util/PredicateInfo/condprop.ll
+++ b/llvm/test/Transforms/Util/PredicateInfo/condprop.ll
@@ -133,19 +133,13 @@ define void @test4(i1 %b, i32 %x) {
; CHECK-LABEL: @test4(
; CHECK-NEXT: br i1 [[B:%.*]], label [[SW:%.*]], label [[CASE3:%.*]]
; CHECK: sw:
-; CHECK: i32 0, label [[CASE0:%.*]]
-; CHECK-NEXT: i32 1, label [[CASE1:%.*]]
-; CHECK-NEXT: i32 2, label [[CASE0]]
-; CHECK-NEXT: i32 3, label [[CASE3]]
-; CHECK-NEXT: i32 4, label [[DEFAULT:%.*]]
-; CHECK-NEXT: ] Edge: [label [[SW]],label %case1], RenamedOp: [[X:%.*]] }
-; CHECK-NEXT: [[X_0:%.*]] = bitcast i32 [[X]] to i32
-; CHECK-NEXT: switch i32 [[X]], label [[DEFAULT]] [
-; CHECK-NEXT: i32 0, label [[CASE0]]
-; CHECK-NEXT: i32 1, label [[CASE1]]
-; CHECK-NEXT: i32 2, label [[CASE0]]
-; CHECK-NEXT: i32 3, label [[CASE3]]
-; CHECK-NEXT: i32 4, label [[DEFAULT]]
+; CHECK: [[X_0:%.*]] = bitcast i32 [[X:%.*]] to i32
+; CHECK-NEXT: switch i32 [[X]], label [[DEFAULT:%.*]] [
+; CHECK-NEXT: i32 0, label [[CASE0:%.*]]
+; CHECK-NEXT: i32 1, label [[CASE1:%.*]]
+; CHECK-NEXT: i32 2, label [[CASE0]]
+; CHECK-NEXT: i32 3, label [[CASE3]]
+; CHECK-NEXT: i32 4, label [[DEFAULT]]
; CHECK-NEXT: ]
; CHECK: default:
; CHECK-NEXT: call void @bar(i32 [[X]])
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