[llvm] [DAGCombiner][X86] Push bitcast/ext through freeze for loads (PR #163070)

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``````````bash
git-clang-format --diff origin/main HEAD --extensions cpp -- llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp llvm/lib/Target/X86/X86ISelLowering.cpp --diff_from_common_commit
``````````

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View the diff from clang-format here.
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``````````diff
diff --git a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
index a60504cbd..f7825a958 100644
--- a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
@@ -14816,9 +14816,8 @@ SDValue DAGCombiner::visitSIGN_EXTEND(SDNode *N) {
   if (N0.getOpcode() == ISD::FREEZE && N0.hasOneUse() && !VT.isVector()) {
     SDValue Res =
         DAG.getFreeze(DAG.getNode(ISD::SIGN_EXTEND, DL, VT, N0.getOperand(0)));
-    return DAG.getNode(
-        ISD::AssertSext, DL, VT, Res,
-        DAG.getValueType(N0.getOperand(0).getValueType()));
+    return DAG.getNode(ISD::AssertSext, DL, VT, Res,
+                       DAG.getValueType(N0.getOperand(0).getValueType()));
   }
 
   return SDValue();
@@ -15203,9 +15202,8 @@ SDValue DAGCombiner::visitZERO_EXTEND(SDNode *N) {
   if (N0.getOpcode() == ISD::FREEZE && N0.hasOneUse() && !VT.isVector()) {
     SDValue Res =
         DAG.getFreeze(DAG.getNode(ISD::ZERO_EXTEND, DL, VT, N0.getOperand(0)));
-    return DAG.getNode(
-        ISD::AssertZext, DL, VT, Res,
-        DAG.getValueType(N0.getOperand(0).getValueType()));
+    return DAG.getNode(ISD::AssertZext, DL, VT, Res,
+                       DAG.getValueType(N0.getOperand(0).getValueType()));
   }
 
   return SDValue();

``````````

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https://github.com/llvm/llvm-project/pull/163070