[llvm] [X86][NewPM] Port X86LowerAMXType to NewPM (PR #165084)
Aiden Grossman via llvm-commits
llvm-commits at lists.llvm.org
Sat Oct 25 10:54:43 PDT 2025
https://github.com/boomanaiden154 updated https://github.com/llvm/llvm-project/pull/165084
>From 4511e302284675410c915b355d488ffe1dac5e0d Mon Sep 17 00:00:00 2001
From: Aiden Grossman <aidengrossman at google.com>
Date: Sat, 25 Oct 2025 07:10:34 +0000
Subject: [PATCH 1/2] =?UTF-8?q?[=F0=9D=98=80=F0=9D=97=BD=F0=9D=97=BF]=20ch?=
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Created using spr 1.3.7
[skip ci]
---
llvm/include/llvm/CodeGen/Passes.h | 8 --------
llvm/lib/Target/X86/X86.h | 8 ++++++++
2 files changed, 8 insertions(+), 8 deletions(-)
diff --git a/llvm/include/llvm/CodeGen/Passes.h b/llvm/include/llvm/CodeGen/Passes.h
index 9fddd47b18965..a8525554b142e 100644
--- a/llvm/include/llvm/CodeGen/Passes.h
+++ b/llvm/include/llvm/CodeGen/Passes.h
@@ -610,14 +610,6 @@ LLVM_ABI ModulePass *createCheckDebugMachineModulePass();
/// caller saved registers with stack slots.
LLVM_ABI extern char &FixupStatepointCallerSavedID;
-/// The pass transforms load/store <256 x i32> to AMX load/store intrinsics
-/// or split the data to two <128 x i32>.
-LLVM_ABI FunctionPass *createX86LowerAMXTypePass();
-
-/// The pass transforms amx intrinsics to scalar operation if the function has
-/// optnone attribute or it is O0.
-LLVM_ABI FunctionPass *createX86LowerAMXIntrinsicsPass();
-
/// When learning an eviction policy, extract score(reward) information,
/// otherwise this does nothing
LLVM_ABI FunctionPass *createRegAllocScoringPass();
diff --git a/llvm/lib/Target/X86/X86.h b/llvm/lib/Target/X86/X86.h
index 6261fadf10a7a..706ab2b62bc1b 100644
--- a/llvm/lib/Target/X86/X86.h
+++ b/llvm/lib/Target/X86/X86.h
@@ -160,6 +160,14 @@ FunctionPass *createX86PartialReductionPass();
/// // Analyzes and emits pseudos to support Win x64 Unwind V2.
FunctionPass *createX86WinEHUnwindV2Pass();
+/// The pass transforms load/store <256 x i32> to AMX load/store intrinsics
+/// or split the data to two <128 x i32>.
+FunctionPass *createX86LowerAMXTypePass();
+
+/// The pass transforms amx intrinsics to scalar operation if the function has
+/// optnone attribute or it is O0.
+FunctionPass *createX86LowerAMXIntrinsicsPass();
+
InstructionSelector *createX86InstructionSelector(const X86TargetMachine &TM,
const X86Subtarget &,
const X86RegisterBankInfo &);
>From 287dcc71ec2cc583001b2986c0b30e3d69bb70a1 Mon Sep 17 00:00:00 2001
From: Aiden Grossman <aidengrossman at google.com>
Date: Sat, 25 Oct 2025 17:54:34 +0000
Subject: [PATCH 2/2] feedback
Created using spr 1.3.7
---
llvm/lib/Target/X86/X86.h | 5 +++--
llvm/lib/Target/X86/X86LowerAMXType.cpp | 4 ++--
llvm/lib/Target/X86/X86PassRegistry.def | 2 +-
llvm/test/CodeGen/X86/amx_tile_pair_lower_type_O0.ll | 3 +--
4 files changed, 7 insertions(+), 7 deletions(-)
diff --git a/llvm/lib/Target/X86/X86.h b/llvm/lib/Target/X86/X86.h
index bac26baa6322e..51b540a7a51d0 100644
--- a/llvm/lib/Target/X86/X86.h
+++ b/llvm/lib/Target/X86/X86.h
@@ -167,11 +167,12 @@ FunctionPass *createX86WinEHUnwindV2Pass();
/// or split the data to two <128 x i32>.
class X86LowerAMXTypePass : public PassInfoMixin<X86LowerAMXTypePass> {
private:
- const TargetMachine &TM;
+ const TargetMachine *TM;
public:
- X86LowerAMXTypePass(const TargetMachine &TM) : TM(TM) {}
+ X86LowerAMXTypePass(const TargetMachine *TM) : TM(TM) {}
PreservedAnalyses run(Function &F, FunctionAnalysisManager &FAM);
+ static bool isRequired() { return true; }
};
FunctionPass *createX86LowerAMXTypeLegacyPass();
diff --git a/llvm/lib/Target/X86/X86LowerAMXType.cpp b/llvm/lib/Target/X86/X86LowerAMXType.cpp
index 74c9a46ab5c00..8ffd454f4f73e 100644
--- a/llvm/lib/Target/X86/X86LowerAMXType.cpp
+++ b/llvm/lib/Target/X86/X86LowerAMXType.cpp
@@ -1461,7 +1461,7 @@ bool lowerAmxType(Function &F, const TargetMachine *TM,
if (TM->getOptLevel() == CodeGenOptLevel::None) {
// If Front End not use O0 but the Mid/Back end use O0, (e.g.
// "Clang -O2 -S -emit-llvm t.c" + "llc t.ll") we should make
- // sure the amx data is volatile, that is nessary for AMX fast
+ // sure the amx data is volatile, that is necessary for AMX fast
// register allocation.
if (!F.hasFnAttribute(Attribute::OptimizeNone)) {
X86VolatileTileData VTD(F);
@@ -1477,7 +1477,7 @@ bool lowerAmxType(Function &F, const TargetMachine *TM,
PreservedAnalyses X86LowerAMXTypePass::run(Function &F,
FunctionAnalysisManager &FAM) {
TargetLibraryInfo &TLI = FAM.getResult<TargetLibraryAnalysis>(F);
- bool Changed = lowerAmxType(F, &TM, &TLI);
+ bool Changed = lowerAmxType(F, TM, &TLI);
if (!Changed)
return PreservedAnalyses::all();
diff --git a/llvm/lib/Target/X86/X86PassRegistry.def b/llvm/lib/Target/X86/X86PassRegistry.def
index 1b83374bf9718..fc25d55d3059a 100644
--- a/llvm/lib/Target/X86/X86PassRegistry.def
+++ b/llvm/lib/Target/X86/X86PassRegistry.def
@@ -15,7 +15,7 @@
#ifndef FUNCTION_PASS
#define FUNCTION_PASS(NAME, CREATE_PASS)
#endif
-FUNCTION_PASS("x86-lower-amx-type", X86LowerAMXTypePass(*this))
+FUNCTION_PASS("x86-lower-amx-type", X86LowerAMXTypePass(this))
#undef FUNCTION_PASS
#ifndef DUMMY_FUNCTION_PASS
diff --git a/llvm/test/CodeGen/X86/amx_tile_pair_lower_type_O0.ll b/llvm/test/CodeGen/X86/amx_tile_pair_lower_type_O0.ll
index 16a93310da7ad..3549875e858a9 100644
--- a/llvm/test/CodeGen/X86/amx_tile_pair_lower_type_O0.ll
+++ b/llvm/test/CodeGen/X86/amx_tile_pair_lower_type_O0.ll
@@ -1,7 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt --codegen-opt-level=0 -mtriple=x86_64 -x86-lower-amx-type %s -S | FileCheck %s
- ; TODO: Test this with the NewPM when we can force this pass to run despite optnone.
- ; RUN-TODO: opt --codegen-opt-level=0 -mtriple=x86_64 -passes=x86-lower-amx-type %s -S &> /tmp/test2.ll | FileCheck %s
+ ; RUN: opt --codegen-opt-level=0 -mtriple=x86_64 -passes=x86-lower-amx-type %s -S | FileCheck %s
@buf = dso_local global [2048 x i8] zeroinitializer, align 16
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