[llvm] [RISCV] 'Zalrsc' may permit non-base instructions (PR #165042)

[Francesco Petrogalli via llvm-commits]

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@@ -0,0 +1,1074 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc -mtriple=riscv32 -mattr=+zalrsc -verify-machineinstrs < %s \
+; RUN:   | FileCheck -check-prefixes=RV32I-ZALRSC %s
+; RUN: llc -mtriple=riscv32 -mattr=+b,+zalrsc,+permissive-zalrsc -verify-machineinstrs < %s \
+; RUN:   | FileCheck -check-prefixes=RV32IB-ZALRSC %s
+; RUN: llc -mtriple=riscv32 -mattr=+a -verify-machineinstrs < %s \
+; RUN:   | FileCheck -check-prefixes=RV32IA %s
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fpetrogalli wrote:

If you want to show that  `+permissive-zalrsc` does not tamper with `+a`, you should have a line that does `+a,+permissive-zalrsc`, and show that the output you get with that is the same as with `+a` alone. Here you just have `+a` alone, and that is already tested in  atomic-rmw.ll. What is the point of having the same test in two places?

https://github.com/llvm/llvm-project/pull/165042