[llvm] [NVPTX] Lower LLVM masked vector loads and stores to PTX (PR #159387)

[Artem Belevich via llvm-commits]

================
@@ -1132,6 +1133,19 @@ bool NVPTXDAGToDAGISel::tryLoad(SDNode *N) {
           ? NVPTX::PTXLdStInstCode::Signed
           : NVPTX::PTXLdStInstCode::Untyped;
 
+  uint32_t UsedBytesMask;
+  switch (N->getOpcode()) {
+  case ISD::LOAD:
+  case ISD::ATOMIC_LOAD:
+    UsedBytesMask = UINT32_MAX;
+    break;
+  case NVPTXISD::MLoadV1:
+    UsedBytesMask = N->getConstantOperandVal(N->getNumOperands() - 2);
----------------
Artem-B wrote:

Does `MLoadV1` have variable number of operands? If it's constant, just use literal operand index.

https://github.com/llvm/llvm-project/pull/159387