[llvm] [X86] Remove LOW32_ADDR_ACCESS_RBP RegisterClass (PR #165018)
via llvm-commits
llvm-commits at lists.llvm.org
Fri Oct 24 10:34:37 PDT 2025
https://github.com/jiang1997 created https://github.com/llvm/llvm-project/pull/165018
This removes the LOW32_ADDR_ACCESS_RBP RegisterClass and refreshes all affected codegen tests
Fixes #155430
>From c4ff50cad58ee8a5c1277a31c164bc870ff5dff7 Mon Sep 17 00:00:00 2001
From: jiang1997 <jieke at live.cn>
Date: Tue, 21 Oct 2025 05:38:37 +0800
Subject: [PATCH] [X86] Remove LOW32_ADDR_ACCESS_RBP RegisterClass
This removes the LOW32_ADDR_ACCESS_RBP RegisterClass and refreshes all affected codegen tests
Fixes #155430
---
llvm/lib/Target/X86/X86ISelLowering.cpp | 3 +-
llvm/lib/Target/X86/X86RegisterInfo.td | 4 -
.../CodeGen/MIR/X86/inline-asm-registers.mir | 8 +-
.../Inputs/reference_x86_vocab_print.txt | 14 -
.../reference_x86_vocab_wo=0.5_print.txt | 14 -
.../CodeGen/X86/GlobalISel/select-copy.mir | 132 +++---
.../CodeGen/X86/GlobalISel/select-ext.mir | 141 +++++--
llvm/test/CodeGen/X86/abds-neg.ll | 79 ++--
llvm/test/CodeGen/X86/abds.ll | 54 +--
llvm/test/CodeGen/X86/abdu-neg.ll | 79 ++--
llvm/test/CodeGen/X86/abdu.ll | 135 +++---
llvm/test/CodeGen/X86/abs.ll | 39 +-
llvm/test/CodeGen/X86/asm-mismatched-types.ll | 88 ++--
llvm/test/CodeGen/X86/asm-reject-rex.ll | 4 +-
llvm/test/CodeGen/X86/bitselect.ll | 49 +--
llvm/test/CodeGen/X86/byval2.ll | 20 +-
llvm/test/CodeGen/X86/byval3.ll | 20 +-
llvm/test/CodeGen/X86/byval4.ll | 20 +-
.../callbr-asm-outputs-indirect-isel-m32.ll | 4 +-
.../X86/callbr-asm-outputs-indirect-isel.ll | 10 +-
.../X86/callbr-asm-outputs-regallocfast.mir | 4 +-
.../X86/div-rem-pair-recomposition-signed.ll | 58 +--
.../div-rem-pair-recomposition-unsigned.ll | 28 +-
llvm/test/CodeGen/X86/fshl.ll | 136 +++---
llvm/test/CodeGen/X86/fshr.ll | 46 +--
llvm/test/CodeGen/X86/funnel-shift.ll | 22 +-
llvm/test/CodeGen/X86/i128-sdiv.ll | 352 +++++++++++++++-
llvm/test/CodeGen/X86/iabs.ll | 39 +-
llvm/test/CodeGen/X86/peephole-copy.mir | 8 +-
llvm/test/CodeGen/X86/physreg-pairs-error.ll | 7 +-
llvm/test/CodeGen/X86/physreg-pairs.ll | 22 +-
llvm/test/CodeGen/X86/popcnt.ll | 389 +++++++++---------
llvm/test/CodeGen/X86/pr34080-2.ll | 10 +-
llvm/test/CodeGen/X86/pr86880.mir | 4 +-
...locfast-callbr-asm-spills-after-reload.mir | 2 +-
llvm/test/CodeGen/X86/scheduler-asm-moves.mir | 4 +-
llvm/test/CodeGen/X86/scmp.ll | 34 +-
llvm/test/CodeGen/X86/sdiv_fix.ll | 4 +-
llvm/test/CodeGen/X86/sdiv_fix_sat.ll | 33 +-
llvm/test/CodeGen/X86/shift-i128.ll | 356 ++++++++--------
llvm/test/CodeGen/X86/shift-i256.ll | 4 +-
llvm/test/CodeGen/X86/smax.ll | 29 +-
llvm/test/CodeGen/X86/smin.ll | 55 +--
.../X86/statepoint-invoke-ra-enter-at-end.mir | 4 +-
llvm/test/CodeGen/X86/ucmp.ll | 16 +-
llvm/test/CodeGen/X86/umax.ll | 29 +-
llvm/test/CodeGen/X86/umin.ll | 55 +--
.../X86/vp2intersect_multiple_pairs.ll | 18 +-
48 files changed, 1542 insertions(+), 1143 deletions(-)
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
index d49f25a950e3a..4bd26a2216ba1 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -61643,8 +61643,7 @@ static bool isGRClass(const TargetRegisterClass &RC) {
return RC.hasSuperClassEq(&X86::GR8RegClass) ||
RC.hasSuperClassEq(&X86::GR16RegClass) ||
RC.hasSuperClassEq(&X86::GR32RegClass) ||
- RC.hasSuperClassEq(&X86::GR64RegClass) ||
- RC.hasSuperClassEq(&X86::LOW32_ADDR_ACCESS_RBPRegClass);
+ RC.hasSuperClassEq(&X86::GR64RegClass);
}
/// Check if \p RC is a vector register class.
diff --git a/llvm/lib/Target/X86/X86RegisterInfo.td b/llvm/lib/Target/X86/X86RegisterInfo.td
index 99b7910131dc5..1c58b31700b75 100644
--- a/llvm/lib/Target/X86/X86RegisterInfo.td
+++ b/llvm/lib/Target/X86/X86RegisterInfo.td
@@ -716,10 +716,6 @@ def GR64_NOREX2_NOSP : RegisterClass<"X86", [i64], 64,
// which we do not have right now.
def LOW32_ADDR_ACCESS : RegisterClass<"X86", [i32], 32, (add GR32, RIP)>;
-// FIXME: This is unused, but deleting it results in codegen changes
-def LOW32_ADDR_ACCESS_RBP : RegisterClass<"X86", [i32], 32,
- (add LOW32_ADDR_ACCESS, RBP)>;
-
// A class to support the 'A' assembler constraint: [ER]AX then [ER]DX.
def GR32_AD : RegisterClass<"X86", [i32], 32, (add EAX, EDX)>;
def GR64_AD : RegisterClass<"X86", [i64], 64, (add RAX, RDX)>;
diff --git a/llvm/test/CodeGen/MIR/X86/inline-asm-registers.mir b/llvm/test/CodeGen/MIR/X86/inline-asm-registers.mir
index 54145a4224895..0ccf7014b8e55 100644
--- a/llvm/test/CodeGen/MIR/X86/inline-asm-registers.mir
+++ b/llvm/test/CodeGen/MIR/X86/inline-asm-registers.mir
@@ -28,8 +28,8 @@ body: |
liveins: $rdi, $rsi
; CHECK-LABEL: name: test
- ; CHECK: INLINEASM &foo, 0 /* attdialect */, 4784138 /* regdef:GR64 */, def $rsi, 4784138 /* regdef:GR64 */, def dead $rdi,
- INLINEASM &foo, 0, 4784138, def $rsi, 4784138, def dead $rdi, 2147549193, killed $rdi, 2147483657, killed $rsi, 12, implicit-def dead early-clobber $eflags
+ ; CHECK: INLINEASM &foo, 0 /* attdialect */, 4390922 /* regdef:GR64 */, def $rsi, 4390922 /* regdef:GR64 */, def dead $rdi,
+ INLINEASM &foo, 0, 4390922, def $rsi, 4390922, def dead $rdi, 2147549193, killed $rdi, 2147483657, killed $rsi, 12, implicit-def dead early-clobber $eflags
$rax = MOV64rr killed $rsi
RET64 killed $rax
...
@@ -45,8 +45,8 @@ body: |
; Verify that the register ties are preserved.
; CHECK-LABEL: name: test2
- ; CHECK: INLINEASM &foo, 0 /* attdialect */, 4784138 /* regdef:GR64 */, def $rsi, 4784138 /* regdef:GR64 */, def dead $rdi, 2147549193 /* reguse tiedto:$1 */, killed $rdi(tied-def 5), 2147483657 /* reguse tiedto:$0 */, killed $rsi(tied-def 3), 12 /* clobber */, implicit-def dead early-clobber $eflags
- INLINEASM &foo, 0, 4784138, def $rsi, 4784138, def dead $rdi, 2147549193, killed $rdi(tied-def 5), 2147483657, killed $rsi(tied-def 3), 12, implicit-def dead early-clobber $eflags
+ ; CHECK: INLINEASM &foo, 0 /* attdialect */, 4390922 /* regdef:GR64 */, def $rsi, 4390922 /* regdef:GR64 */, def dead $rdi, 2147549193 /* reguse tiedto:$1 */, killed $rdi(tied-def 5), 2147483657 /* reguse tiedto:$0 */, killed $rsi(tied-def 3), 12 /* clobber */, implicit-def dead early-clobber $eflags
+ INLINEASM &foo, 0, 4390922, def $rsi, 4390922, def dead $rdi, 2147549193, killed $rdi(tied-def 5), 2147483657, killed $rsi(tied-def 3), 12, implicit-def dead early-clobber $eflags
$rax = MOV64rr killed $rsi
RET64 killed $rax
...
diff --git a/llvm/test/CodeGen/MIR2Vec/Inputs/reference_x86_vocab_print.txt b/llvm/test/CodeGen/MIR2Vec/Inputs/reference_x86_vocab_print.txt
index d3c0da9862245..6f6a24b12176f 100644
--- a/llvm/test/CodeGen/MIR2Vec/Inputs/reference_x86_vocab_print.txt
+++ b/llvm/test/CodeGen/MIR2Vec/Inputs/reference_x86_vocab_print.txt
@@ -6930,18 +6930,14 @@ Key: PhyReg_VK2PAIR: [ 0.00 0.00 ]
Key: PhyReg_VK4PAIR: [ 0.00 0.00 ]
Key: PhyReg_VK8PAIR: [ 0.00 0.00 ]
Key: PhyReg_VK1PAIR_with_sub_mask_0_in_VK1WM: [ 0.00 0.00 ]
-Key: PhyReg_LOW32_ADDR_ACCESS_RBP: [ 0.00 0.00 ]
Key: PhyReg_LOW32_ADDR_ACCESS: [ 0.00 0.00 ]
-Key: PhyReg_LOW32_ADDR_ACCESS_RBP_with_sub_8bit: [ 0.00 0.00 ]
Key: PhyReg_FR32X: [ 0.00 0.00 ]
Key: PhyReg_GR32: [ 0.50 0.50 ]
Key: PhyReg_GR32_NOSP: [ 0.00 0.00 ]
-Key: PhyReg_LOW32_ADDR_ACCESS_RBP_with_sub_16bit_in_GR16_NOREX2: [ 0.00 0.00 ]
Key: PhyReg_DEBUG_REG: [ 0.00 0.00 ]
Key: PhyReg_FR32: [ 0.00 0.00 ]
Key: PhyReg_GR32_NOREX2: [ 0.00 0.00 ]
Key: PhyReg_GR32_NOREX2_NOSP: [ 0.00 0.00 ]
-Key: PhyReg_LOW32_ADDR_ACCESS_RBP_with_sub_16bit_in_GR16_NOREX: [ 0.00 0.00 ]
Key: PhyReg_GR32_NOREX: [ 0.00 0.00 ]
Key: PhyReg_VK32: [ 0.00 0.00 ]
Key: PhyReg_GR32_NOREX_NOSP: [ 0.00 0.00 ]
@@ -6958,7 +6954,6 @@ Key: PhyReg_GR32_CB: [ 0.00 0.00 ]
Key: PhyReg_GR32_DC: [ 0.00 0.00 ]
Key: PhyReg_GR32_DIBP: [ 0.00 0.00 ]
Key: PhyReg_GR32_SIDI: [ 0.00 0.00 ]
-Key: PhyReg_LOW32_ADDR_ACCESS_RBP_with_sub_32bit: [ 0.00 0.00 ]
Key: PhyReg_CCR: [ 0.00 0.00 ]
Key: PhyReg_DFCCR: [ 0.00 0.00 ]
Key: PhyReg_GR32_ABCD_and_GR32_BSI: [ 0.00 0.00 ]
@@ -6968,7 +6963,6 @@ Key: PhyReg_GR32_BPSP_and_GR32_DIBP: [ 0.00 0.00 ]
Key: PhyReg_GR32_BPSP_and_GR32_TC: [ 0.00 0.00 ]
Key: PhyReg_GR32_BSI_and_GR32_SIDI: [ 0.00 0.00 ]
Key: PhyReg_GR32_DIBP_and_GR32_SIDI: [ 0.00 0.00 ]
-Key: PhyReg_LOW32_ADDR_ACCESS_RBP_with_sub_8bit_with_sub_32bit: [ 0.00 0.00 ]
Key: PhyReg_LOW32_ADDR_ACCESS_with_sub_32bit: [ 0.00 0.00 ]
Key: PhyReg_RFP64: [ 0.00 0.00 ]
Key: PhyReg_GR64: [ 0.60 0.60 ]
@@ -7007,7 +7001,6 @@ Key: PhyReg_GR64_with_sub_32bit_in_GR32_TC: [ 0.00 0.00 ]
Key: PhyReg_GR64_with_sub_32bit_in_GR32_ABCD_and_GR32_TC: [ 0.00 0.00 ]
Key: PhyReg_GR64_AD: [ 0.00 0.00 ]
Key: PhyReg_GR64_ArgRef: [ 0.00 0.00 ]
-Key: PhyReg_GR64_and_LOW32_ADDR_ACCESS_RBP: [ 0.00 0.00 ]
Key: PhyReg_GR64_with_sub_32bit_in_GR32_ArgRef: [ 0.00 0.00 ]
Key: PhyReg_GR64_with_sub_32bit_in_GR32_BPSP: [ 0.00 0.00 ]
Key: PhyReg_GR64_with_sub_32bit_in_GR32_BSI: [ 0.00 0.00 ]
@@ -7066,18 +7059,14 @@ Key: VirtReg_VK2PAIR: [ 0.00 0.00 ]
Key: VirtReg_VK4PAIR: [ 0.00 0.00 ]
Key: VirtReg_VK8PAIR: [ 0.00 0.00 ]
Key: VirtReg_VK1PAIR_with_sub_mask_0_in_VK1WM: [ 0.00 0.00 ]
-Key: VirtReg_LOW32_ADDR_ACCESS_RBP: [ 0.00 0.00 ]
Key: VirtReg_LOW32_ADDR_ACCESS: [ 0.00 0.00 ]
-Key: VirtReg_LOW32_ADDR_ACCESS_RBP_with_sub_8bit: [ 0.00 0.00 ]
Key: VirtReg_FR32X: [ 0.00 0.00 ]
Key: VirtReg_GR32: [ 0.80 0.80 ]
Key: VirtReg_GR32_NOSP: [ 0.00 0.00 ]
-Key: VirtReg_LOW32_ADDR_ACCESS_RBP_with_sub_16bit_in_GR16_NOREX2: [ 0.00 0.00 ]
Key: VirtReg_DEBUG_REG: [ 0.00 0.00 ]
Key: VirtReg_FR32: [ 0.00 0.00 ]
Key: VirtReg_GR32_NOREX2: [ 0.00 0.00 ]
Key: VirtReg_GR32_NOREX2_NOSP: [ 0.00 0.00 ]
-Key: VirtReg_LOW32_ADDR_ACCESS_RBP_with_sub_16bit_in_GR16_NOREX: [ 0.00 0.00 ]
Key: VirtReg_GR32_NOREX: [ 0.00 0.00 ]
Key: VirtReg_VK32: [ 0.00 0.00 ]
Key: VirtReg_GR32_NOREX_NOSP: [ 0.00 0.00 ]
@@ -7094,7 +7083,6 @@ Key: VirtReg_GR32_CB: [ 0.00 0.00 ]
Key: VirtReg_GR32_DC: [ 0.00 0.00 ]
Key: VirtReg_GR32_DIBP: [ 0.00 0.00 ]
Key: VirtReg_GR32_SIDI: [ 0.00 0.00 ]
-Key: VirtReg_LOW32_ADDR_ACCESS_RBP_with_sub_32bit: [ 0.00 0.00 ]
Key: VirtReg_CCR: [ 0.00 0.00 ]
Key: VirtReg_DFCCR: [ 0.00 0.00 ]
Key: VirtReg_GR32_ABCD_and_GR32_BSI: [ 0.00 0.00 ]
@@ -7104,7 +7092,6 @@ Key: VirtReg_GR32_BPSP_and_GR32_DIBP: [ 0.00 0.00 ]
Key: VirtReg_GR32_BPSP_and_GR32_TC: [ 0.00 0.00 ]
Key: VirtReg_GR32_BSI_and_GR32_SIDI: [ 0.00 0.00 ]
Key: VirtReg_GR32_DIBP_and_GR32_SIDI: [ 0.00 0.00 ]
-Key: VirtReg_LOW32_ADDR_ACCESS_RBP_with_sub_8bit_with_sub_32bit: [ 0.00 0.00 ]
Key: VirtReg_LOW32_ADDR_ACCESS_with_sub_32bit: [ 0.00 0.00 ]
Key: VirtReg_RFP64: [ 0.00 0.00 ]
Key: VirtReg_GR64: [ 0.90 0.90 ]
@@ -7143,7 +7130,6 @@ Key: VirtReg_GR64_with_sub_32bit_in_GR32_TC: [ 0.00 0.00 ]
Key: VirtReg_GR64_with_sub_32bit_in_GR32_ABCD_and_GR32_TC: [ 0.00 0.00 ]
Key: VirtReg_GR64_AD: [ 0.00 0.00 ]
Key: VirtReg_GR64_ArgRef: [ 0.00 0.00 ]
-Key: VirtReg_GR64_and_LOW32_ADDR_ACCESS_RBP: [ 0.00 0.00 ]
Key: VirtReg_GR64_with_sub_32bit_in_GR32_ArgRef: [ 0.00 0.00 ]
Key: VirtReg_GR64_with_sub_32bit_in_GR32_BPSP: [ 0.00 0.00 ]
Key: VirtReg_GR64_with_sub_32bit_in_GR32_BSI: [ 0.00 0.00 ]
diff --git a/llvm/test/CodeGen/MIR2Vec/Inputs/reference_x86_vocab_wo=0.5_print.txt b/llvm/test/CodeGen/MIR2Vec/Inputs/reference_x86_vocab_wo=0.5_print.txt
index c6e5508248b9b..e6ddc5b319327 100644
--- a/llvm/test/CodeGen/MIR2Vec/Inputs/reference_x86_vocab_wo=0.5_print.txt
+++ b/llvm/test/CodeGen/MIR2Vec/Inputs/reference_x86_vocab_wo=0.5_print.txt
@@ -6930,18 +6930,14 @@ Key: PhyReg_VK2PAIR: [ 0.00 0.00 ]
Key: PhyReg_VK4PAIR: [ 0.00 0.00 ]
Key: PhyReg_VK8PAIR: [ 0.00 0.00 ]
Key: PhyReg_VK1PAIR_with_sub_mask_0_in_VK1WM: [ 0.00 0.00 ]
-Key: PhyReg_LOW32_ADDR_ACCESS_RBP: [ 0.00 0.00 ]
Key: PhyReg_LOW32_ADDR_ACCESS: [ 0.00 0.00 ]
-Key: PhyReg_LOW32_ADDR_ACCESS_RBP_with_sub_8bit: [ 0.00 0.00 ]
Key: PhyReg_FR32X: [ 0.00 0.00 ]
Key: PhyReg_GR32: [ 0.50 0.50 ]
Key: PhyReg_GR32_NOSP: [ 0.00 0.00 ]
-Key: PhyReg_LOW32_ADDR_ACCESS_RBP_with_sub_16bit_in_GR16_NOREX2: [ 0.00 0.00 ]
Key: PhyReg_DEBUG_REG: [ 0.00 0.00 ]
Key: PhyReg_FR32: [ 0.00 0.00 ]
Key: PhyReg_GR32_NOREX2: [ 0.00 0.00 ]
Key: PhyReg_GR32_NOREX2_NOSP: [ 0.00 0.00 ]
-Key: PhyReg_LOW32_ADDR_ACCESS_RBP_with_sub_16bit_in_GR16_NOREX: [ 0.00 0.00 ]
Key: PhyReg_GR32_NOREX: [ 0.00 0.00 ]
Key: PhyReg_VK32: [ 0.00 0.00 ]
Key: PhyReg_GR32_NOREX_NOSP: [ 0.00 0.00 ]
@@ -6958,7 +6954,6 @@ Key: PhyReg_GR32_CB: [ 0.00 0.00 ]
Key: PhyReg_GR32_DC: [ 0.00 0.00 ]
Key: PhyReg_GR32_DIBP: [ 0.00 0.00 ]
Key: PhyReg_GR32_SIDI: [ 0.00 0.00 ]
-Key: PhyReg_LOW32_ADDR_ACCESS_RBP_with_sub_32bit: [ 0.00 0.00 ]
Key: PhyReg_CCR: [ 0.00 0.00 ]
Key: PhyReg_DFCCR: [ 0.00 0.00 ]
Key: PhyReg_GR32_ABCD_and_GR32_BSI: [ 0.00 0.00 ]
@@ -6968,7 +6963,6 @@ Key: PhyReg_GR32_BPSP_and_GR32_DIBP: [ 0.00 0.00 ]
Key: PhyReg_GR32_BPSP_and_GR32_TC: [ 0.00 0.00 ]
Key: PhyReg_GR32_BSI_and_GR32_SIDI: [ 0.00 0.00 ]
Key: PhyReg_GR32_DIBP_and_GR32_SIDI: [ 0.00 0.00 ]
-Key: PhyReg_LOW32_ADDR_ACCESS_RBP_with_sub_8bit_with_sub_32bit: [ 0.00 0.00 ]
Key: PhyReg_LOW32_ADDR_ACCESS_with_sub_32bit: [ 0.00 0.00 ]
Key: PhyReg_RFP64: [ 0.00 0.00 ]
Key: PhyReg_GR64: [ 0.60 0.60 ]
@@ -7007,7 +7001,6 @@ Key: PhyReg_GR64_with_sub_32bit_in_GR32_TC: [ 0.00 0.00 ]
Key: PhyReg_GR64_with_sub_32bit_in_GR32_ABCD_and_GR32_TC: [ 0.00 0.00 ]
Key: PhyReg_GR64_AD: [ 0.00 0.00 ]
Key: PhyReg_GR64_ArgRef: [ 0.00 0.00 ]
-Key: PhyReg_GR64_and_LOW32_ADDR_ACCESS_RBP: [ 0.00 0.00 ]
Key: PhyReg_GR64_with_sub_32bit_in_GR32_ArgRef: [ 0.00 0.00 ]
Key: PhyReg_GR64_with_sub_32bit_in_GR32_BPSP: [ 0.00 0.00 ]
Key: PhyReg_GR64_with_sub_32bit_in_GR32_BSI: [ 0.00 0.00 ]
@@ -7066,18 +7059,14 @@ Key: VirtReg_VK2PAIR: [ 0.00 0.00 ]
Key: VirtReg_VK4PAIR: [ 0.00 0.00 ]
Key: VirtReg_VK8PAIR: [ 0.00 0.00 ]
Key: VirtReg_VK1PAIR_with_sub_mask_0_in_VK1WM: [ 0.00 0.00 ]
-Key: VirtReg_LOW32_ADDR_ACCESS_RBP: [ 0.00 0.00 ]
Key: VirtReg_LOW32_ADDR_ACCESS: [ 0.00 0.00 ]
-Key: VirtReg_LOW32_ADDR_ACCESS_RBP_with_sub_8bit: [ 0.00 0.00 ]
Key: VirtReg_FR32X: [ 0.00 0.00 ]
Key: VirtReg_GR32: [ 0.80 0.80 ]
Key: VirtReg_GR32_NOSP: [ 0.00 0.00 ]
-Key: VirtReg_LOW32_ADDR_ACCESS_RBP_with_sub_16bit_in_GR16_NOREX2: [ 0.00 0.00 ]
Key: VirtReg_DEBUG_REG: [ 0.00 0.00 ]
Key: VirtReg_FR32: [ 0.00 0.00 ]
Key: VirtReg_GR32_NOREX2: [ 0.00 0.00 ]
Key: VirtReg_GR32_NOREX2_NOSP: [ 0.00 0.00 ]
-Key: VirtReg_LOW32_ADDR_ACCESS_RBP_with_sub_16bit_in_GR16_NOREX: [ 0.00 0.00 ]
Key: VirtReg_GR32_NOREX: [ 0.00 0.00 ]
Key: VirtReg_VK32: [ 0.00 0.00 ]
Key: VirtReg_GR32_NOREX_NOSP: [ 0.00 0.00 ]
@@ -7094,7 +7083,6 @@ Key: VirtReg_GR32_CB: [ 0.00 0.00 ]
Key: VirtReg_GR32_DC: [ 0.00 0.00 ]
Key: VirtReg_GR32_DIBP: [ 0.00 0.00 ]
Key: VirtReg_GR32_SIDI: [ 0.00 0.00 ]
-Key: VirtReg_LOW32_ADDR_ACCESS_RBP_with_sub_32bit: [ 0.00 0.00 ]
Key: VirtReg_CCR: [ 0.00 0.00 ]
Key: VirtReg_DFCCR: [ 0.00 0.00 ]
Key: VirtReg_GR32_ABCD_and_GR32_BSI: [ 0.00 0.00 ]
@@ -7104,7 +7092,6 @@ Key: VirtReg_GR32_BPSP_and_GR32_DIBP: [ 0.00 0.00 ]
Key: VirtReg_GR32_BPSP_and_GR32_TC: [ 0.00 0.00 ]
Key: VirtReg_GR32_BSI_and_GR32_SIDI: [ 0.00 0.00 ]
Key: VirtReg_GR32_DIBP_and_GR32_SIDI: [ 0.00 0.00 ]
-Key: VirtReg_LOW32_ADDR_ACCESS_RBP_with_sub_8bit_with_sub_32bit: [ 0.00 0.00 ]
Key: VirtReg_LOW32_ADDR_ACCESS_with_sub_32bit: [ 0.00 0.00 ]
Key: VirtReg_RFP64: [ 0.00 0.00 ]
Key: VirtReg_GR64: [ 0.90 0.90 ]
@@ -7143,7 +7130,6 @@ Key: VirtReg_GR64_with_sub_32bit_in_GR32_TC: [ 0.00 0.00 ]
Key: VirtReg_GR64_with_sub_32bit_in_GR32_ABCD_and_GR32_TC: [ 0.00 0.00 ]
Key: VirtReg_GR64_AD: [ 0.00 0.00 ]
Key: VirtReg_GR64_ArgRef: [ 0.00 0.00 ]
-Key: VirtReg_GR64_and_LOW32_ADDR_ACCESS_RBP: [ 0.00 0.00 ]
Key: VirtReg_GR64_with_sub_32bit_in_GR32_ArgRef: [ 0.00 0.00 ]
Key: VirtReg_GR64_with_sub_32bit_in_GR32_BPSP: [ 0.00 0.00 ]
Key: VirtReg_GR64_with_sub_32bit_in_GR32_BSI: [ 0.00 0.00 ]
diff --git a/llvm/test/CodeGen/X86/GlobalISel/select-copy.mir b/llvm/test/CodeGen/X86/GlobalISel/select-copy.mir
index 41e1b5bf22bf1..cf27eec0c5873 100644
--- a/llvm/test/CodeGen/X86/GlobalISel/select-copy.mir
+++ b/llvm/test/CodeGen/X86/GlobalISel/select-copy.mir
@@ -1,3 +1,4 @@
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 6
# RUN: llc -mtriple=i386-linux-gnu -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=ALL --check-prefix=X32
# RUN: llc -mtriple=x86_64-linux-gnu -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=ALL --check-prefix=X64
@@ -30,24 +31,23 @@
...
---
name: test_copy
-# ALL-LABEL: name: test_copy
alignment: 16
legalized: true
regBankSelected: true
-# ALL: registers:
-# ALL-NEXT: - { id: 0, class: gr8, preferred-register: '', flags: [ ] }
-# ALL-NEXT: - { id: 1, class: gr32, preferred-register: '', flags: [ ] }
registers:
- { id: 0, class: gpr, preferred-register: '' }
- { id: 1, class: gpr, preferred-register: '' }
-# ALL: %0:gr8 = COPY $al
-# ALL-NEXT: %1:gr32 = MOVZX32rr8 %0
-# ALL-NEXT: $eax = COPY %1
-# ALL-NEXT: RET 0, implicit $eax
body: |
bb.1 (%ir-block.0):
liveins: $eax
+ ; ALL-LABEL: name: test_copy
+ ; ALL: liveins: $eax
+ ; ALL-NEXT: {{ $}}
+ ; ALL-NEXT: [[COPY:%[0-9]+]]:gr8 = COPY $al
+ ; ALL-NEXT: [[MOVZX32rr8_:%[0-9]+]]:gr32 = MOVZX32rr8 [[COPY]]
+ ; ALL-NEXT: $eax = COPY [[MOVZX32rr8_]]
+ ; ALL-NEXT: RET 0, implicit $eax
%0(s8) = COPY $al
%1(s32) = G_ZEXT %0(s8)
$eax = COPY %1(s32)
@@ -56,24 +56,23 @@ body: |
...
---
name: test_copy2
-# ALL-LABEL: name: test_copy2
alignment: 16
legalized: true
regBankSelected: true
-# ALL: registers:
-# ALL-NEXT: - { id: 0, class: gr8, preferred-register: '', flags: [ ] }
-# ALL-NEXT: - { id: 1, class: gr32, preferred-register: '', flags: [ ] }
registers:
- { id: 0, class: gpr, preferred-register: '' }
- { id: 1, class: gpr, preferred-register: '' }
-# ALL: %0:gr8 = COPY $al
-# ALL-NEXT: %1:gr32 = MOVZX32rr8 %0
-# ALL-NEXT: $eax = COPY %1
-# ALL-NEXT: RET 0, implicit $eax
body: |
bb.1 (%ir-block.0):
liveins: $eax
+ ; ALL-LABEL: name: test_copy2
+ ; ALL: liveins: $eax
+ ; ALL-NEXT: {{ $}}
+ ; ALL-NEXT: [[COPY:%[0-9]+]]:gr8 = COPY $al
+ ; ALL-NEXT: [[MOVZX32rr8_:%[0-9]+]]:gr32 = MOVZX32rr8 [[COPY]]
+ ; ALL-NEXT: $eax = COPY [[MOVZX32rr8_]]
+ ; ALL-NEXT: RET 0, implicit $eax
%0(s8) = COPY $al
%1(s32) = G_ZEXT %0(s8)
$eax = COPY %1(s32)
@@ -82,30 +81,35 @@ body: |
...
---
name: test_copy3
-# ALL-LABEL: name: test_copy3
alignment: 16
legalized: true
regBankSelected: true
-# ALL: registers:
-# ALL-NEXT: - { id: 0, class: gr16[[ABCD:(_abcd)?]], preferred-register: '', flags: [ ] }
-# X32-NEXT: - { id: 1, class: gr8_abcd_l, preferred-register: '', flags: [ ] }
-# X64-NEXT: - { id: 1, class: gr8, preferred-register: '', flags: [ ] }
-# ALL-NEXT: - { id: 2, class: gr32, preferred-register: '', flags: [ ] }
registers:
- { id: 0, class: gpr, preferred-register: '' }
- { id: 1, class: gpr, preferred-register: '' }
- { id: 2, class: gpr, preferred-register: '' }
-# ALL: %0:gr16 = COPY $ax
-# X32-NEXT: %3:gr16_abcd = COPY %0
-# X32-NEXT: %1:gr8_abcd_l = COPY %3.sub_8bit
-# X64-NEXT: %1:gr8 = COPY %0.sub_8bit
-# ALL-NEXT: %2:gr32 = MOVZX32rr8 %1
-# ALL-NEXT: $eax = COPY %2
-# ALL-NEXT: RET 0, implicit $eax
body: |
bb.1 (%ir-block.0):
liveins: $eax
+ ; X32-LABEL: name: test_copy3
+ ; X32: liveins: $eax
+ ; X32-NEXT: {{ $}}
+ ; X32-NEXT: [[COPY:%[0-9]+]]:gr16 = COPY $ax
+ ; X32-NEXT: [[COPY1:%[0-9]+]]:gr16_abcd = COPY [[COPY]]
+ ; X32-NEXT: [[COPY2:%[0-9]+]]:gr8_abcd_l = COPY [[COPY1]].sub_8bit
+ ; X32-NEXT: [[MOVZX32rr8_:%[0-9]+]]:gr32 = MOVZX32rr8 [[COPY2]]
+ ; X32-NEXT: $eax = COPY [[MOVZX32rr8_]]
+ ; X32-NEXT: RET 0, implicit $eax
+ ;
+ ; X64-LABEL: name: test_copy3
+ ; X64: liveins: $eax
+ ; X64-NEXT: {{ $}}
+ ; X64-NEXT: [[COPY:%[0-9]+]]:gr16 = COPY $ax
+ ; X64-NEXT: [[COPY1:%[0-9]+]]:gr8 = COPY [[COPY]].sub_8bit
+ ; X64-NEXT: [[MOVZX32rr8_:%[0-9]+]]:gr32 = MOVZX32rr8 [[COPY1]]
+ ; X64-NEXT: $eax = COPY [[MOVZX32rr8_]]
+ ; X64-NEXT: RET 0, implicit $eax
%0(s16) = COPY $ax
%1(s8) = G_TRUNC %0(s16)
%2(s32) = G_ZEXT %1(s8)
@@ -115,27 +119,25 @@ body: |
...
---
name: test_copy4
-# ALL-LABEL: name: test_copy4
alignment: 16
legalized: true
regBankSelected: true
-# ALL: registers:
-# ALL-NEXT: - { id: 0, class: gr32, preferred-register: '', flags: [ ] }
-# ALL-NEXT: - { id: 1, class: gr16, preferred-register: '', flags: [ ] }
-# ALL-NEXT: - { id: 2, class: gr32, preferred-register: '', flags: [ ] }
registers:
- { id: 0, class: gpr, preferred-register: '' }
- { id: 1, class: gpr, preferred-register: '' }
- { id: 2, class: gpr, preferred-register: '' }
-# ALL: %0:gr32 = COPY $eax
-# ALL-NEXT: %1:gr16 = COPY %0.sub_16bit
-# ALL-NEXT: %2:gr32 = MOVZX32rr16 %1
-# ALL-NEXT: $eax = COPY %2
-# ALL-NEXT: RET 0, implicit $eax
body: |
bb.1 (%ir-block.0):
liveins: $eax
+ ; ALL-LABEL: name: test_copy4
+ ; ALL: liveins: $eax
+ ; ALL-NEXT: {{ $}}
+ ; ALL-NEXT: [[COPY:%[0-9]+]]:gr32 = COPY $eax
+ ; ALL-NEXT: [[COPY1:%[0-9]+]]:gr16 = COPY [[COPY]].sub_16bit
+ ; ALL-NEXT: [[MOVZX32rr16_:%[0-9]+]]:gr32 = MOVZX32rr16 [[COPY1]]
+ ; ALL-NEXT: $eax = COPY [[MOVZX32rr16_]]
+ ; ALL-NEXT: RET 0, implicit $eax
%0(s32) = COPY $eax
%1(s16) = G_TRUNC %0(s32)
%2(s32) = G_ZEXT %1(s16)
@@ -145,30 +147,35 @@ body: |
...
---
name: test_copy5
-# ALL-LABEL: name: test_copy5
alignment: 16
legalized: true
regBankSelected: true
-# ALL: registers:
-# ALL-NEXT: - { id: 0, class: gr32[[ABCD:(_abcd)?]], preferred-register: '', flags: [ ] }
-# X32-NEXT: - { id: 1, class: gr8_abcd_l, preferred-register: '', flags: [ ] }
-# X64-NEXT: - { id: 1, class: gr8, preferred-register: '', flags: [ ] }
-# ALL-NEXT: - { id: 2, class: gr32, preferred-register: '', flags: [ ] }
registers:
- { id: 0, class: gpr, preferred-register: '' }
- { id: 1, class: gpr, preferred-register: '' }
- { id: 2, class: gpr, preferred-register: '' }
-# ALL: %0:gr32 = COPY $edx
-# X32-NEXT: %3:gr32_abcd = COPY %0
-# X32-NEXT: %1:gr8_abcd_l = COPY %3.sub_8bit
-# X64-NEXT: %1:gr8 = COPY %0.sub_8bit
-# ALL-NEXT: %2:gr32 = MOVZX32rr8 %1
-# ALL-NEXT: $eax = COPY %2
-# ALL-NEXT: RET 0, implicit $eax
body: |
bb.1 (%ir-block.0):
liveins: $eax,$edx
+ ; X32-LABEL: name: test_copy5
+ ; X32: liveins: $eax, $edx
+ ; X32-NEXT: {{ $}}
+ ; X32-NEXT: [[COPY:%[0-9]+]]:gr32 = COPY $edx
+ ; X32-NEXT: [[COPY1:%[0-9]+]]:gr32_abcd = COPY [[COPY]]
+ ; X32-NEXT: [[COPY2:%[0-9]+]]:gr8_abcd_l = COPY [[COPY1]].sub_8bit
+ ; X32-NEXT: [[MOVZX32rr8_:%[0-9]+]]:gr32 = MOVZX32rr8 [[COPY2]]
+ ; X32-NEXT: $eax = COPY [[MOVZX32rr8_]]
+ ; X32-NEXT: RET 0, implicit $eax
+ ;
+ ; X64-LABEL: name: test_copy5
+ ; X64: liveins: $eax, $edx
+ ; X64-NEXT: {{ $}}
+ ; X64-NEXT: [[COPY:%[0-9]+]]:gr32 = COPY $edx
+ ; X64-NEXT: [[COPY1:%[0-9]+]]:gr8 = COPY [[COPY]].sub_8bit
+ ; X64-NEXT: [[MOVZX32rr8_:%[0-9]+]]:gr32 = MOVZX32rr8 [[COPY1]]
+ ; X64-NEXT: $eax = COPY [[MOVZX32rr8_]]
+ ; X64-NEXT: RET 0, implicit $eax
%0(s32) = COPY $edx
%1(s8) = G_TRUNC %0(s32)
%2(s32) = G_ANYEXT %1(s8)
@@ -178,29 +185,26 @@ body: |
...
---
name: test_copy6
-# ALL-LABEL: name: test_copy6
alignment: 16
legalized: true
regBankSelected: true
-# ALL: registers:
-# ALL-NEXT: - { id: 0, class: gr32, preferred-register: '', flags: [ ] }
-# ALL-NEXT: - { id: 1, class: gr16, preferred-register: '', flags: [ ] }
-# ALL-NEXT: - { id: 2, class: low32_addr_access_rbp, preferred-register: '', flags: [ ] }
-# ALL-NEXT: - { id: 3, class: low32_addr_access_rbp, preferred-register: '', flags: [ ] }
registers:
- { id: 0, class: gpr, preferred-register: '' }
- { id: 1, class: gpr, preferred-register: '' }
- { id: 2, class: gpr, preferred-register: '' }
-# ALL: %0:gr32 = COPY $edx
-# ALL-NEXT: %1:gr16 = COPY %0.sub_16bit
-# ALL-NEXT: %3:low32_addr_access_rbp = IMPLICIT_DEF
-# ALL-NEXT: %2:low32_addr_access_rbp = INSERT_SUBREG %3, %1, %subreg.sub_16bit
-# ALL-NEXT: $eax = COPY %2
-# ALL-NEXT: RET 0, implicit $eax
body: |
bb.1 (%ir-block.0):
liveins: $eax,$edx
+ ; ALL-LABEL: name: test_copy6
+ ; ALL: liveins: $eax, $edx
+ ; ALL-NEXT: {{ $}}
+ ; ALL-NEXT: [[COPY:%[0-9]+]]:gr32 = COPY $edx
+ ; ALL-NEXT: [[COPY1:%[0-9]+]]:gr16 = COPY [[COPY]].sub_16bit
+ ; ALL-NEXT: [[DEF:%[0-9]+]]:low32_addr_access = IMPLICIT_DEF
+ ; ALL-NEXT: [[INSERT_SUBREG:%[0-9]+]]:low32_addr_access = INSERT_SUBREG [[DEF]], [[COPY1]], %subreg.sub_16bit
+ ; ALL-NEXT: $eax = COPY [[INSERT_SUBREG]]
+ ; ALL-NEXT: RET 0, implicit $eax
%0(s32) = COPY $edx
%1(s16) = G_TRUNC %0(s32)
%2(s32) = G_ANYEXT %1(s16)
diff --git a/llvm/test/CodeGen/X86/GlobalISel/select-ext.mir b/llvm/test/CodeGen/X86/GlobalISel/select-ext.mir
index 44daf22b00a3c..384eb4fb0593e 100644
--- a/llvm/test/CodeGen/X86/GlobalISel/select-ext.mir
+++ b/llvm/test/CodeGen/X86/GlobalISel/select-ext.mir
@@ -61,13 +61,18 @@ body: |
liveins: $edi
; X86-LABEL: name: test_zext_i1toi8
- ; X86: [[COPY:%[0-9]+]]:gr32_abcd = COPY $edi
+ ; X86: liveins: $edi
+ ; X86-NEXT: {{ $}}
+ ; X86-NEXT: [[COPY:%[0-9]+]]:gr32_abcd = COPY $edi
; X86-NEXT: [[COPY1:%[0-9]+]]:gr8 = COPY [[COPY]].sub_8bit
; X86-NEXT: [[AND8ri:%[0-9]+]]:gr8 = AND8ri [[COPY1]], 1, implicit-def $eflags
; X86-NEXT: $al = COPY [[AND8ri]]
; X86-NEXT: RET 0, implicit $al
+ ;
; X64-LABEL: name: test_zext_i1toi8
- ; X64: [[COPY:%[0-9]+]]:gr32 = COPY $edi
+ ; X64: liveins: $edi
+ ; X64-NEXT: {{ $}}
+ ; X64-NEXT: [[COPY:%[0-9]+]]:gr32 = COPY $edi
; X64-NEXT: [[COPY1:%[0-9]+]]:gr8 = COPY [[COPY]].sub_8bit
; X64-NEXT: [[AND8ri:%[0-9]+]]:gr8 = AND8ri [[COPY1]], 1, implicit-def $eflags
; X64-NEXT: $al = COPY [[AND8ri]]
@@ -94,20 +99,25 @@ body: |
liveins: $edi
; X86-LABEL: name: test_zext_i1toi16
- ; X86: [[COPY:%[0-9]+]]:gr32_abcd = COPY $edi
+ ; X86: liveins: $edi
+ ; X86-NEXT: {{ $}}
+ ; X86-NEXT: [[COPY:%[0-9]+]]:gr32_abcd = COPY $edi
; X86-NEXT: [[COPY1:%[0-9]+]]:gr8 = COPY [[COPY]].sub_8bit
; X86-NEXT: [[DEF:%[0-9]+]]:gr16 = IMPLICIT_DEF
; X86-NEXT: [[INSERT_SUBREG:%[0-9]+]]:gr16 = INSERT_SUBREG [[DEF]], [[COPY1]], %subreg.sub_8bit
- ; X86-NEXT: [[AND16ri_:%[0-9]+]]:gr16 = AND16ri [[INSERT_SUBREG]], 1, implicit-def $eflags
- ; X86-NEXT: $ax = COPY [[AND16ri_]]
+ ; X86-NEXT: [[AND16ri:%[0-9]+]]:gr16 = AND16ri [[INSERT_SUBREG]], 1, implicit-def $eflags
+ ; X86-NEXT: $ax = COPY [[AND16ri]]
; X86-NEXT: RET 0, implicit $ax
+ ;
; X64-LABEL: name: test_zext_i1toi16
- ; X64: [[COPY:%[0-9]+]]:gr32 = COPY $edi
+ ; X64: liveins: $edi
+ ; X64-NEXT: {{ $}}
+ ; X64-NEXT: [[COPY:%[0-9]+]]:gr32 = COPY $edi
; X64-NEXT: [[COPY1:%[0-9]+]]:gr8 = COPY [[COPY]].sub_8bit
; X64-NEXT: [[DEF:%[0-9]+]]:gr16 = IMPLICIT_DEF
; X64-NEXT: [[INSERT_SUBREG:%[0-9]+]]:gr16 = INSERT_SUBREG [[DEF]], [[COPY1]], %subreg.sub_8bit
- ; X64-NEXT: [[AND16ri_:%[0-9]+]]:gr16 = AND16ri [[INSERT_SUBREG]], 1, implicit-def $eflags
- ; X64-NEXT: $ax = COPY [[AND16ri_]]
+ ; X64-NEXT: [[AND16ri:%[0-9]+]]:gr16 = AND16ri [[INSERT_SUBREG]], 1, implicit-def $eflags
+ ; X64-NEXT: $ax = COPY [[AND16ri]]
; X64-NEXT: RET 0, implicit $ax
%0(s32) = COPY $edi
%1(s1) = G_TRUNC %0(s32)
@@ -131,20 +141,25 @@ body: |
liveins: $edi
; X86-LABEL: name: test_zext_i1
- ; X86: [[COPY:%[0-9]+]]:gr32_abcd = COPY $edi
+ ; X86: liveins: $edi
+ ; X86-NEXT: {{ $}}
+ ; X86-NEXT: [[COPY:%[0-9]+]]:gr32_abcd = COPY $edi
; X86-NEXT: [[COPY1:%[0-9]+]]:gr8 = COPY [[COPY]].sub_8bit
; X86-NEXT: [[DEF:%[0-9]+]]:gr32 = IMPLICIT_DEF
; X86-NEXT: [[INSERT_SUBREG:%[0-9]+]]:gr32 = INSERT_SUBREG [[DEF]], [[COPY1]], %subreg.sub_8bit
- ; X86-NEXT: [[AND32ri_:%[0-9]+]]:gr32 = AND32ri [[INSERT_SUBREG]], 1, implicit-def $eflags
- ; X86-NEXT: $eax = COPY [[AND32ri_]]
+ ; X86-NEXT: [[AND32ri:%[0-9]+]]:gr32 = AND32ri [[INSERT_SUBREG]], 1, implicit-def $eflags
+ ; X86-NEXT: $eax = COPY [[AND32ri]]
; X86-NEXT: RET 0, implicit $eax
+ ;
; X64-LABEL: name: test_zext_i1
- ; X64: [[COPY:%[0-9]+]]:gr32 = COPY $edi
+ ; X64: liveins: $edi
+ ; X64-NEXT: {{ $}}
+ ; X64-NEXT: [[COPY:%[0-9]+]]:gr32 = COPY $edi
; X64-NEXT: [[COPY1:%[0-9]+]]:gr8 = COPY [[COPY]].sub_8bit
; X64-NEXT: [[DEF:%[0-9]+]]:gr32 = IMPLICIT_DEF
; X64-NEXT: [[INSERT_SUBREG:%[0-9]+]]:gr32 = INSERT_SUBREG [[DEF]], [[COPY1]], %subreg.sub_8bit
- ; X64-NEXT: [[AND32ri_:%[0-9]+]]:gr32 = AND32ri [[INSERT_SUBREG]], 1, implicit-def $eflags
- ; X64-NEXT: $eax = COPY [[AND32ri_]]
+ ; X64-NEXT: [[AND32ri:%[0-9]+]]:gr32 = AND32ri [[INSERT_SUBREG]], 1, implicit-def $eflags
+ ; X64-NEXT: $eax = COPY [[AND32ri]]
; X64-NEXT: RET 0, implicit $eax
%0(s32) = COPY $edi
%1(s1) = G_TRUNC %0(s32)
@@ -167,12 +182,17 @@ body: |
liveins: $edi
; X86-LABEL: name: test_zext_i8
- ; X86: [[COPY:%[0-9]+]]:gr8 = COPY $dil
+ ; X86: liveins: $edi
+ ; X86-NEXT: {{ $}}
+ ; X86-NEXT: [[COPY:%[0-9]+]]:gr8 = COPY $dil
; X86-NEXT: [[MOVZX32rr8_:%[0-9]+]]:gr32 = MOVZX32rr8 [[COPY]]
; X86-NEXT: $eax = COPY [[MOVZX32rr8_]]
; X86-NEXT: RET 0, implicit $eax
+ ;
; X64-LABEL: name: test_zext_i8
- ; X64: [[COPY:%[0-9]+]]:gr8 = COPY $dil
+ ; X64: liveins: $edi
+ ; X64-NEXT: {{ $}}
+ ; X64-NEXT: [[COPY:%[0-9]+]]:gr8 = COPY $dil
; X64-NEXT: [[MOVZX32rr8_:%[0-9]+]]:gr32 = MOVZX32rr8 [[COPY]]
; X64-NEXT: $eax = COPY [[MOVZX32rr8_]]
; X64-NEXT: RET 0, implicit $eax
@@ -196,12 +216,17 @@ body: |
liveins: $edi
; X86-LABEL: name: test_zext_i16
- ; X86: [[COPY:%[0-9]+]]:gr16 = COPY $di
+ ; X86: liveins: $edi
+ ; X86-NEXT: {{ $}}
+ ; X86-NEXT: [[COPY:%[0-9]+]]:gr16 = COPY $di
; X86-NEXT: [[MOVZX32rr16_:%[0-9]+]]:gr32 = MOVZX32rr16 [[COPY]]
; X86-NEXT: $eax = COPY [[MOVZX32rr16_]]
; X86-NEXT: RET 0, implicit $eax
+ ;
; X64-LABEL: name: test_zext_i16
- ; X64: [[COPY:%[0-9]+]]:gr16 = COPY $di
+ ; X64: liveins: $edi
+ ; X64-NEXT: {{ $}}
+ ; X64-NEXT: [[COPY:%[0-9]+]]:gr16 = COPY $di
; X64-NEXT: [[MOVZX32rr16_:%[0-9]+]]:gr32 = MOVZX32rr16 [[COPY]]
; X64-NEXT: $eax = COPY [[MOVZX32rr16_]]
; X64-NEXT: RET 0, implicit $eax
@@ -225,12 +250,17 @@ body: |
liveins: $edi
; X86-LABEL: name: test_sext_i8
- ; X86: [[COPY:%[0-9]+]]:gr8 = COPY $dil
+ ; X86: liveins: $edi
+ ; X86-NEXT: {{ $}}
+ ; X86-NEXT: [[COPY:%[0-9]+]]:gr8 = COPY $dil
; X86-NEXT: [[MOVSX32rr8_:%[0-9]+]]:gr32 = MOVSX32rr8 [[COPY]]
; X86-NEXT: $eax = COPY [[MOVSX32rr8_]]
; X86-NEXT: RET 0, implicit $eax
+ ;
; X64-LABEL: name: test_sext_i8
- ; X64: [[COPY:%[0-9]+]]:gr8 = COPY $dil
+ ; X64: liveins: $edi
+ ; X64-NEXT: {{ $}}
+ ; X64-NEXT: [[COPY:%[0-9]+]]:gr8 = COPY $dil
; X64-NEXT: [[MOVSX32rr8_:%[0-9]+]]:gr32 = MOVSX32rr8 [[COPY]]
; X64-NEXT: $eax = COPY [[MOVSX32rr8_]]
; X64-NEXT: RET 0, implicit $eax
@@ -254,12 +284,17 @@ body: |
liveins: $edi
; X86-LABEL: name: test_sext_i16
- ; X86: [[COPY:%[0-9]+]]:gr16 = COPY $di
+ ; X86: liveins: $edi
+ ; X86-NEXT: {{ $}}
+ ; X86-NEXT: [[COPY:%[0-9]+]]:gr16 = COPY $di
; X86-NEXT: [[MOVSX32rr16_:%[0-9]+]]:gr32 = MOVSX32rr16 [[COPY]]
; X86-NEXT: $eax = COPY [[MOVSX32rr16_]]
; X86-NEXT: RET 0, implicit $eax
+ ;
; X64-LABEL: name: test_sext_i16
- ; X64: [[COPY:%[0-9]+]]:gr16 = COPY $di
+ ; X64: liveins: $edi
+ ; X64-NEXT: {{ $}}
+ ; X64-NEXT: [[COPY:%[0-9]+]]:gr16 = COPY $di
; X64-NEXT: [[MOVSX32rr16_:%[0-9]+]]:gr32 = MOVSX32rr16 [[COPY]]
; X64-NEXT: $eax = COPY [[MOVSX32rr16_]]
; X64-NEXT: RET 0, implicit $eax
@@ -284,12 +319,17 @@ body: |
liveins: $edi
; X86-LABEL: name: test_anyext_i1toi8
- ; X86: [[COPY:%[0-9]+]]:gr32_abcd = COPY $edi
+ ; X86: liveins: $edi
+ ; X86-NEXT: {{ $}}
+ ; X86-NEXT: [[COPY:%[0-9]+]]:gr32_abcd = COPY $edi
; X86-NEXT: [[COPY1:%[0-9]+]]:gr8 = COPY [[COPY]].sub_8bit
; X86-NEXT: $al = COPY [[COPY1]]
; X86-NEXT: RET 0, implicit $al
+ ;
; X64-LABEL: name: test_anyext_i1toi8
- ; X64: [[COPY:%[0-9]+]]:gr32 = COPY $edi
+ ; X64: liveins: $edi
+ ; X64-NEXT: {{ $}}
+ ; X64-NEXT: [[COPY:%[0-9]+]]:gr32 = COPY $edi
; X64-NEXT: [[COPY1:%[0-9]+]]:gr8 = COPY [[COPY]].sub_8bit
; X64-NEXT: $al = COPY [[COPY1]]
; X64-NEXT: RET 0, implicit $al
@@ -314,13 +354,18 @@ body: |
liveins: $edi
; X86-LABEL: name: test_anyext_i1toi16
- ; X86: [[COPY:%[0-9]+]]:gr32_abcd = COPY $edi
+ ; X86: liveins: $edi
+ ; X86-NEXT: {{ $}}
+ ; X86-NEXT: [[COPY:%[0-9]+]]:gr32_abcd = COPY $edi
; X86-NEXT: [[COPY1:%[0-9]+]]:gr8 = COPY [[COPY]].sub_8bit
; X86-NEXT: [[SUBREG_TO_REG:%[0-9]+]]:gr16 = SUBREG_TO_REG 0, [[COPY1]], %subreg.sub_8bit
; X86-NEXT: $ax = COPY [[SUBREG_TO_REG]]
; X86-NEXT: RET 0, implicit $ax
+ ;
; X64-LABEL: name: test_anyext_i1toi16
- ; X64: [[COPY:%[0-9]+]]:gr32 = COPY $edi
+ ; X64: liveins: $edi
+ ; X64-NEXT: {{ $}}
+ ; X64-NEXT: [[COPY:%[0-9]+]]:gr32 = COPY $edi
; X64-NEXT: [[COPY1:%[0-9]+]]:gr8 = COPY [[COPY]].sub_8bit
; X64-NEXT: [[SUBREG_TO_REG:%[0-9]+]]:gr16 = SUBREG_TO_REG 0, [[COPY1]], %subreg.sub_8bit
; X64-NEXT: $ax = COPY [[SUBREG_TO_REG]]
@@ -346,13 +391,18 @@ body: |
liveins: $edi
; X86-LABEL: name: test_anyext_i1toi32
- ; X86: [[COPY:%[0-9]+]]:gr32_abcd = COPY $edi
+ ; X86: liveins: $edi
+ ; X86-NEXT: {{ $}}
+ ; X86-NEXT: [[COPY:%[0-9]+]]:gr32_abcd = COPY $edi
; X86-NEXT: [[COPY1:%[0-9]+]]:gr8 = COPY [[COPY]].sub_8bit
; X86-NEXT: [[SUBREG_TO_REG:%[0-9]+]]:gr32 = SUBREG_TO_REG 0, [[COPY1]], %subreg.sub_8bit
; X86-NEXT: $eax = COPY [[SUBREG_TO_REG]]
; X86-NEXT: RET 0, implicit $eax
+ ;
; X64-LABEL: name: test_anyext_i1toi32
- ; X64: [[COPY:%[0-9]+]]:gr32 = COPY $edi
+ ; X64: liveins: $edi
+ ; X64-NEXT: {{ $}}
+ ; X64-NEXT: [[COPY:%[0-9]+]]:gr32 = COPY $edi
; X64-NEXT: [[COPY1:%[0-9]+]]:gr8 = COPY [[COPY]].sub_8bit
; X64-NEXT: [[SUBREG_TO_REG:%[0-9]+]]:gr32 = SUBREG_TO_REG 0, [[COPY1]], %subreg.sub_8bit
; X64-NEXT: $eax = COPY [[SUBREG_TO_REG]]
@@ -378,15 +428,20 @@ body: |
liveins: $edi
; X86-LABEL: name: test_anyext_i8toi16
- ; X86: [[COPY:%[0-9]+]]:gr32 = COPY $edi
+ ; X86: liveins: $edi
+ ; X86-NEXT: {{ $}}
+ ; X86-NEXT: [[COPY:%[0-9]+]]:gr32 = COPY $edi
; X86-NEXT: [[COPY1:%[0-9]+]]:gr32_abcd = COPY [[COPY]]
; X86-NEXT: [[COPY2:%[0-9]+]]:gr8_abcd_l = COPY [[COPY1]].sub_8bit
; X86-NEXT: [[MOVZX32rr8_:%[0-9]+]]:gr32 = MOVZX32rr8 [[COPY2]]
; X86-NEXT: [[COPY3:%[0-9]+]]:gr16 = COPY [[MOVZX32rr8_]].sub_16bit
; X86-NEXT: $ax = COPY [[COPY3]]
; X86-NEXT: RET 0, implicit $ax
+ ;
; X64-LABEL: name: test_anyext_i8toi16
- ; X64: [[COPY:%[0-9]+]]:gr32 = COPY $edi
+ ; X64: liveins: $edi
+ ; X64-NEXT: {{ $}}
+ ; X64-NEXT: [[COPY:%[0-9]+]]:gr32 = COPY $edi
; X64-NEXT: [[COPY1:%[0-9]+]]:gr8 = COPY [[COPY]].sub_8bit
; X64-NEXT: [[MOVZX32rr8_:%[0-9]+]]:gr32 = MOVZX32rr8 [[COPY1]]
; X64-NEXT: [[COPY2:%[0-9]+]]:gr16 = COPY [[MOVZX32rr8_]].sub_16bit
@@ -413,14 +468,19 @@ body: |
liveins: $edi
; X86-LABEL: name: test_anyext_i8toi32
- ; X86: [[COPY:%[0-9]+]]:gr32 = COPY $edi
+ ; X86: liveins: $edi
+ ; X86-NEXT: {{ $}}
+ ; X86-NEXT: [[COPY:%[0-9]+]]:gr32 = COPY $edi
; X86-NEXT: [[COPY1:%[0-9]+]]:gr32_abcd = COPY [[COPY]]
; X86-NEXT: [[COPY2:%[0-9]+]]:gr8_abcd_l = COPY [[COPY1]].sub_8bit
; X86-NEXT: [[MOVZX32rr8_:%[0-9]+]]:gr32 = MOVZX32rr8 [[COPY2]]
; X86-NEXT: $eax = COPY [[MOVZX32rr8_]]
; X86-NEXT: RET 0, implicit $eax
+ ;
; X64-LABEL: name: test_anyext_i8toi32
- ; X64: [[COPY:%[0-9]+]]:gr32 = COPY $edi
+ ; X64: liveins: $edi
+ ; X64-NEXT: {{ $}}
+ ; X64-NEXT: [[COPY:%[0-9]+]]:gr32 = COPY $edi
; X64-NEXT: [[COPY1:%[0-9]+]]:gr8 = COPY [[COPY]].sub_8bit
; X64-NEXT: [[MOVZX32rr8_:%[0-9]+]]:gr32 = MOVZX32rr8 [[COPY1]]
; X64-NEXT: $eax = COPY [[MOVZX32rr8_]]
@@ -446,17 +506,22 @@ body: |
liveins: $edi
; X86-LABEL: name: test_anyext_i16toi32
- ; X86: [[COPY:%[0-9]+]]:gr32 = COPY $edi
+ ; X86: liveins: $edi
+ ; X86-NEXT: {{ $}}
+ ; X86-NEXT: [[COPY:%[0-9]+]]:gr32 = COPY $edi
; X86-NEXT: [[COPY1:%[0-9]+]]:gr16 = COPY [[COPY]].sub_16bit
- ; X86-NEXT: [[DEF:%[0-9]+]]:low32_addr_access_rbp = IMPLICIT_DEF
- ; X86-NEXT: [[INSERT_SUBREG:%[0-9]+]]:low32_addr_access_rbp = INSERT_SUBREG [[DEF]], [[COPY1]], %subreg.sub_16bit
+ ; X86-NEXT: [[DEF:%[0-9]+]]:low32_addr_access = IMPLICIT_DEF
+ ; X86-NEXT: [[INSERT_SUBREG:%[0-9]+]]:low32_addr_access = INSERT_SUBREG [[DEF]], [[COPY1]], %subreg.sub_16bit
; X86-NEXT: $eax = COPY [[INSERT_SUBREG]]
; X86-NEXT: RET 0, implicit $eax
+ ;
; X64-LABEL: name: test_anyext_i16toi32
- ; X64: [[COPY:%[0-9]+]]:gr32 = COPY $edi
+ ; X64: liveins: $edi
+ ; X64-NEXT: {{ $}}
+ ; X64-NEXT: [[COPY:%[0-9]+]]:gr32 = COPY $edi
; X64-NEXT: [[COPY1:%[0-9]+]]:gr16 = COPY [[COPY]].sub_16bit
- ; X64-NEXT: [[DEF:%[0-9]+]]:low32_addr_access_rbp = IMPLICIT_DEF
- ; X64-NEXT: [[INSERT_SUBREG:%[0-9]+]]:low32_addr_access_rbp = INSERT_SUBREG [[DEF]], [[COPY1]], %subreg.sub_16bit
+ ; X64-NEXT: [[DEF:%[0-9]+]]:low32_addr_access = IMPLICIT_DEF
+ ; X64-NEXT: [[INSERT_SUBREG:%[0-9]+]]:low32_addr_access = INSERT_SUBREG [[DEF]], [[COPY1]], %subreg.sub_16bit
; X64-NEXT: $eax = COPY [[INSERT_SUBREG]]
; X64-NEXT: RET 0, implicit $eax
%0(s32) = COPY $edi
diff --git a/llvm/test/CodeGen/X86/abds-neg.ll b/llvm/test/CodeGen/X86/abds-neg.ll
index d9064c684cb20..a9f9110444d9a 100644
--- a/llvm/test/CodeGen/X86/abds-neg.ll
+++ b/llvm/test/CodeGen/X86/abds-neg.ll
@@ -655,52 +655,51 @@ define i128 @abd_minmax_i128(i128 %a, i128 %b) nounwind {
; X86-NEXT: pushl %esi
; X86-NEXT: andl $-16, %esp
; X86-NEXT: subl $16, %esp
-; X86-NEXT: movl 40(%ebp), %esi
-; X86-NEXT: movl 24(%ebp), %edi
-; X86-NEXT: movl 28(%ebp), %eax
-; X86-NEXT: cmpl %esi, %edi
-; X86-NEXT: sbbl 44(%ebp), %eax
-; X86-NEXT: movl 48(%ebp), %edx
-; X86-NEXT: movl 32(%ebp), %eax
-; X86-NEXT: sbbl %edx, %eax
-; X86-NEXT: movl 52(%ebp), %ebx
-; X86-NEXT: movl 36(%ebp), %ecx
-; X86-NEXT: movl %ecx, %eax
-; X86-NEXT: sbbl %ebx, %eax
-; X86-NEXT: movl %ebx, %eax
-; X86-NEXT: cmovll %ecx, %eax
-; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
-; X86-NEXT: movl %edx, %eax
-; X86-NEXT: cmovll 32(%ebp), %eax
-; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
-; X86-NEXT: movl 44(%ebp), %eax
-; X86-NEXT: cmovll 28(%ebp), %eax
-; X86-NEXT: movl %esi, %ecx
-; X86-NEXT: cmovll %edi, %ecx
-; X86-NEXT: cmpl %edi, %esi
+; X86-NEXT: movl 40(%ebp), %eax
; X86-NEXT: movl 44(%ebp), %edi
-; X86-NEXT: sbbl 28(%ebp), %edi
-; X86-NEXT: movl %edx, %edi
-; X86-NEXT: sbbl 32(%ebp), %edi
-; X86-NEXT: movl %ebx, %edi
-; X86-NEXT: sbbl 36(%ebp), %edi
+; X86-NEXT: movl 24(%ebp), %esi
+; X86-NEXT: movl 28(%ebp), %ecx
+; X86-NEXT: cmpl %eax, %esi
+; X86-NEXT: sbbl %edi, %ecx
+; X86-NEXT: movl 32(%ebp), %ecx
+; X86-NEXT: sbbl 48(%ebp), %ecx
+; X86-NEXT: movl 52(%ebp), %ebx
+; X86-NEXT: movl 36(%ebp), %edx
+; X86-NEXT: movl %edx, %ecx
+; X86-NEXT: sbbl %ebx, %ecx
+; X86-NEXT: movl %ebx, %ecx
+; X86-NEXT: cmovll %edx, %ecx
+; X86-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
+; X86-NEXT: movl 48(%ebp), %ecx
+; X86-NEXT: cmovll 32(%ebp), %ecx
+; X86-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
+; X86-NEXT: movl %edi, %ecx
+; X86-NEXT: cmovll 28(%ebp), %ecx
+; X86-NEXT: movl %eax, %edx
+; X86-NEXT: cmovll %esi, %edx
+; X86-NEXT: cmpl %esi, %eax
+; X86-NEXT: movl %edi, %esi
+; X86-NEXT: sbbl 28(%ebp), %esi
+; X86-NEXT: movl 48(%ebp), %esi
+; X86-NEXT: sbbl 32(%ebp), %esi
+; X86-NEXT: movl %ebx, %esi
+; X86-NEXT: sbbl 36(%ebp), %esi
; X86-NEXT: cmovll 36(%ebp), %ebx
-; X86-NEXT: cmovll 32(%ebp), %edx
-; X86-NEXT: movl 44(%ebp), %edi
+; X86-NEXT: movl 48(%ebp), %esi
+; X86-NEXT: cmovll 32(%ebp), %esi
; X86-NEXT: cmovll 28(%ebp), %edi
-; X86-NEXT: cmovll 24(%ebp), %esi
-; X86-NEXT: subl %esi, %ecx
-; X86-NEXT: sbbl %edi, %eax
+; X86-NEXT: cmovll 24(%ebp), %eax
+; X86-NEXT: subl %eax, %edx
+; X86-NEXT: sbbl %edi, %ecx
; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload
-; X86-NEXT: sbbl %edx, %edi
+; X86-NEXT: sbbl %esi, %edi
; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload
; X86-NEXT: sbbl %ebx, %esi
-; X86-NEXT: movl 8(%ebp), %edx
-; X86-NEXT: movl %ecx, (%edx)
-; X86-NEXT: movl %eax, 4(%edx)
-; X86-NEXT: movl %edi, 8(%edx)
-; X86-NEXT: movl %esi, 12(%edx)
-; X86-NEXT: movl %edx, %eax
+; X86-NEXT: movl 8(%ebp), %eax
+; X86-NEXT: movl %edx, (%eax)
+; X86-NEXT: movl %ecx, 4(%eax)
+; X86-NEXT: movl %edi, 8(%eax)
+; X86-NEXT: movl %esi, 12(%eax)
; X86-NEXT: leal -12(%ebp), %esp
; X86-NEXT: popl %esi
; X86-NEXT: popl %edi
diff --git a/llvm/test/CodeGen/X86/abds.ll b/llvm/test/CodeGen/X86/abds.ll
index a1a4ba81ae493..a99293849228c 100644
--- a/llvm/test/CodeGen/X86/abds.ll
+++ b/llvm/test/CodeGen/X86/abds.ll
@@ -1045,9 +1045,12 @@ define i128 @abd_subnsw_i128(i128 %a, i128 %b) nounwind {
; X86: # %bb.0:
; X86-NEXT: pushl %ebp
; X86-NEXT: movl %esp, %ebp
+; X86-NEXT: pushl %ebx
; X86-NEXT: pushl %edi
; X86-NEXT: pushl %esi
; X86-NEXT: andl $-16, %esp
+; X86-NEXT: subl $16, %esp
+; X86-NEXT: movl 8(%ebp), %eax
; X86-NEXT: movl 32(%ebp), %edx
; X86-NEXT: movl 36(%ebp), %ecx
; X86-NEXT: movl 24(%ebp), %edi
@@ -1056,24 +1059,24 @@ define i128 @abd_subnsw_i128(i128 %a, i128 %b) nounwind {
; X86-NEXT: sbbl 44(%ebp), %esi
; X86-NEXT: sbbl 48(%ebp), %edx
; X86-NEXT: sbbl 52(%ebp), %ecx
-; X86-NEXT: movl %ecx, %eax
-; X86-NEXT: sarl $31, %eax
-; X86-NEXT: xorl %eax, %ecx
-; X86-NEXT: xorl %eax, %edx
-; X86-NEXT: xorl %eax, %esi
-; X86-NEXT: xorl %eax, %edi
-; X86-NEXT: subl %eax, %edi
-; X86-NEXT: sbbl %eax, %esi
-; X86-NEXT: sbbl %eax, %edx
-; X86-NEXT: sbbl %eax, %ecx
-; X86-NEXT: movl 8(%ebp), %eax
+; X86-NEXT: movl %ecx, %ebx
+; X86-NEXT: sarl $31, %ebx
+; X86-NEXT: xorl %ebx, %ecx
+; X86-NEXT: xorl %ebx, %edx
+; X86-NEXT: xorl %ebx, %esi
+; X86-NEXT: xorl %ebx, %edi
+; X86-NEXT: subl %ebx, %edi
+; X86-NEXT: sbbl %ebx, %esi
+; X86-NEXT: sbbl %ebx, %edx
+; X86-NEXT: sbbl %ebx, %ecx
; X86-NEXT: movl %edi, (%eax)
; X86-NEXT: movl %esi, 4(%eax)
; X86-NEXT: movl %edx, 8(%eax)
; X86-NEXT: movl %ecx, 12(%eax)
-; X86-NEXT: leal -8(%ebp), %esp
+; X86-NEXT: leal -12(%ebp), %esp
; X86-NEXT: popl %esi
; X86-NEXT: popl %edi
+; X86-NEXT: popl %ebx
; X86-NEXT: popl %ebp
; X86-NEXT: retl $4
;
@@ -1100,9 +1103,12 @@ define i128 @abd_subnsw_i128_undef(i128 %a, i128 %b) nounwind {
; X86: # %bb.0:
; X86-NEXT: pushl %ebp
; X86-NEXT: movl %esp, %ebp
+; X86-NEXT: pushl %ebx
; X86-NEXT: pushl %edi
; X86-NEXT: pushl %esi
; X86-NEXT: andl $-16, %esp
+; X86-NEXT: subl $16, %esp
+; X86-NEXT: movl 8(%ebp), %eax
; X86-NEXT: movl 32(%ebp), %edx
; X86-NEXT: movl 36(%ebp), %ecx
; X86-NEXT: movl 24(%ebp), %edi
@@ -1111,24 +1117,24 @@ define i128 @abd_subnsw_i128_undef(i128 %a, i128 %b) nounwind {
; X86-NEXT: sbbl 44(%ebp), %esi
; X86-NEXT: sbbl 48(%ebp), %edx
; X86-NEXT: sbbl 52(%ebp), %ecx
-; X86-NEXT: movl %ecx, %eax
-; X86-NEXT: sarl $31, %eax
-; X86-NEXT: xorl %eax, %ecx
-; X86-NEXT: xorl %eax, %edx
-; X86-NEXT: xorl %eax, %esi
-; X86-NEXT: xorl %eax, %edi
-; X86-NEXT: subl %eax, %edi
-; X86-NEXT: sbbl %eax, %esi
-; X86-NEXT: sbbl %eax, %edx
-; X86-NEXT: sbbl %eax, %ecx
-; X86-NEXT: movl 8(%ebp), %eax
+; X86-NEXT: movl %ecx, %ebx
+; X86-NEXT: sarl $31, %ebx
+; X86-NEXT: xorl %ebx, %ecx
+; X86-NEXT: xorl %ebx, %edx
+; X86-NEXT: xorl %ebx, %esi
+; X86-NEXT: xorl %ebx, %edi
+; X86-NEXT: subl %ebx, %edi
+; X86-NEXT: sbbl %ebx, %esi
+; X86-NEXT: sbbl %ebx, %edx
+; X86-NEXT: sbbl %ebx, %ecx
; X86-NEXT: movl %edi, (%eax)
; X86-NEXT: movl %esi, 4(%eax)
; X86-NEXT: movl %edx, 8(%eax)
; X86-NEXT: movl %ecx, 12(%eax)
-; X86-NEXT: leal -8(%ebp), %esp
+; X86-NEXT: leal -12(%ebp), %esp
; X86-NEXT: popl %esi
; X86-NEXT: popl %edi
+; X86-NEXT: popl %ebx
; X86-NEXT: popl %ebp
; X86-NEXT: retl $4
;
diff --git a/llvm/test/CodeGen/X86/abdu-neg.ll b/llvm/test/CodeGen/X86/abdu-neg.ll
index b7c34070f1af6..841100da0b417 100644
--- a/llvm/test/CodeGen/X86/abdu-neg.ll
+++ b/llvm/test/CodeGen/X86/abdu-neg.ll
@@ -635,52 +635,51 @@ define i128 @abd_minmax_i128(i128 %a, i128 %b) nounwind {
; X86-NEXT: pushl %esi
; X86-NEXT: andl $-16, %esp
; X86-NEXT: subl $16, %esp
-; X86-NEXT: movl 40(%ebp), %esi
-; X86-NEXT: movl 24(%ebp), %edi
-; X86-NEXT: movl 28(%ebp), %eax
-; X86-NEXT: cmpl %esi, %edi
-; X86-NEXT: sbbl 44(%ebp), %eax
-; X86-NEXT: movl 48(%ebp), %edx
-; X86-NEXT: movl 32(%ebp), %eax
-; X86-NEXT: sbbl %edx, %eax
-; X86-NEXT: movl 52(%ebp), %ebx
-; X86-NEXT: movl 36(%ebp), %ecx
-; X86-NEXT: movl %ecx, %eax
-; X86-NEXT: sbbl %ebx, %eax
-; X86-NEXT: movl %ebx, %eax
-; X86-NEXT: cmovbl %ecx, %eax
-; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
-; X86-NEXT: movl %edx, %eax
-; X86-NEXT: cmovbl 32(%ebp), %eax
-; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
-; X86-NEXT: movl 44(%ebp), %eax
-; X86-NEXT: cmovbl 28(%ebp), %eax
-; X86-NEXT: movl %esi, %ecx
-; X86-NEXT: cmovbl %edi, %ecx
-; X86-NEXT: cmpl %edi, %esi
+; X86-NEXT: movl 40(%ebp), %eax
; X86-NEXT: movl 44(%ebp), %edi
-; X86-NEXT: sbbl 28(%ebp), %edi
-; X86-NEXT: movl %edx, %edi
-; X86-NEXT: sbbl 32(%ebp), %edi
-; X86-NEXT: movl %ebx, %edi
-; X86-NEXT: sbbl 36(%ebp), %edi
+; X86-NEXT: movl 24(%ebp), %esi
+; X86-NEXT: movl 28(%ebp), %ecx
+; X86-NEXT: cmpl %eax, %esi
+; X86-NEXT: sbbl %edi, %ecx
+; X86-NEXT: movl 32(%ebp), %ecx
+; X86-NEXT: sbbl 48(%ebp), %ecx
+; X86-NEXT: movl 52(%ebp), %ebx
+; X86-NEXT: movl 36(%ebp), %edx
+; X86-NEXT: movl %edx, %ecx
+; X86-NEXT: sbbl %ebx, %ecx
+; X86-NEXT: movl %ebx, %ecx
+; X86-NEXT: cmovbl %edx, %ecx
+; X86-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
+; X86-NEXT: movl 48(%ebp), %ecx
+; X86-NEXT: cmovbl 32(%ebp), %ecx
+; X86-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
+; X86-NEXT: movl %edi, %ecx
+; X86-NEXT: cmovbl 28(%ebp), %ecx
+; X86-NEXT: movl %eax, %edx
+; X86-NEXT: cmovbl %esi, %edx
+; X86-NEXT: cmpl %esi, %eax
+; X86-NEXT: movl %edi, %esi
+; X86-NEXT: sbbl 28(%ebp), %esi
+; X86-NEXT: movl 48(%ebp), %esi
+; X86-NEXT: sbbl 32(%ebp), %esi
+; X86-NEXT: movl %ebx, %esi
+; X86-NEXT: sbbl 36(%ebp), %esi
; X86-NEXT: cmovbl 36(%ebp), %ebx
-; X86-NEXT: cmovbl 32(%ebp), %edx
-; X86-NEXT: movl 44(%ebp), %edi
+; X86-NEXT: movl 48(%ebp), %esi
+; X86-NEXT: cmovbl 32(%ebp), %esi
; X86-NEXT: cmovbl 28(%ebp), %edi
-; X86-NEXT: cmovbl 24(%ebp), %esi
-; X86-NEXT: subl %esi, %ecx
-; X86-NEXT: sbbl %edi, %eax
+; X86-NEXT: cmovbl 24(%ebp), %eax
+; X86-NEXT: subl %eax, %edx
+; X86-NEXT: sbbl %edi, %ecx
; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload
-; X86-NEXT: sbbl %edx, %edi
+; X86-NEXT: sbbl %esi, %edi
; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload
; X86-NEXT: sbbl %ebx, %esi
-; X86-NEXT: movl 8(%ebp), %edx
-; X86-NEXT: movl %ecx, (%edx)
-; X86-NEXT: movl %eax, 4(%edx)
-; X86-NEXT: movl %edi, 8(%edx)
-; X86-NEXT: movl %esi, 12(%edx)
-; X86-NEXT: movl %edx, %eax
+; X86-NEXT: movl 8(%ebp), %eax
+; X86-NEXT: movl %edx, (%eax)
+; X86-NEXT: movl %ecx, 4(%eax)
+; X86-NEXT: movl %edi, 8(%eax)
+; X86-NEXT: movl %esi, 12(%eax)
; X86-NEXT: leal -12(%ebp), %esp
; X86-NEXT: popl %esi
; X86-NEXT: popl %edi
diff --git a/llvm/test/CodeGen/X86/abdu.ll b/llvm/test/CodeGen/X86/abdu.ll
index 043c9155f52f9..9961480f919f8 100644
--- a/llvm/test/CodeGen/X86/abdu.ll
+++ b/llvm/test/CodeGen/X86/abdu.ll
@@ -328,35 +328,38 @@ define i128 @abd_ext_i128(i128 %a, i128 %b) nounwind {
; X86: # %bb.0:
; X86-NEXT: pushl %ebp
; X86-NEXT: movl %esp, %ebp
+; X86-NEXT: pushl %ebx
; X86-NEXT: pushl %edi
; X86-NEXT: pushl %esi
; X86-NEXT: andl $-16, %esp
+; X86-NEXT: subl $16, %esp
; X86-NEXT: movl 32(%ebp), %edx
; X86-NEXT: movl 36(%ebp), %ecx
; X86-NEXT: movl 24(%ebp), %edi
; X86-NEXT: movl 28(%ebp), %esi
-; X86-NEXT: xorl %eax, %eax
+; X86-NEXT: movl 8(%ebp), %eax
+; X86-NEXT: xorl %ebx, %ebx
; X86-NEXT: subl 40(%ebp), %edi
; X86-NEXT: sbbl 44(%ebp), %esi
; X86-NEXT: sbbl 48(%ebp), %edx
; X86-NEXT: sbbl 52(%ebp), %ecx
-; X86-NEXT: sbbl %eax, %eax
-; X86-NEXT: xorl %eax, %ecx
-; X86-NEXT: xorl %eax, %edx
-; X86-NEXT: xorl %eax, %esi
-; X86-NEXT: xorl %eax, %edi
-; X86-NEXT: subl %eax, %edi
-; X86-NEXT: sbbl %eax, %esi
-; X86-NEXT: sbbl %eax, %edx
-; X86-NEXT: sbbl %eax, %ecx
-; X86-NEXT: movl 8(%ebp), %eax
+; X86-NEXT: sbbl %ebx, %ebx
+; X86-NEXT: xorl %ebx, %ecx
+; X86-NEXT: xorl %ebx, %edx
+; X86-NEXT: xorl %ebx, %esi
+; X86-NEXT: xorl %ebx, %edi
+; X86-NEXT: subl %ebx, %edi
+; X86-NEXT: sbbl %ebx, %esi
+; X86-NEXT: sbbl %ebx, %edx
+; X86-NEXT: sbbl %ebx, %ecx
; X86-NEXT: movl %edi, (%eax)
; X86-NEXT: movl %esi, 4(%eax)
; X86-NEXT: movl %edx, 8(%eax)
; X86-NEXT: movl %ecx, 12(%eax)
-; X86-NEXT: leal -8(%ebp), %esp
+; X86-NEXT: leal -12(%ebp), %esp
; X86-NEXT: popl %esi
; X86-NEXT: popl %edi
+; X86-NEXT: popl %ebx
; X86-NEXT: popl %ebp
; X86-NEXT: retl $4
;
@@ -386,35 +389,38 @@ define i128 @abd_ext_i128_undef(i128 %a, i128 %b) nounwind {
; X86: # %bb.0:
; X86-NEXT: pushl %ebp
; X86-NEXT: movl %esp, %ebp
+; X86-NEXT: pushl %ebx
; X86-NEXT: pushl %edi
; X86-NEXT: pushl %esi
; X86-NEXT: andl $-16, %esp
+; X86-NEXT: subl $16, %esp
; X86-NEXT: movl 32(%ebp), %edx
; X86-NEXT: movl 36(%ebp), %ecx
; X86-NEXT: movl 24(%ebp), %edi
; X86-NEXT: movl 28(%ebp), %esi
-; X86-NEXT: xorl %eax, %eax
+; X86-NEXT: movl 8(%ebp), %eax
+; X86-NEXT: xorl %ebx, %ebx
; X86-NEXT: subl 40(%ebp), %edi
; X86-NEXT: sbbl 44(%ebp), %esi
; X86-NEXT: sbbl 48(%ebp), %edx
; X86-NEXT: sbbl 52(%ebp), %ecx
-; X86-NEXT: sbbl %eax, %eax
-; X86-NEXT: xorl %eax, %ecx
-; X86-NEXT: xorl %eax, %edx
-; X86-NEXT: xorl %eax, %esi
-; X86-NEXT: xorl %eax, %edi
-; X86-NEXT: subl %eax, %edi
-; X86-NEXT: sbbl %eax, %esi
-; X86-NEXT: sbbl %eax, %edx
-; X86-NEXT: sbbl %eax, %ecx
-; X86-NEXT: movl 8(%ebp), %eax
+; X86-NEXT: sbbl %ebx, %ebx
+; X86-NEXT: xorl %ebx, %ecx
+; X86-NEXT: xorl %ebx, %edx
+; X86-NEXT: xorl %ebx, %esi
+; X86-NEXT: xorl %ebx, %edi
+; X86-NEXT: subl %ebx, %edi
+; X86-NEXT: sbbl %ebx, %esi
+; X86-NEXT: sbbl %ebx, %edx
+; X86-NEXT: sbbl %ebx, %ecx
; X86-NEXT: movl %edi, (%eax)
; X86-NEXT: movl %esi, 4(%eax)
; X86-NEXT: movl %edx, 8(%eax)
; X86-NEXT: movl %ecx, 12(%eax)
-; X86-NEXT: leal -8(%ebp), %esp
+; X86-NEXT: leal -12(%ebp), %esp
; X86-NEXT: popl %esi
; X86-NEXT: popl %edi
+; X86-NEXT: popl %ebx
; X86-NEXT: popl %ebp
; X86-NEXT: retl $4
;
@@ -556,35 +562,38 @@ define i128 @abd_minmax_i128(i128 %a, i128 %b) nounwind {
; X86: # %bb.0:
; X86-NEXT: pushl %ebp
; X86-NEXT: movl %esp, %ebp
+; X86-NEXT: pushl %ebx
; X86-NEXT: pushl %edi
; X86-NEXT: pushl %esi
; X86-NEXT: andl $-16, %esp
+; X86-NEXT: subl $16, %esp
; X86-NEXT: movl 32(%ebp), %edx
; X86-NEXT: movl 36(%ebp), %ecx
; X86-NEXT: movl 24(%ebp), %edi
; X86-NEXT: movl 28(%ebp), %esi
-; X86-NEXT: xorl %eax, %eax
+; X86-NEXT: movl 8(%ebp), %eax
+; X86-NEXT: xorl %ebx, %ebx
; X86-NEXT: subl 40(%ebp), %edi
; X86-NEXT: sbbl 44(%ebp), %esi
; X86-NEXT: sbbl 48(%ebp), %edx
; X86-NEXT: sbbl 52(%ebp), %ecx
-; X86-NEXT: sbbl %eax, %eax
-; X86-NEXT: xorl %eax, %ecx
-; X86-NEXT: xorl %eax, %edx
-; X86-NEXT: xorl %eax, %esi
-; X86-NEXT: xorl %eax, %edi
-; X86-NEXT: subl %eax, %edi
-; X86-NEXT: sbbl %eax, %esi
-; X86-NEXT: sbbl %eax, %edx
-; X86-NEXT: sbbl %eax, %ecx
-; X86-NEXT: movl 8(%ebp), %eax
+; X86-NEXT: sbbl %ebx, %ebx
+; X86-NEXT: xorl %ebx, %ecx
+; X86-NEXT: xorl %ebx, %edx
+; X86-NEXT: xorl %ebx, %esi
+; X86-NEXT: xorl %ebx, %edi
+; X86-NEXT: subl %ebx, %edi
+; X86-NEXT: sbbl %ebx, %esi
+; X86-NEXT: sbbl %ebx, %edx
+; X86-NEXT: sbbl %ebx, %ecx
; X86-NEXT: movl %edi, (%eax)
; X86-NEXT: movl %esi, 4(%eax)
; X86-NEXT: movl %edx, 8(%eax)
; X86-NEXT: movl %ecx, 12(%eax)
-; X86-NEXT: leal -8(%ebp), %esp
+; X86-NEXT: leal -12(%ebp), %esp
; X86-NEXT: popl %esi
; X86-NEXT: popl %edi
+; X86-NEXT: popl %ebx
; X86-NEXT: popl %ebp
; X86-NEXT: retl $4
;
@@ -728,35 +737,38 @@ define i128 @abd_cmp_i128(i128 %a, i128 %b) nounwind {
; X86: # %bb.0:
; X86-NEXT: pushl %ebp
; X86-NEXT: movl %esp, %ebp
+; X86-NEXT: pushl %ebx
; X86-NEXT: pushl %edi
; X86-NEXT: pushl %esi
; X86-NEXT: andl $-16, %esp
+; X86-NEXT: subl $16, %esp
; X86-NEXT: movl 32(%ebp), %edx
; X86-NEXT: movl 36(%ebp), %ecx
; X86-NEXT: movl 24(%ebp), %edi
; X86-NEXT: movl 28(%ebp), %esi
-; X86-NEXT: xorl %eax, %eax
+; X86-NEXT: movl 8(%ebp), %eax
+; X86-NEXT: xorl %ebx, %ebx
; X86-NEXT: subl 40(%ebp), %edi
; X86-NEXT: sbbl 44(%ebp), %esi
; X86-NEXT: sbbl 48(%ebp), %edx
; X86-NEXT: sbbl 52(%ebp), %ecx
-; X86-NEXT: sbbl %eax, %eax
-; X86-NEXT: xorl %eax, %ecx
-; X86-NEXT: xorl %eax, %edx
-; X86-NEXT: xorl %eax, %esi
-; X86-NEXT: xorl %eax, %edi
-; X86-NEXT: subl %eax, %edi
-; X86-NEXT: sbbl %eax, %esi
-; X86-NEXT: sbbl %eax, %edx
-; X86-NEXT: sbbl %eax, %ecx
-; X86-NEXT: movl 8(%ebp), %eax
+; X86-NEXT: sbbl %ebx, %ebx
+; X86-NEXT: xorl %ebx, %ecx
+; X86-NEXT: xorl %ebx, %edx
+; X86-NEXT: xorl %ebx, %esi
+; X86-NEXT: xorl %ebx, %edi
+; X86-NEXT: subl %ebx, %edi
+; X86-NEXT: sbbl %ebx, %esi
+; X86-NEXT: sbbl %ebx, %edx
+; X86-NEXT: sbbl %ebx, %ecx
; X86-NEXT: movl %edi, (%eax)
; X86-NEXT: movl %esi, 4(%eax)
; X86-NEXT: movl %edx, 8(%eax)
; X86-NEXT: movl %ecx, 12(%eax)
-; X86-NEXT: leal -8(%ebp), %esp
+; X86-NEXT: leal -12(%ebp), %esp
; X86-NEXT: popl %esi
; X86-NEXT: popl %edi
+; X86-NEXT: popl %ebx
; X86-NEXT: popl %ebp
; X86-NEXT: retl $4
;
@@ -901,35 +913,38 @@ define i128 @abd_select_i128(i128 %a, i128 %b) nounwind {
; X86: # %bb.0:
; X86-NEXT: pushl %ebp
; X86-NEXT: movl %esp, %ebp
+; X86-NEXT: pushl %ebx
; X86-NEXT: pushl %edi
; X86-NEXT: pushl %esi
; X86-NEXT: andl $-16, %esp
+; X86-NEXT: subl $16, %esp
; X86-NEXT: movl 32(%ebp), %edx
; X86-NEXT: movl 36(%ebp), %ecx
; X86-NEXT: movl 24(%ebp), %edi
; X86-NEXT: movl 28(%ebp), %esi
-; X86-NEXT: xorl %eax, %eax
+; X86-NEXT: movl 8(%ebp), %eax
+; X86-NEXT: xorl %ebx, %ebx
; X86-NEXT: subl 40(%ebp), %edi
; X86-NEXT: sbbl 44(%ebp), %esi
; X86-NEXT: sbbl 48(%ebp), %edx
; X86-NEXT: sbbl 52(%ebp), %ecx
-; X86-NEXT: sbbl %eax, %eax
-; X86-NEXT: xorl %eax, %ecx
-; X86-NEXT: xorl %eax, %edx
-; X86-NEXT: xorl %eax, %esi
-; X86-NEXT: xorl %eax, %edi
-; X86-NEXT: subl %eax, %edi
-; X86-NEXT: sbbl %eax, %esi
-; X86-NEXT: sbbl %eax, %edx
-; X86-NEXT: sbbl %eax, %ecx
-; X86-NEXT: movl 8(%ebp), %eax
+; X86-NEXT: sbbl %ebx, %ebx
+; X86-NEXT: xorl %ebx, %ecx
+; X86-NEXT: xorl %ebx, %edx
+; X86-NEXT: xorl %ebx, %esi
+; X86-NEXT: xorl %ebx, %edi
+; X86-NEXT: subl %ebx, %edi
+; X86-NEXT: sbbl %ebx, %esi
+; X86-NEXT: sbbl %ebx, %edx
+; X86-NEXT: sbbl %ebx, %ecx
; X86-NEXT: movl %edi, (%eax)
; X86-NEXT: movl %esi, 4(%eax)
; X86-NEXT: movl %edx, 8(%eax)
; X86-NEXT: movl %ecx, 12(%eax)
-; X86-NEXT: leal -8(%ebp), %esp
+; X86-NEXT: leal -12(%ebp), %esp
; X86-NEXT: popl %esi
; X86-NEXT: popl %edi
+; X86-NEXT: popl %ebx
; X86-NEXT: popl %ebp
; X86-NEXT: retl $4
;
diff --git a/llvm/test/CodeGen/X86/abs.ll b/llvm/test/CodeGen/X86/abs.ll
index e252d5953e60e..07d28781c7c69 100644
--- a/llvm/test/CodeGen/X86/abs.ll
+++ b/llvm/test/CodeGen/X86/abs.ll
@@ -146,31 +146,34 @@ define i128 @test_i128(i128 %a) nounwind {
; X86: # %bb.0:
; X86-NEXT: pushl %ebp
; X86-NEXT: movl %esp, %ebp
+; X86-NEXT: pushl %ebx
; X86-NEXT: pushl %edi
; X86-NEXT: pushl %esi
; X86-NEXT: andl $-16, %esp
-; X86-NEXT: movl 36(%ebp), %ecx
-; X86-NEXT: movl %ecx, %eax
-; X86-NEXT: sarl $31, %eax
-; X86-NEXT: xorl %eax, %ecx
-; X86-NEXT: movl 32(%ebp), %edx
-; X86-NEXT: xorl %eax, %edx
-; X86-NEXT: movl 28(%ebp), %esi
-; X86-NEXT: xorl %eax, %esi
-; X86-NEXT: movl 24(%ebp), %edi
-; X86-NEXT: xorl %eax, %edi
-; X86-NEXT: subl %eax, %edi
-; X86-NEXT: sbbl %eax, %esi
-; X86-NEXT: sbbl %eax, %edx
-; X86-NEXT: sbbl %eax, %ecx
+; X86-NEXT: subl $16, %esp
; X86-NEXT: movl 8(%ebp), %eax
-; X86-NEXT: movl %edi, (%eax)
-; X86-NEXT: movl %esi, 4(%eax)
-; X86-NEXT: movl %edx, 8(%eax)
+; X86-NEXT: movl 36(%ebp), %ecx
+; X86-NEXT: movl %ecx, %edx
+; X86-NEXT: sarl $31, %edx
+; X86-NEXT: xorl %edx, %ecx
+; X86-NEXT: movl 32(%ebp), %esi
+; X86-NEXT: xorl %edx, %esi
+; X86-NEXT: movl 28(%ebp), %edi
+; X86-NEXT: xorl %edx, %edi
+; X86-NEXT: movl 24(%ebp), %ebx
+; X86-NEXT: xorl %edx, %ebx
+; X86-NEXT: subl %edx, %ebx
+; X86-NEXT: sbbl %edx, %edi
+; X86-NEXT: sbbl %edx, %esi
+; X86-NEXT: sbbl %edx, %ecx
+; X86-NEXT: movl %ebx, (%eax)
+; X86-NEXT: movl %edi, 4(%eax)
+; X86-NEXT: movl %esi, 8(%eax)
; X86-NEXT: movl %ecx, 12(%eax)
-; X86-NEXT: leal -8(%ebp), %esp
+; X86-NEXT: leal -12(%ebp), %esp
; X86-NEXT: popl %esi
; X86-NEXT: popl %edi
+; X86-NEXT: popl %ebx
; X86-NEXT: popl %ebp
; X86-NEXT: retl $4
%r = call i128 @llvm.abs.i128(i128 %a, i1 false)
diff --git a/llvm/test/CodeGen/X86/asm-mismatched-types.ll b/llvm/test/CodeGen/X86/asm-mismatched-types.ll
index 47525e025f1dc..892cb86ce6092 100644
--- a/llvm/test/CodeGen/X86/asm-mismatched-types.ll
+++ b/llvm/test/CodeGen/X86/asm-mismatched-types.ll
@@ -8,252 +8,252 @@ target triple = "x86_64--"
; void foo(int p) { register int reg __asm__("r8") = p;
; __asm__ __volatile__("# REG: %0" : : "r" (reg)); }
-; CHECK-LABEL: reg64_as_32:
+; CHECK-LABEL: {{^}}reg64_as_32:
; CHECK: # REG: %r8d
define void @reg64_as_32(i32 %p) {
call void asm sideeffect "# REG: $0", "{r8}"(i32 %p)
ret void
}
-; CHECK-LABEL: reg64_as_32_float:
+; CHECK-LABEL: {{^}}reg64_as_32_float:
; CHECK: # REG: %r8d
define void @reg64_as_32_float(float %p) {
call void asm sideeffect "# REG: $0", "{r8}"(float %p)
ret void
}
-; CHECK-LABEL: reg64_as_16:
+; CHECK-LABEL: {{^}}reg64_as_16:
; CHECK: # REG: %r9w
define void @reg64_as_16(i16 %p) {
call void asm sideeffect "# REG: $0", "{r9}"(i16 %p)
ret void
}
-; CHECK-LABEL: reg64_as_8:
+; CHECK-LABEL: {{^}}reg64_as_8:
; CHECK: # REG: %bpl
define void @reg64_as_8(i8 %p) {
call void asm sideeffect "# REG: $0", "{rbp}"(i8 %p)
ret void
}
-; CHECK-LABEL: reg32_as_16:
-; CHECK: # REG: %r15w
+; CHECK-LABEL: {{^}}reg32_as_16:
+; CHECK: # REG: %r15d
define void @reg32_as_16(i16 %p) {
call void asm sideeffect "# REG: $0", "{r15d}"(i16 %p)
ret void
}
-; CHECK-LABEL: reg32_as_8:
-; CHECK: # REG: %r12b
+; CHECK-LABEL: {{^}}reg32_as_8:
+; CHECK: # REG: %r12d
define void @reg32_as_8(i8 %p) {
call void asm sideeffect "# REG: $0", "{r12d}"(i8 %p)
ret void
}
-; CHECK-LABEL: reg16_as_8:
+; CHECK-LABEL: {{^}}reg16_as_8:
; CHECK: # REG: %cl
define void @reg16_as_8(i8 %p) {
call void asm sideeffect "# REG: $0", "{cx}"(i8 %p)
ret void
}
-; CHECK-LABEL: reg32_as_64:
-; CHECK: # REG: %rbp
+; CHECK-LABEL: {{^}}reg32_as_64:
+; CHECK: # REG: %ebp
define void @reg32_as_64(i64 %p) {
call void asm sideeffect "# REG: $0", "{ebp}"(i64 %p)
ret void
}
-; CHECK-LABEL: reg32_as_64_float:
-; CHECK: # REG: %rbp
+; CHECK-LABEL: {{^}}reg32_as_64_float:
+; CHECK: # REG: %ebp
define void @reg32_as_64_float(double %p) {
call void asm sideeffect "# REG: $0", "{ebp}"(double %p)
ret void
}
-; CHECK-LABEL: reg16_as_64:
+; CHECK-LABEL: {{^}}reg16_as_64:
; CHECK: # REG: %r13
define void @reg16_as_64(i64 %p) {
call void asm sideeffect "# REG: $0", "{r13w}"(i64 %p)
ret void
}
-; CHECK-LABEL: reg16_as_64_float:
+; CHECK-LABEL: {{^}}reg16_as_64_float:
; CHECK: # REG: %r13
define void @reg16_as_64_float(double %p) {
call void asm sideeffect "# REG: $0", "{r13w}"(double %p)
ret void
}
-; CHECK-LABEL: reg8_as_64:
+; CHECK-LABEL: {{^}}reg8_as_64:
; CHECK: # REG: %rax
define void @reg8_as_64(i64 %p) {
call void asm sideeffect "# REG: $0", "{al}"(i64 %p)
ret void
}
-; CHECK-LABEL: reg8_as_64_float:
+; CHECK-LABEL: {{^}}reg8_as_64_float:
; CHECK: # REG: %rax
define void @reg8_as_64_float(double %p) {
call void asm sideeffect "# REG: $0", "{al}"(double %p)
ret void
}
-; CHECK-LABEL: reg16_as_32:
+; CHECK-LABEL: {{^}}reg16_as_32:
; CHECK: # REG: %r11d
define void @reg16_as_32(i32 %p) {
call void asm sideeffect "# REG: $0", "{r11w}"(i32 %p)
ret void
}
-; CHECK-LABEL: reg16_as_32_float:
+; CHECK-LABEL: {{^}}reg16_as_32_float:
; CHECK: # REG: %r11d
define void @reg16_as_32_float(float %p) {
call void asm sideeffect "# REG: $0", "{r11w}"(float %p)
ret void
}
-; CHECK-LABEL: reg8_as_32:
+; CHECK-LABEL: {{^}}reg8_as_32:
; CHECK: # REG: %r9d
define void @reg8_as_32(i32 %p) {
call void asm sideeffect "# REG: $0", "{r9b}"(i32 %p)
ret void
}
-; CHECK-LABEL: reg8_as_32_float:
+; CHECK-LABEL: {{^}}reg8_as_32_float:
; CHECK: # REG: %r9d
define void @reg8_as_32_float(float %p) {
call void asm sideeffect "# REG: $0", "{r9b}"(float %p)
ret void
}
-; CHECK-LABEL: reg8_as_16:
+; CHECK-LABEL: {{^}}reg8_as_16:
; CHECK: # REG: %di
define void @reg8_as_16(i16 %p) {
call void asm sideeffect "# REG: $0", "{dil}"(i16 %p)
ret void
}
-; CHECK-LABEL: egpr_reg64_as_32:
+; CHECK-LABEL: {{^}}egpr_reg64_as_32:
; CHECK: # REG: %r16d
define void @egpr_reg64_as_32(i32 %p) {
call void asm sideeffect "# REG: $0", "{r16}"(i32 %p)
ret void
}
-; CHECK-LABEL: egpr_reg64_as_32_float:
+; CHECK-LABEL: {{^}}egpr_reg64_as_32_float:
; CHECK: # REG: %r16d
define void @egpr_reg64_as_32_float(float %p) {
call void asm sideeffect "# REG: $0", "{r16}"(float %p)
ret void
}
-; CHECK-LABEL: egpr_reg64_as_16:
+; CHECK-LABEL: {{^}}egpr_reg64_as_16:
; CHECK: # REG: %r17w
define void @egpr_reg64_as_16(i16 %p) {
call void asm sideeffect "# REG: $0", "{r17}"(i16 %p)
ret void
}
-; CHECK-LABEL: egpr_reg64_as_8:
+; CHECK-LABEL: {{^}}egpr_reg64_as_8:
; CHECK: # REG: %r21b
define void @egpr_reg64_as_8(i8 %p) {
call void asm sideeffect "# REG: $0", "{r21}"(i8 %p)
ret void
}
-; CHECK-LABEL: egpr_reg32_as_16:
-; CHECK: # REG: %r21w
+; CHECK-LABEL: {{^}}egpr_reg32_as_16:
+; CHECK: # REG: %r21d
define void @egpr_reg32_as_16(i16 %p) {
call void asm sideeffect "# REG: $0", "{r21d}"(i16 %p)
ret void
}
-; CHECK-LABEL: egpr_reg32_as_8:
-; CHECK: # REG: %r20b
+; CHECK-LABEL: {{^}}egpr_reg32_as_8:
+; CHECK: # REG: %r20d
define void @egpr_reg32_as_8(i8 %p) {
call void asm sideeffect "# REG: $0", "{r20d}"(i8 %p)
ret void
}
-; CHECK-LABEL: egpr_reg16_as_8:
+; CHECK-LABEL: {{^}}egpr_reg16_as_8:
; CHECK: # REG: %r17b
define void @egpr_reg16_as_8(i8 %p) {
call void asm sideeffect "# REG: $0", "{r17w}"(i8 %p)
ret void
}
-; CHECK-LABEL: egpr_reg32_as_64:
-; CHECK: # REG: %r21
+; CHECK-LABEL: {{^}}egpr_reg32_as_64:
+; CHECK: # REG: %r21d
define void @egpr_reg32_as_64(i64 %p) {
call void asm sideeffect "# REG: $0", "{r21d}"(i64 %p)
ret void
}
-; CHECK-LABEL: egpr_reg32_as_64_float:
-; CHECK: # REG: %r21
+; CHECK-LABEL: {{^}}egpr_reg32_as_64_float:
+; CHECK: # REG: %r21d
define void @egpr_reg32_as_64_float(double %p) {
call void asm sideeffect "# REG: $0", "{r21d}"(double %p)
ret void
}
-; CHECK-LABEL: egpr_reg16_as_64:
+; CHECK-LABEL: {{^}}egpr_reg16_as_64:
; CHECK: # REG: %r21
define void @egpr_reg16_as_64(i64 %p) {
call void asm sideeffect "# REG: $0", "{r21w}"(i64 %p)
ret void
}
-; CHECK-LABEL: egpr_reg16_as_64_float:
+; CHECK-LABEL: {{^}}egpr_reg16_as_64_float:
; CHECK: # REG: %r21
define void @egpr_reg16_as_64_float(double %p) {
call void asm sideeffect "# REG: $0", "{r21w}"(double %p)
ret void
}
-; CHECK-LABEL: egpr_reg8_as_64:
+; CHECK-LABEL: {{^}}egpr_reg8_as_64:
; CHECK: # REG: %r16
define void @egpr_reg8_as_64(i64 %p) {
call void asm sideeffect "# REG: $0", "{r16b}"(i64 %p)
ret void
}
-; CHECK-LABEL: egpr_reg8_as_64_float:
+; CHECK-LABEL: {{^}}egpr_reg8_as_64_float:
; CHECK: # REG: %r16
define void @egpr_reg8_as_64_float(double %p) {
call void asm sideeffect "# REG: $0", "{r16b}"(double %p)
ret void
}
-; CHECK-LABEL: egpr_reg16_as_32:
+; CHECK-LABEL: {{^}}egpr_reg16_as_32:
; CHECK: # REG: %r19d
define void @egpr_reg16_as_32(i32 %p) {
call void asm sideeffect "# REG: $0", "{r19w}"(i32 %p)
ret void
}
-; CHECK-LABEL: egpr_reg16_as_32_float:
+; CHECK-LABEL: {{^}}egpr_reg16_as_32_float:
; CHECK: # REG: %r19d
define void @egpr_reg16_as_32_float(float %p) {
call void asm sideeffect "# REG: $0", "{r19w}"(float %p)
ret void
}
-; CHECK-LABEL: egpr_reg8_as_32:
+; CHECK-LABEL: {{^}}egpr_reg8_as_32:
; CHECK: # REG: %r17d
define void @egpr_reg8_as_32(i32 %p) {
call void asm sideeffect "# REG: $0", "{r17b}"(i32 %p)
ret void
}
-; CHECK-LABEL: egpr_reg8_as_32_float:
+; CHECK-LABEL: {{^}}egpr_reg8_as_32_float:
; CHECK: # REG: %r17d
define void @egpr_reg8_as_32_float(float %p) {
call void asm sideeffect "# REG: $0", "{r17b}"(float %p)
ret void
}
-; CHECK-LABEL: egpr_reg8_as_16:
+; CHECK-LABEL: {{^}}egpr_reg8_as_16:
; CHECK: # REG: %r18w
define void @egpr_reg8_as_16(i16 %p) {
call void asm sideeffect "# REG: $0", "{r18b}"(i16 %p)
diff --git a/llvm/test/CodeGen/X86/asm-reject-rex.ll b/llvm/test/CodeGen/X86/asm-reject-rex.ll
index f9719b84816a6..d0548ed0371f2 100644
--- a/llvm/test/CodeGen/X86/asm-reject-rex.ll
+++ b/llvm/test/CodeGen/X86/asm-reject-rex.ll
@@ -1,3 +1,4 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
; RUN: not llc -o /dev/null %s -mtriple=i386-unknown-unknown 2>&1 | FileCheck %s
; Make sure X32 still works.
; RUN: llc -o /dev/null %s -mtriple=x86_64-linux-gnux32
@@ -8,13 +9,12 @@ define i64 @blup() {
ret i64 %v
}
-; CHECK: error: couldn't allocate output register for constraint '{r8d}'
+; CHECK: error: couldn't allocate output register for constraint '{rax}'
define i32 @foo() {
%v = tail call i32 asm "", "={r8d},0"(i32 0)
ret i32 %v
}
-; CHECK: error: couldn't allocate output register for constraint '{rax}'
define i64 @bar() {
%v = tail call i64 asm "", "={rax},0"(i64 0)
ret i64 %v
diff --git a/llvm/test/CodeGen/X86/bitselect.ll b/llvm/test/CodeGen/X86/bitselect.ll
index 33381313d3c19..791b28e93628f 100644
--- a/llvm/test/CodeGen/X86/bitselect.ll
+++ b/llvm/test/CodeGen/X86/bitselect.ll
@@ -148,37 +148,40 @@ define i128 @bitselect_i128(i128 %a, i128 %b, i128 %m) nounwind {
; X86: # %bb.0:
; X86-NEXT: pushl %ebp
; X86-NEXT: movl %esp, %ebp
+; X86-NEXT: pushl %ebx
; X86-NEXT: pushl %edi
; X86-NEXT: pushl %esi
; X86-NEXT: andl $-16, %esp
-; X86-NEXT: movl 32(%ebp), %edx
-; X86-NEXT: movl 36(%ebp), %eax
-; X86-NEXT: movl 24(%ebp), %esi
-; X86-NEXT: movl 28(%ebp), %edi
+; X86-NEXT: subl $16, %esp
+; X86-NEXT: movl 8(%ebp), %eax
+; X86-NEXT: movl 32(%ebp), %esi
+; X86-NEXT: movl 36(%ebp), %edx
+; X86-NEXT: movl 24(%ebp), %edi
+; X86-NEXT: movl 28(%ebp), %ebx
; X86-NEXT: movl 40(%ebp), %ecx
-; X86-NEXT: xorl %esi, %ecx
+; X86-NEXT: xorl %edi, %ecx
; X86-NEXT: andl 56(%ebp), %ecx
-; X86-NEXT: xorl %esi, %ecx
-; X86-NEXT: movl 44(%ebp), %esi
-; X86-NEXT: xorl %edi, %esi
-; X86-NEXT: andl 60(%ebp), %esi
-; X86-NEXT: xorl %edi, %esi
-; X86-NEXT: movl 48(%ebp), %edi
-; X86-NEXT: xorl %edx, %edi
-; X86-NEXT: andl 64(%ebp), %edi
-; X86-NEXT: xorl %edx, %edi
-; X86-NEXT: movl 52(%ebp), %edx
-; X86-NEXT: xorl %eax, %edx
-; X86-NEXT: andl 68(%ebp), %edx
-; X86-NEXT: xorl %eax, %edx
-; X86-NEXT: movl 8(%ebp), %eax
-; X86-NEXT: movl %edx, 12(%eax)
-; X86-NEXT: movl %edi, 8(%eax)
-; X86-NEXT: movl %esi, 4(%eax)
+; X86-NEXT: xorl %edi, %ecx
+; X86-NEXT: movl 44(%ebp), %edi
+; X86-NEXT: xorl %ebx, %edi
+; X86-NEXT: andl 60(%ebp), %edi
+; X86-NEXT: xorl %ebx, %edi
+; X86-NEXT: movl 48(%ebp), %ebx
+; X86-NEXT: xorl %esi, %ebx
+; X86-NEXT: andl 64(%ebp), %ebx
+; X86-NEXT: xorl %esi, %ebx
+; X86-NEXT: movl 52(%ebp), %esi
+; X86-NEXT: xorl %edx, %esi
+; X86-NEXT: andl 68(%ebp), %esi
+; X86-NEXT: xorl %edx, %esi
+; X86-NEXT: movl %esi, 12(%eax)
+; X86-NEXT: movl %ebx, 8(%eax)
+; X86-NEXT: movl %edi, 4(%eax)
; X86-NEXT: movl %ecx, (%eax)
-; X86-NEXT: leal -8(%ebp), %esp
+; X86-NEXT: leal -12(%ebp), %esp
; X86-NEXT: popl %esi
; X86-NEXT: popl %edi
+; X86-NEXT: popl %ebx
; X86-NEXT: popl %ebp
; X86-NEXT: retl $4
;
diff --git a/llvm/test/CodeGen/X86/byval2.ll b/llvm/test/CodeGen/X86/byval2.ll
index 77640e4bb5ac6..b759211acd451 100644
--- a/llvm/test/CodeGen/X86/byval2.ll
+++ b/llvm/test/CodeGen/X86/byval2.ll
@@ -39,17 +39,17 @@ define void @g(i64 %a, i64 %b, i64 %c) nounwind {
; X86-NEXT: pushl %esi
; X86-NEXT: andl $-16, %esp
; X86-NEXT: subl $288, %esp # imm = 0x120
-; X86-NEXT: movl 12(%ebp), %eax
-; X86-NEXT: movl %eax, {{[0-9]+}}(%esp)
-; X86-NEXT: movl 8(%ebp), %eax
-; X86-NEXT: movl %eax, {{[0-9]+}}(%esp)
-; X86-NEXT: movl 20(%ebp), %eax
-; X86-NEXT: movl %eax, {{[0-9]+}}(%esp)
-; X86-NEXT: movl 16(%ebp), %eax
-; X86-NEXT: movl %eax, {{[0-9]+}}(%esp)
-; X86-NEXT: movl 28(%ebp), %eax
-; X86-NEXT: movl %eax, {{[0-9]+}}(%esp)
; X86-NEXT: movl 24(%ebp), %eax
+; X86-NEXT: movl 28(%ebp), %ecx
+; X86-NEXT: movl 16(%ebp), %edx
+; X86-NEXT: movl 20(%ebp), %esi
+; X86-NEXT: movl 8(%ebp), %edi
+; X86-NEXT: movl 12(%ebp), %ebx
+; X86-NEXT: movl %ebx, {{[0-9]+}}(%esp)
+; X86-NEXT: movl %edi, {{[0-9]+}}(%esp)
+; X86-NEXT: movl %esi, {{[0-9]+}}(%esp)
+; X86-NEXT: movl %edx, {{[0-9]+}}(%esp)
+; X86-NEXT: movl %ecx, {{[0-9]+}}(%esp)
; X86-NEXT: movl %eax, {{[0-9]+}}(%esp)
; X86-NEXT: leal {{[0-9]+}}(%esp), %ebx
; X86-NEXT: movl $34, %ecx
diff --git a/llvm/test/CodeGen/X86/byval3.ll b/llvm/test/CodeGen/X86/byval3.ll
index eef13f1f1aa27..5df00b6c3518e 100644
--- a/llvm/test/CodeGen/X86/byval3.ll
+++ b/llvm/test/CodeGen/X86/byval3.ll
@@ -48,17 +48,17 @@ define void @g(i32 %a1, i32 %a2, i32 %a3, i32 %a4, i32 %a5, i32 %a6) nounwind {
; X86-NEXT: pushl %esi
; X86-NEXT: andl $-16, %esp
; X86-NEXT: subl $288, %esp # imm = 0x120
-; X86-NEXT: movl 8(%ebp), %eax
-; X86-NEXT: movl %eax, {{[0-9]+}}(%esp)
-; X86-NEXT: movl 12(%ebp), %eax
-; X86-NEXT: movl %eax, {{[0-9]+}}(%esp)
-; X86-NEXT: movl 16(%ebp), %eax
-; X86-NEXT: movl %eax, {{[0-9]+}}(%esp)
-; X86-NEXT: movl 20(%ebp), %eax
-; X86-NEXT: movl %eax, {{[0-9]+}}(%esp)
-; X86-NEXT: movl 24(%ebp), %eax
-; X86-NEXT: movl %eax, {{[0-9]+}}(%esp)
; X86-NEXT: movl 28(%ebp), %eax
+; X86-NEXT: movl 24(%ebp), %ecx
+; X86-NEXT: movl 20(%ebp), %edx
+; X86-NEXT: movl 16(%ebp), %esi
+; X86-NEXT: movl 12(%ebp), %edi
+; X86-NEXT: movl 8(%ebp), %ebx
+; X86-NEXT: movl %ebx, {{[0-9]+}}(%esp)
+; X86-NEXT: movl %edi, {{[0-9]+}}(%esp)
+; X86-NEXT: movl %esi, {{[0-9]+}}(%esp)
+; X86-NEXT: movl %edx, {{[0-9]+}}(%esp)
+; X86-NEXT: movl %ecx, {{[0-9]+}}(%esp)
; X86-NEXT: movl %eax, {{[0-9]+}}(%esp)
; X86-NEXT: leal {{[0-9]+}}(%esp), %ebx
; X86-NEXT: movl $33, %ecx
diff --git a/llvm/test/CodeGen/X86/byval4.ll b/llvm/test/CodeGen/X86/byval4.ll
index bcb2818ee6e51..fcabdcb946630 100644
--- a/llvm/test/CodeGen/X86/byval4.ll
+++ b/llvm/test/CodeGen/X86/byval4.ll
@@ -53,17 +53,17 @@ define void @g(i16 signext %a1, i16 signext %a2, i16 signext %a3,
; X86-NEXT: pushl %esi
; X86-NEXT: andl $-16, %esp
; X86-NEXT: subl $288, %esp # imm = 0x120
-; X86-NEXT: movzwl 8(%ebp), %eax
-; X86-NEXT: movw %ax, {{[0-9]+}}(%esp)
-; X86-NEXT: movzwl 12(%ebp), %eax
-; X86-NEXT: movw %ax, {{[0-9]+}}(%esp)
-; X86-NEXT: movzwl 16(%ebp), %eax
-; X86-NEXT: movw %ax, {{[0-9]+}}(%esp)
-; X86-NEXT: movzwl 20(%ebp), %eax
-; X86-NEXT: movw %ax, {{[0-9]+}}(%esp)
-; X86-NEXT: movzwl 24(%ebp), %eax
-; X86-NEXT: movw %ax, {{[0-9]+}}(%esp)
; X86-NEXT: movzwl 28(%ebp), %eax
+; X86-NEXT: movzwl 24(%ebp), %ecx
+; X86-NEXT: movzwl 20(%ebp), %edx
+; X86-NEXT: movzwl 16(%ebp), %esi
+; X86-NEXT: movzwl 12(%ebp), %edi
+; X86-NEXT: movzwl 8(%ebp), %ebx
+; X86-NEXT: movw %bx, {{[0-9]+}}(%esp)
+; X86-NEXT: movw %di, {{[0-9]+}}(%esp)
+; X86-NEXT: movw %si, {{[0-9]+}}(%esp)
+; X86-NEXT: movw %dx, {{[0-9]+}}(%esp)
+; X86-NEXT: movw %cx, {{[0-9]+}}(%esp)
; X86-NEXT: movw %ax, {{[0-9]+}}(%esp)
; X86-NEXT: leal {{[0-9]+}}(%esp), %ebx
; X86-NEXT: movl $32, %ecx
diff --git a/llvm/test/CodeGen/X86/callbr-asm-outputs-indirect-isel-m32.ll b/llvm/test/CodeGen/X86/callbr-asm-outputs-indirect-isel-m32.ll
index 187298e7b815b..493636b2828a5 100644
--- a/llvm/test/CodeGen/X86/callbr-asm-outputs-indirect-isel-m32.ll
+++ b/llvm/test/CodeGen/X86/callbr-asm-outputs-indirect-isel-m32.ll
@@ -11,7 +11,7 @@ define i8 @emulator_cmpxchg_emulated() {
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[MOV32rm:%[0-9]+]]:gr32 = MOV32rm $noreg, 1, $noreg, 0, $noreg :: (load (s32) from `ptr null`, align 8)
; CHECK-NEXT: [[COPY:%[0-9]+]]:gr32_norex2 = COPY [[MOV32rm]]
- ; CHECK-NEXT: INLINEASM_BR &"", 16 /* maystore attdialect */, 2359306 /* regdef:GR32 */, def %2, 2686986 /* regdef:GR32_NOREX2 */, def %3, 2147549193 /* reguse tiedto:$1 */, [[COPY]](tied-def 5), 13 /* imm */, %bb.2
+ ; CHECK-NEXT: INLINEASM_BR &"", 16 /* maystore attdialect */, 2228234 /* regdef:GR32 */, def %2, 2490378 /* regdef:GR32_NOREX2 */, def %3, 2147549193 /* reguse tiedto:$1 */, [[COPY]](tied-def 5), 13 /* imm */, %bb.2
; CHECK-NEXT: [[COPY1:%[0-9]+]]:gr32 = COPY $eflags
; CHECK-NEXT: $eflags = COPY [[COPY1]]
; CHECK-NEXT: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 4, implicit $eflags
@@ -51,7 +51,7 @@ define i32 @emulator_cmpxchg_emulated2() {
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[MOV32rm:%[0-9]+]]:gr32 = MOV32rm $noreg, 1, $noreg, 0, $noreg :: (load (s32) from `ptr null`, align 8)
; CHECK-NEXT: [[COPY:%[0-9]+]]:gr32_norex2 = COPY [[MOV32rm]]
- ; CHECK-NEXT: INLINEASM_BR &"", 16 /* maystore attdialect */, 2359306 /* regdef:GR32 */, def %2, 2686986 /* regdef:GR32_NOREX2 */, def %3, 2147549193 /* reguse tiedto:$1 */, [[COPY]](tied-def 5), 13 /* imm */, %bb.2
+ ; CHECK-NEXT: INLINEASM_BR &"", 16 /* maystore attdialect */, 2228234 /* regdef:GR32 */, def %2, 2490378 /* regdef:GR32_NOREX2 */, def %3, 2147549193 /* reguse tiedto:$1 */, [[COPY]](tied-def 5), 13 /* imm */, %bb.2
; CHECK-NEXT: [[COPY1:%[0-9]+]]:gr32 = COPY $eflags
; CHECK-NEXT: $eflags = COPY [[COPY1]]
; CHECK-NEXT: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 4, implicit $eflags
diff --git a/llvm/test/CodeGen/X86/callbr-asm-outputs-indirect-isel.ll b/llvm/test/CodeGen/X86/callbr-asm-outputs-indirect-isel.ll
index 433bd254317e6..6d4108d28912c 100644
--- a/llvm/test/CodeGen/X86/callbr-asm-outputs-indirect-isel.ll
+++ b/llvm/test/CodeGen/X86/callbr-asm-outputs-indirect-isel.ll
@@ -10,7 +10,7 @@ define i32 @test0() {
; CHECK: bb.0 (%ir-block.0):
; CHECK-NEXT: successors: %bb.1(0x80000000), %bb.2(0x00000000)
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: INLINEASM_BR &"", 0 /* attdialect */, 2686986 /* regdef:GR32_NOREX2 */, def %1, 13 /* imm */, %bb.2
+ ; CHECK-NEXT: INLINEASM_BR &"", 0 /* attdialect */, 2490378 /* regdef:GR32_NOREX2 */, def %1, 13 /* imm */, %bb.2
; CHECK-NEXT: [[COPY:%[0-9]+]]:gr32 = COPY %1
; CHECK-NEXT: JMP_1 %bb.1
; CHECK-NEXT: {{ $}}
@@ -39,7 +39,7 @@ define i32 @test1() {
; CHECK-NEXT: successors: %bb.2(0x80000000), %bb.1(0x00000000)
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[MOV32ri:%[0-9]+]]:gr32 = MOV32ri 42
- ; CHECK-NEXT: INLINEASM_BR &"", 0 /* attdialect */, 2686986 /* regdef:GR32_NOREX2 */, def %4, 13 /* imm */, %bb.1
+ ; CHECK-NEXT: INLINEASM_BR &"", 0 /* attdialect */, 2490378 /* regdef:GR32_NOREX2 */, def %4, 13 /* imm */, %bb.1
; CHECK-NEXT: [[COPY:%[0-9]+]]:gr32 = COPY %4
; CHECK-NEXT: JMP_1 %bb.2
; CHECK-NEXT: {{ $}}
@@ -72,7 +72,7 @@ define i32 @test2() {
; CHECK-NEXT: successors: %bb.2(0x80000000), %bb.1(0x00000000)
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[MOV32ri:%[0-9]+]]:gr32 = MOV32ri 42
- ; CHECK-NEXT: INLINEASM_BR &"", 0 /* attdialect */, 2686986 /* regdef:GR32_NOREX2 */, def %5, 2686986 /* regdef:GR32_NOREX2 */, def %6, 13 /* imm */, %bb.1
+ ; CHECK-NEXT: INLINEASM_BR &"", 0 /* attdialect */, 2490378 /* regdef:GR32_NOREX2 */, def %5, 2490378 /* regdef:GR32_NOREX2 */, def %6, 13 /* imm */, %bb.1
; CHECK-NEXT: [[COPY:%[0-9]+]]:gr32 = COPY %6
; CHECK-NEXT: [[COPY1:%[0-9]+]]:gr32 = COPY %5
; CHECK-NEXT: JMP_1 %bb.2
@@ -317,7 +317,7 @@ define i32 @test8() {
; CHECK: bb.0.entry:
; CHECK-NEXT: successors: %bb.1(0x80000000)
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: INLINEASM_BR &"# $0", 0 /* attdialect */, 2686986 /* regdef:GR32_NOREX2 */, def %1, 13 /* imm */, %bb.1
+ ; CHECK-NEXT: INLINEASM_BR &"# $0", 0 /* attdialect */, 2490378 /* regdef:GR32_NOREX2 */, def %1, 13 /* imm */, %bb.1
; CHECK-NEXT: [[COPY:%[0-9]+]]:gr32 = COPY %1
; CHECK-NEXT: JMP_1 %bb.1
; CHECK-NEXT: {{ $}}
@@ -338,7 +338,7 @@ define i64 @condition_code() {
; CHECK: bb.0 (%ir-block.0):
; CHECK-NEXT: successors: %bb.1(0x80000000), %bb.2(0x00000000)
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: INLINEASM_BR &"", 16 /* maystore attdialect */, 2359306 /* regdef:GR32 */, def %1, 13 /* imm */, %bb.2
+ ; CHECK-NEXT: INLINEASM_BR &"", 16 /* maystore attdialect */, 2228234 /* regdef:GR32 */, def %1, 13 /* imm */, %bb.2
; CHECK-NEXT: [[SETCCr:%[0-9]+]]:gr8 = SETCCr 4, implicit $eflags
; CHECK-NEXT: [[MOVZX32rr8_:%[0-9]+]]:gr32 = MOVZX32rr8 killed [[SETCCr]]
; CHECK-NEXT: [[SUBREG_TO_REG:%[0-9]+]]:gr64 = SUBREG_TO_REG 0, killed [[MOVZX32rr8_]], %subreg.sub_32bit
diff --git a/llvm/test/CodeGen/X86/callbr-asm-outputs-regallocfast.mir b/llvm/test/CodeGen/X86/callbr-asm-outputs-regallocfast.mir
index f5af0ad91f40f..b4fcd707d1fed 100644
--- a/llvm/test/CodeGen/X86/callbr-asm-outputs-regallocfast.mir
+++ b/llvm/test/CodeGen/X86/callbr-asm-outputs-regallocfast.mir
@@ -118,7 +118,7 @@ body: |
; CHECK-NEXT: MOV32mi %stack.0.retval, 1, $noreg, 0, $noreg, 0 :: (store (s32) into %ir.retval)
; CHECK-NEXT: MOV32mi %stack.1.x, 1, $noreg, 0, $noreg, 123 :: (store (s32) into %ir.x)
; CHECK-NEXT: renamable $eax = MOV32ri 45
- ; CHECK-NEXT: INLINEASM_BR &"mov $1, $0\0A\09jmp ${2:l}", 0 /* attdialect */, 2359306 /* regdef:GR32 */, def renamable $eax, 2359305 /* reguse:GR32 */, killed renamable $eax, 13 /* imm */, %bb.3, 12 /* clobber */, implicit-def dead early-clobber $df, 12 /* clobber */, implicit-def early-clobber $fpsw, 12 /* clobber */, implicit-def dead early-clobber $eflags, !5
+ ; CHECK-NEXT: INLINEASM_BR &"mov $1, $0\0A\09jmp ${2:l}", 0 /* attdialect */, 2228234 /* regdef:GR32 */, def renamable $eax, 2228233 /* reguse:GR32 */, killed renamable $eax, 13 /* imm */, %bb.3, 12 /* clobber */, implicit-def dead early-clobber $df, 12 /* clobber */, implicit-def early-clobber $fpsw, 12 /* clobber */, implicit-def dead early-clobber $eflags, !5
; CHECK-NEXT: MOV32mr %stack.3, 1, $noreg, 0, $noreg, $eax :: (store (s32) into %stack.3)
; CHECK-NEXT: MOV32mr %stack.2, 1, $noreg, 0, $noreg, killed $eax :: (store (s32) into %stack.2)
; CHECK-NEXT: JMP_1 %bb.1
@@ -148,7 +148,7 @@ body: |
MOV32mi %stack.0.retval, 1, $noreg, 0, $noreg, 0 :: (store (s32) into %ir.retval)
MOV32mi %stack.1.x, 1, $noreg, 0, $noreg, 123 :: (store (s32) into %ir.x)
%2:gr32 = MOV32ri 45
- INLINEASM_BR &"mov $1, $0\0A\09jmp ${2:l}", 0 /* attdialect */, 2359306 /* regdef:GR32 */, def %1, 2359305 /* reguse:GR32 */, %2, 13 /* imm */, %bb.3, 12 /* clobber */, implicit-def early-clobber $df, 12 /* clobber */, implicit-def early-clobber $fpsw, 12 /* clobber */, implicit-def early-clobber $eflags, !5
+ INLINEASM_BR &"mov $1, $0\0A\09jmp ${2:l}", 0 /* attdialect */, 2228234 /* regdef:GR32 */, def %1, 2228233 /* reguse:GR32 */, %2, 13 /* imm */, %bb.3, 12 /* clobber */, implicit-def early-clobber $df, 12 /* clobber */, implicit-def early-clobber $fpsw, 12 /* clobber */, implicit-def early-clobber $eflags, !5
%0:gr32 = COPY %1
JMP_1 %bb.1
diff --git a/llvm/test/CodeGen/X86/div-rem-pair-recomposition-signed.ll b/llvm/test/CodeGen/X86/div-rem-pair-recomposition-signed.ll
index 455b72d16a075..23b0e478c2e84 100644
--- a/llvm/test/CodeGen/X86/div-rem-pair-recomposition-signed.ll
+++ b/llvm/test/CodeGen/X86/div-rem-pair-recomposition-signed.ll
@@ -152,24 +152,24 @@ define i128 @scalar_i128(i128 %x, i128 %y, ptr %divdst) nounwind {
; X86-NEXT: pushl %esi
; X86-NEXT: andl $-16, %esp
; X86-NEXT: subl $176, %esp
-; X86-NEXT: movl 32(%ebp), %edx
-; X86-NEXT: movl 36(%ebp), %ecx
-; X86-NEXT: movl %ecx, %eax
+; X86-NEXT: movl 28(%ebp), %esi
+; X86-NEXT: movl 32(%ebp), %ecx
+; X86-NEXT: movl 36(%ebp), %edx
+; X86-NEXT: movl %edx, %eax
; X86-NEXT: sarl $31, %eax
-; X86-NEXT: xorl %eax, %ecx
-; X86-NEXT: movl %ecx, %edi
-; X86-NEXT: xorl %eax, %edx
-; X86-NEXT: movl %edx, %esi
-; X86-NEXT: movl 28(%ebp), %edx
; X86-NEXT: xorl %eax, %edx
+; X86-NEXT: movl %edx, %edi
+; X86-NEXT: xorl %eax, %ecx
+; X86-NEXT: movl %ecx, %edx
+; X86-NEXT: xorl %eax, %esi
; X86-NEXT: movl 24(%ebp), %ecx
; X86-NEXT: xorl %eax, %ecx
; X86-NEXT: subl %eax, %ecx
; X86-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
-; X86-NEXT: sbbl %eax, %edx
-; X86-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-NEXT: sbbl %eax, %esi
; X86-NEXT: movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
+; X86-NEXT: sbbl %eax, %edx
+; X86-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-NEXT: sbbl %eax, %edi
; X86-NEXT: movl %edi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-NEXT: movl 52(%ebp), %esi
@@ -544,16 +544,16 @@ define i128 @scalar_i128(i128 %x, i128 %y, ptr %divdst) nounwind {
; X86-NEXT: adcl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Folded Reload
; X86-NEXT: movl 24(%ebp), %edx
; X86-NEXT: subl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload
-; X86-NEXT: movl 28(%ebp), %ecx
-; X86-NEXT: sbbl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Folded Reload
-; X86-NEXT: movl 32(%ebp), %edi
-; X86-NEXT: sbbl %eax, %edi
+; X86-NEXT: movl 28(%ebp), %edi
+; X86-NEXT: sbbl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Folded Reload
+; X86-NEXT: movl 32(%ebp), %ecx
+; X86-NEXT: sbbl %eax, %ecx
; X86-NEXT: movl 36(%ebp), %esi
; X86-NEXT: sbbl %ebx, %esi
; X86-NEXT: movl 8(%ebp), %eax
; X86-NEXT: movl %edx, (%eax)
-; X86-NEXT: movl %ecx, 4(%eax)
-; X86-NEXT: movl %edi, 8(%eax)
+; X86-NEXT: movl %edi, 4(%eax)
+; X86-NEXT: movl %ecx, 8(%eax)
; X86-NEXT: movl %esi, 12(%eax)
; X86-NEXT: leal -12(%ebp), %esp
; X86-NEXT: popl %esi
@@ -648,18 +648,14 @@ define <16 x i8> @vector_i128_i8(<16 x i8> %x, <16 x i8> %y, ptr %divdst) nounwi
; X86-NEXT: idivb {{[0-9]+}}(%esp)
; X86-NEXT: movzbl %al, %eax
; X86-NEXT: movd %eax, %xmm3
-; X86-NEXT: punpcklbw {{.*#+}} xmm3 = xmm3[0],xmm5[0],xmm3[1],xmm5[1],xmm3[2],xmm5[2],xmm3[3],xmm5[3],xmm3[4],xmm5[4],xmm3[5],xmm5[5],xmm3[6],xmm5[6],xmm3[7],xmm5[7]
-; X86-NEXT: movsbl {{[0-9]+}}(%esp), %eax
-; X86-NEXT: idivb {{[0-9]+}}(%esp)
-; X86-NEXT: movzbl %al, %eax
-; X86-NEXT: movd %eax, %xmm5
; X86-NEXT: movsbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: idivb {{[0-9]+}}(%esp)
; X86-NEXT: movzbl %al, %eax
; X86-NEXT: movd %eax, %xmm6
; X86-NEXT: movsbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: idivb {{[0-9]+}}(%esp)
-; X86-NEXT: movzbl %al, %edx
+; X86-NEXT: movzbl %al, %eax
+; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-NEXT: movsbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: idivb {{[0-9]+}}(%esp)
; X86-NEXT: movzbl %al, %esi
@@ -671,18 +667,24 @@ define <16 x i8> @vector_i128_i8(<16 x i8> %x, <16 x i8> %y, ptr %divdst) nounwi
; X86-NEXT: movzbl %al, %ebx
; X86-NEXT: movsbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: idivb {{[0-9]+}}(%esp)
+; X86-NEXT: movzbl %al, %edx
+; X86-NEXT: movsbl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: idivb {{[0-9]+}}(%esp)
; X86-NEXT: movl %eax, %ecx
; X86-NEXT: movsbl (%esp), %eax
; X86-NEXT: idivb {{[0-9]+}}(%esp)
+; X86-NEXT: punpcklbw {{.*#+}} xmm3 = xmm3[0],xmm5[0],xmm3[1],xmm5[1],xmm3[2],xmm5[2],xmm3[3],xmm5[3],xmm3[4],xmm5[4],xmm3[5],xmm5[5],xmm3[6],xmm5[6],xmm3[7],xmm5[7]
+; X86-NEXT: movd {{[-0-9]+}}(%e{{[sb]}}p), %xmm5 # 4-byte Folded Reload
+; X86-NEXT: # xmm5 = mem[0],zero,zero,zero
; X86-NEXT: punpcklwd {{.*#+}} xmm3 = xmm3[0],xmm4[0],xmm3[1],xmm4[1],xmm3[2],xmm4[2],xmm3[3],xmm4[3]
-; X86-NEXT: movd %edx, %xmm7
+; X86-NEXT: movd %esi, %xmm7
; X86-NEXT: punpckldq {{.*#+}} xmm3 = xmm3[0],xmm2[0],xmm3[1],xmm2[1]
-; X86-NEXT: movd %esi, %xmm4
-; X86-NEXT: punpcklbw {{.*#+}} xmm6 = xmm6[0],xmm5[0],xmm6[1],xmm5[1],xmm6[2],xmm5[2],xmm6[3],xmm5[3],xmm6[4],xmm5[4],xmm6[5],xmm5[5],xmm6[6],xmm5[6],xmm6[7],xmm5[7]
-; X86-NEXT: movd %edi, %xmm2
+; X86-NEXT: movd %edi, %xmm4
+; X86-NEXT: punpcklbw {{.*#+}} xmm5 = xmm5[0],xmm6[0],xmm5[1],xmm6[1],xmm5[2],xmm6[2],xmm5[3],xmm6[3],xmm5[4],xmm6[4],xmm5[5],xmm6[5],xmm5[6],xmm6[6],xmm5[7],xmm6[7]
+; X86-NEXT: movd %ebx, %xmm2
; X86-NEXT: punpcklbw {{.*#+}} xmm4 = xmm4[0],xmm7[0],xmm4[1],xmm7[1],xmm4[2],xmm7[2],xmm4[3],xmm7[3],xmm4[4],xmm7[4],xmm4[5],xmm7[5],xmm4[6],xmm7[6],xmm4[7],xmm7[7]
-; X86-NEXT: punpcklwd {{.*#+}} xmm4 = xmm4[0],xmm6[0],xmm4[1],xmm6[1],xmm4[2],xmm6[2],xmm4[3],xmm6[3]
-; X86-NEXT: movd %ebx, %xmm5
+; X86-NEXT: punpcklwd {{.*#+}} xmm4 = xmm4[0],xmm5[0],xmm4[1],xmm5[1],xmm4[2],xmm5[2],xmm4[3],xmm5[3]
+; X86-NEXT: movd %edx, %xmm5
; X86-NEXT: movzbl %cl, %ecx
; X86-NEXT: movd %ecx, %xmm6
; X86-NEXT: movl 8(%ebp), %ecx
diff --git a/llvm/test/CodeGen/X86/div-rem-pair-recomposition-unsigned.ll b/llvm/test/CodeGen/X86/div-rem-pair-recomposition-unsigned.ll
index 859e9244d29d2..5d99ed2490c7a 100644
--- a/llvm/test/CodeGen/X86/div-rem-pair-recomposition-unsigned.ll
+++ b/llvm/test/CodeGen/X86/div-rem-pair-recomposition-unsigned.ll
@@ -160,8 +160,8 @@ define i128 @scalar_i128(i128 %x, i128 %y, ptr %divdst) nounwind {
; X86-NEXT: movl %ebx, %ecx
; X86-NEXT: orl 48(%ebp), %ecx
; X86-NEXT: orl %eax, %ecx
-; X86-NEXT: sete %cl
; X86-NEXT: movl 28(%ebp), %eax
+; X86-NEXT: sete %cl
; X86-NEXT: orl 36(%ebp), %eax
; X86-NEXT: movl 24(%ebp), %edx
; X86-NEXT: orl 32(%ebp), %edx
@@ -587,18 +587,14 @@ define <16 x i8> @vector_i128_i8(<16 x i8> %x, <16 x i8> %y, ptr %divdst) nounwi
; X86-NEXT: divb {{[0-9]+}}(%esp)
; X86-NEXT: movzbl %al, %eax
; X86-NEXT: movd %eax, %xmm3
-; X86-NEXT: punpcklbw {{.*#+}} xmm3 = xmm3[0],xmm5[0],xmm3[1],xmm5[1],xmm3[2],xmm5[2],xmm3[3],xmm5[3],xmm3[4],xmm5[4],xmm3[5],xmm5[5],xmm3[6],xmm5[6],xmm3[7],xmm5[7]
-; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
-; X86-NEXT: divb {{[0-9]+}}(%esp)
-; X86-NEXT: movzbl %al, %eax
-; X86-NEXT: movd %eax, %xmm5
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: divb {{[0-9]+}}(%esp)
; X86-NEXT: movzbl %al, %eax
; X86-NEXT: movd %eax, %xmm6
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: divb {{[0-9]+}}(%esp)
-; X86-NEXT: movzbl %al, %edx
+; X86-NEXT: movzbl %al, %eax
+; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: divb {{[0-9]+}}(%esp)
; X86-NEXT: movzbl %al, %esi
@@ -610,18 +606,24 @@ define <16 x i8> @vector_i128_i8(<16 x i8> %x, <16 x i8> %y, ptr %divdst) nounwi
; X86-NEXT: movzbl %al, %ebx
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: divb {{[0-9]+}}(%esp)
+; X86-NEXT: movzbl %al, %edx
+; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: divb {{[0-9]+}}(%esp)
; X86-NEXT: movl %eax, %ecx
; X86-NEXT: movzbl (%esp), %eax
; X86-NEXT: divb {{[0-9]+}}(%esp)
+; X86-NEXT: punpcklbw {{.*#+}} xmm3 = xmm3[0],xmm5[0],xmm3[1],xmm5[1],xmm3[2],xmm5[2],xmm3[3],xmm5[3],xmm3[4],xmm5[4],xmm3[5],xmm5[5],xmm3[6],xmm5[6],xmm3[7],xmm5[7]
+; X86-NEXT: movd {{[-0-9]+}}(%e{{[sb]}}p), %xmm5 # 4-byte Folded Reload
+; X86-NEXT: # xmm5 = mem[0],zero,zero,zero
; X86-NEXT: punpcklwd {{.*#+}} xmm3 = xmm3[0],xmm4[0],xmm3[1],xmm4[1],xmm3[2],xmm4[2],xmm3[3],xmm4[3]
-; X86-NEXT: movd %edx, %xmm7
+; X86-NEXT: movd %esi, %xmm7
; X86-NEXT: punpckldq {{.*#+}} xmm3 = xmm3[0],xmm2[0],xmm3[1],xmm2[1]
-; X86-NEXT: movd %esi, %xmm4
-; X86-NEXT: punpcklbw {{.*#+}} xmm6 = xmm6[0],xmm5[0],xmm6[1],xmm5[1],xmm6[2],xmm5[2],xmm6[3],xmm5[3],xmm6[4],xmm5[4],xmm6[5],xmm5[5],xmm6[6],xmm5[6],xmm6[7],xmm5[7]
-; X86-NEXT: movd %edi, %xmm2
+; X86-NEXT: movd %edi, %xmm4
+; X86-NEXT: punpcklbw {{.*#+}} xmm5 = xmm5[0],xmm6[0],xmm5[1],xmm6[1],xmm5[2],xmm6[2],xmm5[3],xmm6[3],xmm5[4],xmm6[4],xmm5[5],xmm6[5],xmm5[6],xmm6[6],xmm5[7],xmm6[7]
+; X86-NEXT: movd %ebx, %xmm2
; X86-NEXT: punpcklbw {{.*#+}} xmm4 = xmm4[0],xmm7[0],xmm4[1],xmm7[1],xmm4[2],xmm7[2],xmm4[3],xmm7[3],xmm4[4],xmm7[4],xmm4[5],xmm7[5],xmm4[6],xmm7[6],xmm4[7],xmm7[7]
-; X86-NEXT: punpcklwd {{.*#+}} xmm4 = xmm4[0],xmm6[0],xmm4[1],xmm6[1],xmm4[2],xmm6[2],xmm4[3],xmm6[3]
-; X86-NEXT: movd %ebx, %xmm5
+; X86-NEXT: punpcklwd {{.*#+}} xmm4 = xmm4[0],xmm5[0],xmm4[1],xmm5[1],xmm4[2],xmm5[2],xmm4[3],xmm5[3]
+; X86-NEXT: movd %edx, %xmm5
; X86-NEXT: movzbl %cl, %ecx
; X86-NEXT: movd %ecx, %xmm6
; X86-NEXT: movl 8(%ebp), %ecx
diff --git a/llvm/test/CodeGen/X86/fshl.ll b/llvm/test/CodeGen/X86/fshl.ll
index f998128af95f8..87ec86f926337 100644
--- a/llvm/test/CodeGen/X86/fshl.ll
+++ b/llvm/test/CodeGen/X86/fshl.ll
@@ -270,55 +270,53 @@ define i128 @var_shift_i128(i128 %x, i128 %y, i128 %z) nounwind {
; X86-FAST-NEXT: pushl %esi
; X86-FAST-NEXT: andl $-16, %esp
; X86-FAST-NEXT: subl $16, %esp
-; X86-FAST-NEXT: movl 24(%ebp), %edi
+; X86-FAST-NEXT: movl 24(%ebp), %ebx
; X86-FAST-NEXT: movl 28(%ebp), %edx
-; X86-FAST-NEXT: movl 48(%ebp), %esi
+; X86-FAST-NEXT: movl 48(%ebp), %edi
+; X86-FAST-NEXT: movl 52(%ebp), %eax
; X86-FAST-NEXT: movl 56(%ebp), %ecx
; X86-FAST-NEXT: testb $64, %cl
-; X86-FAST-NEXT: movl 52(%ebp), %eax
; X86-FAST-NEXT: jne .LBB6_1
; X86-FAST-NEXT: # %bb.2:
-; X86-FAST-NEXT: movl %esi, %ebx
; X86-FAST-NEXT: movl %edi, %esi
-; X86-FAST-NEXT: movl 32(%ebp), %edi
-; X86-FAST-NEXT: movl %eax, (%esp) # 4-byte Spill
+; X86-FAST-NEXT: movl %ebx, %edi
+; X86-FAST-NEXT: movl 32(%ebp), %ebx
+; X86-FAST-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-FAST-NEXT: movl %edx, %eax
; X86-FAST-NEXT: movl 36(%ebp), %edx
; X86-FAST-NEXT: testb $32, %cl
; X86-FAST-NEXT: je .LBB6_5
; X86-FAST-NEXT: .LBB6_4:
-; X86-FAST-NEXT: movl %edi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
-; X86-FAST-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
-; X86-FAST-NEXT: movl %esi, %eax
-; X86-FAST-NEXT: movl (%esp), %esi # 4-byte Reload
+; X86-FAST-NEXT: movl %ebx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
+; X86-FAST-NEXT: movl %edi, %edx
+; X86-FAST-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload
; X86-FAST-NEXT: jmp .LBB6_6
; X86-FAST-NEXT: .LBB6_1:
-; X86-FAST-NEXT: movl 44(%ebp), %ebx
-; X86-FAST-NEXT: movl %ebx, (%esp) # 4-byte Spill
-; X86-FAST-NEXT: movl 40(%ebp), %ebx
+; X86-FAST-NEXT: movl 44(%ebp), %esi
+; X86-FAST-NEXT: movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
+; X86-FAST-NEXT: movl 40(%ebp), %esi
; X86-FAST-NEXT: testb $32, %cl
; X86-FAST-NEXT: jne .LBB6_4
; X86-FAST-NEXT: .LBB6_5:
-; X86-FAST-NEXT: movl (%esp), %ebx # 4-byte Reload
+; X86-FAST-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload
; X86-FAST-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
-; X86-FAST-NEXT: movl %edi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
-; X86-FAST-NEXT: .LBB6_6:
-; X86-FAST-NEXT: movl %esi, %edi
-; X86-FAST-NEXT: shldl %cl, %ebx, %edi
; X86-FAST-NEXT: movl %eax, %edx
-; X86-FAST-NEXT: movl %eax, %ebx
+; X86-FAST-NEXT: movl %ebx, %eax
+; X86-FAST-NEXT: .LBB6_6:
+; X86-FAST-NEXT: movl %edi, %ebx
; X86-FAST-NEXT: shldl %cl, %esi, %ebx
-; X86-FAST-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
-; X86-FAST-NEXT: movl %eax, %esi
-; X86-FAST-NEXT: shldl %cl, %edx, %esi
+; X86-FAST-NEXT: movl %edx, %esi
+; X86-FAST-NEXT: shldl %cl, %edi, %esi
+; X86-FAST-NEXT: movl %eax, %edi
+; X86-FAST-NEXT: shldl %cl, %edx, %edi
; X86-FAST-NEXT: # kill: def $cl killed $cl killed $ecx
; X86-FAST-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Reload
; X86-FAST-NEXT: shldl %cl, %eax, %edx
; X86-FAST-NEXT: movl 8(%ebp), %eax
; X86-FAST-NEXT: movl %edx, 12(%eax)
-; X86-FAST-NEXT: movl %esi, 8(%eax)
-; X86-FAST-NEXT: movl %ebx, 4(%eax)
-; X86-FAST-NEXT: movl %edi, (%eax)
+; X86-FAST-NEXT: movl %edi, 8(%eax)
+; X86-FAST-NEXT: movl %esi, 4(%eax)
+; X86-FAST-NEXT: movl %ebx, (%eax)
; X86-FAST-NEXT: leal -12(%ebp), %esp
; X86-FAST-NEXT: popl %esi
; X86-FAST-NEXT: popl %edi
@@ -334,84 +332,84 @@ define i128 @var_shift_i128(i128 %x, i128 %y, i128 %z) nounwind {
; X86-SLOW-NEXT: pushl %edi
; X86-SLOW-NEXT: pushl %esi
; X86-SLOW-NEXT: andl $-16, %esp
-; X86-SLOW-NEXT: subl $32, %esp
-; X86-SLOW-NEXT: movl 24(%ebp), %edi
+; X86-SLOW-NEXT: subl $16, %esp
+; X86-SLOW-NEXT: movl 24(%ebp), %esi
; X86-SLOW-NEXT: movl 28(%ebp), %eax
-; X86-SLOW-NEXT: movl 48(%ebp), %edx
+; X86-SLOW-NEXT: movl 48(%ebp), %ebx
+; X86-SLOW-NEXT: movl 52(%ebp), %edi
; X86-SLOW-NEXT: movl 56(%ebp), %ecx
; X86-SLOW-NEXT: testb $64, %cl
-; X86-SLOW-NEXT: movl 52(%ebp), %ebx
; X86-SLOW-NEXT: jne .LBB6_1
; X86-SLOW-NEXT: # %bb.2:
-; X86-SLOW-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
+; X86-SLOW-NEXT: movl %ebx, (%esp) # 4-byte Spill
+; X86-SLOW-NEXT: movl %esi, %ebx
+; X86-SLOW-NEXT: movl 32(%ebp), %esi
; X86-SLOW-NEXT: movl %edi, %edx
-; X86-SLOW-NEXT: movl 32(%ebp), %edi
-; X86-SLOW-NEXT: movl %ebx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
-; X86-SLOW-NEXT: movl %eax, %ebx
+; X86-SLOW-NEXT: movl %eax, %edi
; X86-SLOW-NEXT: movl 36(%ebp), %eax
; X86-SLOW-NEXT: jmp .LBB6_3
; X86-SLOW-NEXT: .LBB6_1:
; X86-SLOW-NEXT: movl 40(%ebp), %ecx
-; X86-SLOW-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
-; X86-SLOW-NEXT: movl 44(%ebp), %ecx
-; X86-SLOW-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
+; X86-SLOW-NEXT: movl %ecx, (%esp) # 4-byte Spill
+; X86-SLOW-NEXT: movl 44(%ebp), %edx
; X86-SLOW-NEXT: .LBB6_3:
; X86-SLOW-NEXT: movl 56(%ebp), %ecx
; X86-SLOW-NEXT: testb $32, %cl
; X86-SLOW-NEXT: jne .LBB6_4
; X86-SLOW-NEXT: # %bb.5:
-; X86-SLOW-NEXT: movl %edi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
-; X86-SLOW-NEXT: movl %edx, %edi
-; X86-SLOW-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload
; X86-SLOW-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
+; X86-SLOW-NEXT: movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
+; X86-SLOW-NEXT: movl %edi, %esi
; X86-SLOW-NEXT: jmp .LBB6_6
; X86-SLOW-NEXT: .LBB6_4:
+; X86-SLOW-NEXT: movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-SLOW-NEXT: movl %edi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
-; X86-SLOW-NEXT: movl %ebx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
+; X86-SLOW-NEXT: movl %ebx, %esi
; X86-SLOW-NEXT: movl %edx, %ebx
-; X86-SLOW-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload
-; X86-SLOW-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload
+; X86-SLOW-NEXT: movl (%esp), %edx # 4-byte Reload
; X86-SLOW-NEXT: .LBB6_6:
-; X86-SLOW-NEXT: movl %edi, %eax
-; X86-SLOW-NEXT: shll %cl, %eax
-; X86-SLOW-NEXT: shrl %esi
+; X86-SLOW-NEXT: movl %ebx, %edi
+; X86-SLOW-NEXT: shll %cl, %edi
+; X86-SLOW-NEXT: shrl %edx
+; X86-SLOW-NEXT: movl %edx, %eax
; X86-SLOW-NEXT: movl %ecx, %edx
; X86-SLOW-NEXT: notb %dl
; X86-SLOW-NEXT: movl %edx, %ecx
-; X86-SLOW-NEXT: shrl %cl, %esi
-; X86-SLOW-NEXT: orl %eax, %esi
-; X86-SLOW-NEXT: movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
-; X86-SLOW-NEXT: movl %ebx, %eax
-; X86-SLOW-NEXT: movl 56(%ebp), %ecx
-; X86-SLOW-NEXT: # kill: def $cl killed $cl killed $ecx
-; X86-SLOW-NEXT: shll %cl, %eax
-; X86-SLOW-NEXT: shrl %edi
-; X86-SLOW-NEXT: movl %edx, %ecx
-; X86-SLOW-NEXT: shrl %cl, %edi
-; X86-SLOW-NEXT: orl %eax, %edi
-; X86-SLOW-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload
-; X86-SLOW-NEXT: movl %esi, %eax
+; X86-SLOW-NEXT: shrl %cl, %eax
+; X86-SLOW-NEXT: orl %edi, %eax
+; X86-SLOW-NEXT: movl %eax, (%esp) # 4-byte Spill
+; X86-SLOW-NEXT: movl %esi, %edi
; X86-SLOW-NEXT: movl 56(%ebp), %ecx
; X86-SLOW-NEXT: # kill: def $cl killed $cl killed $ecx
-; X86-SLOW-NEXT: shll %cl, %eax
+; X86-SLOW-NEXT: shll %cl, %edi
; X86-SLOW-NEXT: shrl %ebx
; X86-SLOW-NEXT: movl %edx, %ecx
; X86-SLOW-NEXT: shrl %cl, %ebx
-; X86-SLOW-NEXT: orl %eax, %ebx
+; X86-SLOW-NEXT: orl %edi, %ebx
+; X86-SLOW-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
+; X86-SLOW-NEXT: movl %eax, %edi
; X86-SLOW-NEXT: movl 56(%ebp), %ecx
; X86-SLOW-NEXT: # kill: def $cl killed $cl killed $ecx
-; X86-SLOW-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
-; X86-SLOW-NEXT: shll %cl, %eax
+; X86-SLOW-NEXT: shll %cl, %edi
; X86-SLOW-NEXT: shrl %esi
; X86-SLOW-NEXT: movl %edx, %ecx
; X86-SLOW-NEXT: shrl %cl, %esi
-; X86-SLOW-NEXT: orl %eax, %esi
-; X86-SLOW-NEXT: movl 8(%ebp), %eax
-; X86-SLOW-NEXT: movl %esi, 12(%eax)
-; X86-SLOW-NEXT: movl %ebx, 8(%eax)
-; X86-SLOW-NEXT: movl %edi, 4(%eax)
-; X86-SLOW-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
-; X86-SLOW-NEXT: movl %ecx, (%eax)
+; X86-SLOW-NEXT: orl %edi, %esi
+; X86-SLOW-NEXT: movl 56(%ebp), %ecx
+; X86-SLOW-NEXT: # kill: def $cl killed $cl killed $ecx
+; X86-SLOW-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload
+; X86-SLOW-NEXT: shll %cl, %edi
+; X86-SLOW-NEXT: shrl %eax
+; X86-SLOW-NEXT: movl %edx, %ecx
+; X86-SLOW-NEXT: shrl %cl, %eax
+; X86-SLOW-NEXT: orl %edi, %eax
+; X86-SLOW-NEXT: movl 8(%ebp), %ecx
+; X86-SLOW-NEXT: movl %eax, 12(%ecx)
+; X86-SLOW-NEXT: movl %esi, 8(%ecx)
+; X86-SLOW-NEXT: movl %ebx, 4(%ecx)
+; X86-SLOW-NEXT: movl (%esp), %eax # 4-byte Reload
+; X86-SLOW-NEXT: movl %eax, (%ecx)
+; X86-SLOW-NEXT: movl %ecx, %eax
; X86-SLOW-NEXT: leal -12(%ebp), %esp
; X86-SLOW-NEXT: popl %esi
; X86-SLOW-NEXT: popl %edi
diff --git a/llvm/test/CodeGen/X86/fshr.ll b/llvm/test/CodeGen/X86/fshr.ll
index c307833e488c9..f704bd8cd7495 100644
--- a/llvm/test/CodeGen/X86/fshr.ll
+++ b/llvm/test/CodeGen/X86/fshr.ll
@@ -264,46 +264,46 @@ define i128 @var_shift_i128(i128 %x, i128 %y, i128 %z) nounwind {
; X86-FAST-NEXT: pushl %esi
; X86-FAST-NEXT: andl $-16, %esp
; X86-FAST-NEXT: subl $16, %esp
-; X86-FAST-NEXT: movl 24(%ebp), %esi
+; X86-FAST-NEXT: movl 24(%ebp), %edi
; X86-FAST-NEXT: movl 28(%ebp), %eax
; X86-FAST-NEXT: movl 48(%ebp), %edx
+; X86-FAST-NEXT: movl 52(%ebp), %esi
; X86-FAST-NEXT: movl 56(%ebp), %ecx
; X86-FAST-NEXT: testb $64, %cl
-; X86-FAST-NEXT: movl 52(%ebp), %ebx
; X86-FAST-NEXT: je .LBB6_1
; X86-FAST-NEXT: # %bb.2:
; X86-FAST-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
-; X86-FAST-NEXT: movl %esi, %edx
-; X86-FAST-NEXT: movl 32(%ebp), %esi
-; X86-FAST-NEXT: movl %ebx, %edi
-; X86-FAST-NEXT: movl %eax, %ebx
+; X86-FAST-NEXT: movl %edi, %edx
+; X86-FAST-NEXT: movl 32(%ebp), %edi
+; X86-FAST-NEXT: movl %esi, %ebx
+; X86-FAST-NEXT: movl %eax, %esi
; X86-FAST-NEXT: movl 36(%ebp), %eax
; X86-FAST-NEXT: testb $32, %cl
; X86-FAST-NEXT: je .LBB6_4
; X86-FAST-NEXT: jmp .LBB6_5
; X86-FAST-NEXT: .LBB6_1:
-; X86-FAST-NEXT: movl 40(%ebp), %edi
-; X86-FAST-NEXT: movl %edi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
-; X86-FAST-NEXT: movl 44(%ebp), %edi
+; X86-FAST-NEXT: movl 40(%ebp), %ebx
+; X86-FAST-NEXT: movl %ebx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
+; X86-FAST-NEXT: movl 44(%ebp), %ebx
; X86-FAST-NEXT: testb $32, %cl
; X86-FAST-NEXT: jne .LBB6_5
; X86-FAST-NEXT: .LBB6_4:
-; X86-FAST-NEXT: movl %esi, %eax
-; X86-FAST-NEXT: movl %ebx, %esi
-; X86-FAST-NEXT: movl %edx, %ebx
-; X86-FAST-NEXT: movl %edi, %edx
-; X86-FAST-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload
+; X86-FAST-NEXT: movl %edi, %eax
+; X86-FAST-NEXT: movl %esi, %edi
+; X86-FAST-NEXT: movl %edx, %esi
+; X86-FAST-NEXT: movl %ebx, %edx
+; X86-FAST-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Reload
; X86-FAST-NEXT: .LBB6_5:
-; X86-FAST-NEXT: shrdl %cl, %edx, %edi
-; X86-FAST-NEXT: shrdl %cl, %ebx, %edx
-; X86-FAST-NEXT: shrdl %cl, %esi, %ebx
+; X86-FAST-NEXT: shrdl %cl, %edx, %ebx
+; X86-FAST-NEXT: shrdl %cl, %esi, %edx
+; X86-FAST-NEXT: shrdl %cl, %edi, %esi
; X86-FAST-NEXT: # kill: def $cl killed $cl killed $ecx
-; X86-FAST-NEXT: shrdl %cl, %eax, %esi
+; X86-FAST-NEXT: shrdl %cl, %eax, %edi
; X86-FAST-NEXT: movl 8(%ebp), %eax
-; X86-FAST-NEXT: movl %esi, 12(%eax)
-; X86-FAST-NEXT: movl %ebx, 8(%eax)
+; X86-FAST-NEXT: movl %edi, 12(%eax)
+; X86-FAST-NEXT: movl %esi, 8(%eax)
; X86-FAST-NEXT: movl %edx, 4(%eax)
-; X86-FAST-NEXT: movl %edi, (%eax)
+; X86-FAST-NEXT: movl %ebx, (%eax)
; X86-FAST-NEXT: leal -12(%ebp), %esp
; X86-FAST-NEXT: popl %esi
; X86-FAST-NEXT: popl %edi
@@ -323,9 +323,9 @@ define i128 @var_shift_i128(i128 %x, i128 %y, i128 %z) nounwind {
; X86-SLOW-NEXT: movl 24(%ebp), %edx
; X86-SLOW-NEXT: movl 28(%ebp), %esi
; X86-SLOW-NEXT: movl 48(%ebp), %edi
-; X86-SLOW-NEXT: movl 56(%ebp), %eax
-; X86-SLOW-NEXT: testb $64, %al
; X86-SLOW-NEXT: movl 52(%ebp), %eax
+; X86-SLOW-NEXT: movl 56(%ebp), %ecx
+; X86-SLOW-NEXT: testb $64, %cl
; X86-SLOW-NEXT: je .LBB6_1
; X86-SLOW-NEXT: # %bb.2:
; X86-SLOW-NEXT: movl %edi, (%esp) # 4-byte Spill
diff --git a/llvm/test/CodeGen/X86/funnel-shift.ll b/llvm/test/CodeGen/X86/funnel-shift.ll
index 252cb3333f1d1..2016a289a23b0 100644
--- a/llvm/test/CodeGen/X86/funnel-shift.ll
+++ b/llvm/test/CodeGen/X86/funnel-shift.ll
@@ -82,23 +82,23 @@ define i128 @fshl_i128(i128 %x, i128 %y, i128 %z) nounwind {
; X86-SSE2-NEXT: subl $16, %esp
; X86-SSE2-NEXT: movl 48(%ebp), %edi
; X86-SSE2-NEXT: movl 52(%ebp), %eax
-; X86-SSE2-NEXT: movl 24(%ebp), %edx
+; X86-SSE2-NEXT: movl 24(%ebp), %esi
+; X86-SSE2-NEXT: movl 28(%ebp), %edx
; X86-SSE2-NEXT: movl 56(%ebp), %ecx
; X86-SSE2-NEXT: testb $64, %cl
-; X86-SSE2-NEXT: movl %edx, %ecx
+; X86-SSE2-NEXT: movl %esi, %ecx
; X86-SSE2-NEXT: cmovnel %edi, %ecx
; X86-SSE2-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
-; X86-SSE2-NEXT: movl 28(%ebp), %esi
-; X86-SSE2-NEXT: movl %esi, %ebx
+; X86-SSE2-NEXT: movl %edx, %ebx
; X86-SSE2-NEXT: cmovnel %eax, %ebx
; X86-SSE2-NEXT: cmovnel 44(%ebp), %eax
; X86-SSE2-NEXT: cmovnel 40(%ebp), %edi
-; X86-SSE2-NEXT: cmovel 36(%ebp), %esi
-; X86-SSE2-NEXT: cmovel 32(%ebp), %edx
+; X86-SSE2-NEXT: cmovel 36(%ebp), %edx
+; X86-SSE2-NEXT: cmovel 32(%ebp), %esi
; X86-SSE2-NEXT: movl 56(%ebp), %ecx
; X86-SSE2-NEXT: testb $32, %cl
-; X86-SSE2-NEXT: cmovnel %edx, %esi
-; X86-SSE2-NEXT: cmovnel %ebx, %edx
+; X86-SSE2-NEXT: cmovnel %esi, %edx
+; X86-SSE2-NEXT: cmovnel %ebx, %esi
; X86-SSE2-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
; X86-SSE2-NEXT: cmovnel %ecx, %ebx
; X86-SSE2-NEXT: cmovel %eax, %edi
@@ -112,13 +112,13 @@ define i128 @fshl_i128(i128 %x, i128 %y, i128 %z) nounwind {
; X86-SSE2-NEXT: # kill: def $cl killed $cl killed $ecx
; X86-SSE2-NEXT: shldl %cl, %eax, %edi
; X86-SSE2-NEXT: movl %edi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
-; X86-SSE2-NEXT: movl %edx, %edi
+; X86-SSE2-NEXT: movl %esi, %edi
; X86-SSE2-NEXT: movl 56(%ebp), %ecx
; X86-SSE2-NEXT: shldl %cl, %ebx, %edi
; X86-SSE2-NEXT: movl 8(%ebp), %eax
; X86-SSE2-NEXT: # kill: def $cl killed $cl killed $ecx
-; X86-SSE2-NEXT: shldl %cl, %edx, %esi
-; X86-SSE2-NEXT: movl %esi, 12(%eax)
+; X86-SSE2-NEXT: shldl %cl, %esi, %edx
+; X86-SSE2-NEXT: movl %edx, 12(%eax)
; X86-SSE2-NEXT: movl %edi, 8(%eax)
; X86-SSE2-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
; X86-SSE2-NEXT: movl %ecx, 4(%eax)
diff --git a/llvm/test/CodeGen/X86/i128-sdiv.ll b/llvm/test/CodeGen/X86/i128-sdiv.ll
index 7d5757392c982..85922e7391cbd 100644
--- a/llvm/test/CodeGen/X86/i128-sdiv.ll
+++ b/llvm/test/CodeGen/X86/i128-sdiv.ll
@@ -64,32 +64,32 @@ define i128 @test2(i128 %x) nounwind {
; X86-NEXT: pushl %esi
; X86-NEXT: andl $-16, %esp
; X86-NEXT: subl $16, %esp
-; X86-NEXT: movl 36(%ebp), %eax
-; X86-NEXT: movl %eax, %edx
-; X86-NEXT: sarl $31, %edx
-; X86-NEXT: movl %edx, %ecx
+; X86-NEXT: movl 8(%ebp), %eax
+; X86-NEXT: movl 36(%ebp), %edx
+; X86-NEXT: movl %edx, %esi
+; X86-NEXT: sarl $31, %esi
+; X86-NEXT: movl %esi, %ecx
; X86-NEXT: shrl $30, %ecx
-; X86-NEXT: movl 24(%ebp), %esi
-; X86-NEXT: addl %edx, %esi
-; X86-NEXT: adcl 28(%ebp), %edx
+; X86-NEXT: movl 24(%ebp), %edi
+; X86-NEXT: addl %esi, %edi
+; X86-NEXT: adcl 28(%ebp), %esi
; X86-NEXT: adcl 32(%ebp), %ecx
-; X86-NEXT: adcl $0, %eax
-; X86-NEXT: shrdl $2, %eax, %ecx
-; X86-NEXT: movl %eax, %esi
+; X86-NEXT: adcl $0, %edx
+; X86-NEXT: shrdl $2, %edx, %ecx
+; X86-NEXT: movl %edx, %esi
; X86-NEXT: sarl $31, %esi
-; X86-NEXT: sarl $2, %eax
-; X86-NEXT: xorl %edx, %edx
+; X86-NEXT: sarl $2, %edx
+; X86-NEXT: xorl %edi, %edi
; X86-NEXT: negl %ecx
-; X86-NEXT: movl $0, %edi
-; X86-NEXT: sbbl %eax, %edi
; X86-NEXT: movl $0, %ebx
-; X86-NEXT: sbbl %esi, %ebx
+; X86-NEXT: sbbl %edx, %ebx
+; X86-NEXT: movl $0, %edx
; X86-NEXT: sbbl %esi, %edx
-; X86-NEXT: movl 8(%ebp), %eax
+; X86-NEXT: sbbl %esi, %edi
; X86-NEXT: movl %ecx, (%eax)
-; X86-NEXT: movl %edi, 4(%eax)
-; X86-NEXT: movl %ebx, 8(%eax)
-; X86-NEXT: movl %edx, 12(%eax)
+; X86-NEXT: movl %ebx, 4(%eax)
+; X86-NEXT: movl %edx, 8(%eax)
+; X86-NEXT: movl %edi, 12(%eax)
; X86-NEXT: leal -12(%ebp), %esp
; X86-NEXT: popl %esi
; X86-NEXT: popl %edi
@@ -118,8 +118,317 @@ define i128 @test2(i128 %x) nounwind {
define i128 @test3(i128 %x) nounwind {
; X86-LABEL: test3:
-; X86 doesn't have __divti3, so the urem is expanded into a loop.
-; X86: udiv-do-while
+; X86: # %bb.0: # %_udiv-special-cases
+; X86-NEXT: pushl %ebp
+; X86-NEXT: movl %esp, %ebp
+; X86-NEXT: pushl %ebx
+; X86-NEXT: pushl %edi
+; X86-NEXT: pushl %esi
+; X86-NEXT: andl $-16, %esp
+; X86-NEXT: subl $160, %esp
+; X86-NEXT: movl 36(%ebp), %ebx
+; X86-NEXT: movl %ebx, %edi
+; X86-NEXT: sarl $31, %edi
+; X86-NEXT: xorl %edi, %ebx
+; X86-NEXT: movl 32(%ebp), %esi
+; X86-NEXT: xorl %edi, %esi
+; X86-NEXT: movl 28(%ebp), %edx
+; X86-NEXT: xorl %edi, %edx
+; X86-NEXT: movl 24(%ebp), %ecx
+; X86-NEXT: xorl %edi, %ecx
+; X86-NEXT: subl %edi, %ecx
+; X86-NEXT: sbbl %edi, %edx
+; X86-NEXT: sbbl %edi, %esi
+; X86-NEXT: sbbl %edi, %ebx
+; X86-NEXT: movl %edx, %eax
+; X86-NEXT: orl %ebx, %eax
+; X86-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
+; X86-NEXT: orl %esi, %ecx
+; X86-NEXT: orl %eax, %ecx
+; X86-NEXT: sete {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Spill
+; X86-NEXT: testl %ebx, %ebx
+; X86-NEXT: jne .LBB2_1
+; X86-NEXT: # %bb.2: # %_udiv-special-cases
+; X86-NEXT: bsrl %esi, %ecx
+; X86-NEXT: xorl $31, %ecx
+; X86-NEXT: orl $32, %ecx
+; X86-NEXT: jmp .LBB2_3
+; X86-NEXT: .LBB2_1:
+; X86-NEXT: bsrl %ebx, %ecx
+; X86-NEXT: xorl $31, %ecx
+; X86-NEXT: .LBB2_3: # %_udiv-special-cases
+; X86-NEXT: testl %edx, %edx
+; X86-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
+; X86-NEXT: jne .LBB2_4
+; X86-NEXT: # %bb.5: # %_udiv-special-cases
+; X86-NEXT: bsrl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload
+; X86-NEXT: xorl $31, %edx
+; X86-NEXT: orl $32, %edx
+; X86-NEXT: jmp .LBB2_6
+; X86-NEXT: .LBB2_4:
+; X86-NEXT: bsrl %edx, %edx
+; X86-NEXT: xorl $31, %edx
+; X86-NEXT: .LBB2_6: # %_udiv-special-cases
+; X86-NEXT: movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
+; X86-NEXT: movl %ebx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
+; X86-NEXT: orl %ebx, %esi
+; X86-NEXT: jne .LBB2_8
+; X86-NEXT: # %bb.7: # %_udiv-special-cases
+; X86-NEXT: orl $64, %edx
+; X86-NEXT: movl %edx, %ecx
+; X86-NEXT: .LBB2_8: # %_udiv-special-cases
+; X86-NEXT: movl $61, %eax
+; X86-NEXT: subl %ecx, %eax
+; X86-NEXT: movl $0, %edx
+; X86-NEXT: sbbl %edx, %edx
+; X86-NEXT: movl $0, %esi
+; X86-NEXT: sbbl %esi, %esi
+; X86-NEXT: movl $0, %ebx
+; X86-NEXT: sbbl %ebx, %ebx
+; X86-NEXT: movl $127, %ecx
+; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
+; X86-NEXT: cmpl %eax, %ecx
+; X86-NEXT: movl $0, %ecx
+; X86-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
+; X86-NEXT: sbbl %edx, %ecx
+; X86-NEXT: movl $0, %ecx
+; X86-NEXT: movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
+; X86-NEXT: sbbl %esi, %ecx
+; X86-NEXT: movl $0, %ecx
+; X86-NEXT: movl %ebx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
+; X86-NEXT: sbbl %ebx, %ecx
+; X86-NEXT: setb %cl
+; X86-NEXT: movzbl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 1-byte Folded Reload
+; X86-NEXT: orb %cl, %al
+; X86-NEXT: testb %al, %al
+; X86-NEXT: movl $0, %esi
+; X86-NEXT: movl $0, %edx
+; X86-NEXT: movl $0, %ebx
+; X86-NEXT: movl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
+; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
+; X86-NEXT: jne .LBB2_10
+; X86-NEXT: # %bb.9: # %_udiv-special-cases
+; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
+; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
+; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload
+; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Reload
+; X86-NEXT: movl %ecx, %ebx
+; X86-NEXT: .LBB2_10: # %_udiv-special-cases
+; X86-NEXT: notl %edi
+; X86-NEXT: jne .LBB2_11
+; X86-NEXT: # %bb.18: # %_udiv-special-cases
+; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
+; X86-NEXT: xorl $127, %ecx
+; X86-NEXT: orl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Folded Reload
+; X86-NEXT: movl %ebx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
+; X86-NEXT: movl %edx, %eax
+; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Reload
+; X86-NEXT: orl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload
+; X86-NEXT: orl %ecx, %edx
+; X86-NEXT: movl %eax, %edx
+; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Reload
+; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
+; X86-NEXT: je .LBB2_19
+; X86-NEXT: # %bb.15: # %udiv-bb1
+; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
+; X86-NEXT: movl %eax, {{[0-9]+}}(%esp)
+; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
+; X86-NEXT: movl %eax, {{[0-9]+}}(%esp)
+; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
+; X86-NEXT: movl %eax, {{[0-9]+}}(%esp)
+; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
+; X86-NEXT: movl %eax, {{[0-9]+}}(%esp)
+; X86-NEXT: movl $0, {{[0-9]+}}(%esp)
+; X86-NEXT: movl $0, {{[0-9]+}}(%esp)
+; X86-NEXT: movl $0, {{[0-9]+}}(%esp)
+; X86-NEXT: movl $0, {{[0-9]+}}(%esp)
+; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
+; X86-NEXT: movl %eax, %ecx
+; X86-NEXT: xorb $127, %cl
+; X86-NEXT: movl %ecx, %edx
+; X86-NEXT: shrb $3, %dl
+; X86-NEXT: andb $12, %dl
+; X86-NEXT: negb %dl
+; X86-NEXT: movsbl %dl, %edx
+; X86-NEXT: movl 136(%esp,%edx), %esi
+; X86-NEXT: movl 140(%esp,%edx), %ebx
+; X86-NEXT: shldl %cl, %esi, %ebx
+; X86-NEXT: movl %ebx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
+; X86-NEXT: movl 128(%esp,%edx), %ebx
+; X86-NEXT: movl 132(%esp,%edx), %edx
+; X86-NEXT: shldl %cl, %edx, %esi
+; X86-NEXT: shldl %cl, %ebx, %edx
+; X86-NEXT: shll %cl, %ebx
+; X86-NEXT: addl $1, %eax
+; X86-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
+; X86-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
+; X86-NEXT: adcl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
+; X86-NEXT: jae .LBB2_12
+; X86-NEXT: # %bb.16:
+; X86-NEXT: movl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
+; X86-NEXT: xorl %eax, %eax
+; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
+; X86-NEXT: jmp .LBB2_17
+; X86-NEXT: .LBB2_11:
+; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
+; X86-NEXT: jmp .LBB2_19
+; X86-NEXT: .LBB2_12: # %udiv-preheader
+; X86-NEXT: movl %eax, %ecx
+; X86-NEXT: movl %edi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
+; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
+; X86-NEXT: movl %eax, {{[0-9]+}}(%esp)
+; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
+; X86-NEXT: movl %eax, {{[0-9]+}}(%esp)
+; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
+; X86-NEXT: movl %eax, {{[0-9]+}}(%esp)
+; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
+; X86-NEXT: movl %eax, {{[0-9]+}}(%esp)
+; X86-NEXT: movl $0, {{[0-9]+}}(%esp)
+; X86-NEXT: movl $0, {{[0-9]+}}(%esp)
+; X86-NEXT: movl $0, {{[0-9]+}}(%esp)
+; X86-NEXT: movl $0, {{[0-9]+}}(%esp)
+; X86-NEXT: movl %ebx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
+; X86-NEXT: movl %ecx, %eax
+; X86-NEXT: shrb $3, %al
+; X86-NEXT: andb $12, %al
+; X86-NEXT: movzbl %al, %eax
+; X86-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
+; X86-NEXT: movl 92(%esp,%eax), %edx
+; X86-NEXT: movl 88(%esp,%eax), %edi
+; X86-NEXT: movl %edi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
+; X86-NEXT: shrdl %cl, %edx, %edi
+; X86-NEXT: movl 80(%esp,%eax), %ebx
+; X86-NEXT: movl 84(%esp,%eax), %eax
+; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
+; X86-NEXT: movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
+; X86-NEXT: movl %eax, %esi
+; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
+; X86-NEXT: shrdl %cl, %eax, %esi
+; X86-NEXT: shrl %cl, %edx
+; X86-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
+; X86-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
+; X86-NEXT: # kill: def $cl killed $cl killed $ecx
+; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
+; X86-NEXT: shrdl %cl, %eax, %ebx
+; X86-NEXT: xorl %eax, %eax
+; X86-NEXT: movl $3, %ecx
+; X86-NEXT: addl $-1, %ecx
+; X86-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
+; X86-NEXT: movl $0, %ecx
+; X86-NEXT: adcl $-1, %ecx
+; X86-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
+; X86-NEXT: movl $4, %ecx
+; X86-NEXT: adcl $-1, %ecx
+; X86-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
+; X86-NEXT: movl $0, %ecx
+; X86-NEXT: adcl $-1, %ecx
+; X86-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
+; X86-NEXT: movl $0, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
+; X86-NEXT: .p2align 4
+; X86-NEXT: .LBB2_13: # %udiv-do-while
+; X86-NEXT: # =>This Inner Loop Header: Depth=1
+; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
+; X86-NEXT: movl %eax, %ecx
+; X86-NEXT: shldl $1, %edi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
+; X86-NEXT: shldl $1, %esi, %edi
+; X86-NEXT: movl %edi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
+; X86-NEXT: shldl $1, %ebx, %esi
+; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
+; X86-NEXT: shldl $1, %eax, %ebx
+; X86-NEXT: movl %ebx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
+; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Reload
+; X86-NEXT: shldl $1, %edx, %eax
+; X86-NEXT: orl %ecx, %eax
+; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
+; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
+; X86-NEXT: shldl $1, %ecx, %edx
+; X86-NEXT: orl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload
+; X86-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
+; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Reload
+; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
+; X86-NEXT: shldl $1, %eax, %ecx
+; X86-NEXT: orl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Folded Reload
+; X86-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
+; X86-NEXT: addl %eax, %eax
+; X86-NEXT: orl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Folded Reload
+; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
+; X86-NEXT: cmpl %ebx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Reload
+; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
+; X86-NEXT: sbbl %esi, %ecx
+; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
+; X86-NEXT: sbbl %edi, %ecx
+; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
+; X86-NEXT: sbbl %edx, %ecx
+; X86-NEXT: sarl $31, %ecx
+; X86-NEXT: movl %ecx, %eax
+; X86-NEXT: andl $1, %eax
+; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
+; X86-NEXT: movl %ecx, %eax
+; X86-NEXT: movl $4, %edi
+; X86-NEXT: andl %edi, %eax
+; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload
+; X86-NEXT: movl $3, %ebx
+; X86-NEXT: andl %ebx, %ecx
+; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Reload
+; X86-NEXT: subl %ecx, %ebx
+; X86-NEXT: sbbl $0, %esi
+; X86-NEXT: movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
+; X86-NEXT: sbbl %eax, %edi
+; X86-NEXT: sbbl $0, %edx
+; X86-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
+; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
+; X86-NEXT: addl $-1, %ecx
+; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
+; X86-NEXT: adcl $-1, %eax
+; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload
+; X86-NEXT: adcl $-1, %esi
+; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Reload
+; X86-NEXT: adcl $-1, %edx
+; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
+; X86-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
+; X86-NEXT: orl %edx, %eax
+; X86-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
+; X86-NEXT: movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
+; X86-NEXT: orl %esi, %ecx
+; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload
+; X86-NEXT: orl %eax, %ecx
+; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
+; X86-NEXT: jne .LBB2_13
+; X86-NEXT: # %bb.14:
+; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload
+; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
+; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload
+; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Reload
+; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Reload
+; X86-NEXT: .LBB2_17: # %udiv-loop-exit
+; X86-NEXT: shldl $1, %esi, %ecx
+; X86-NEXT: orl %eax, %ecx
+; X86-NEXT: shldl $1, %edx, %esi
+; X86-NEXT: orl %eax, %esi
+; X86-NEXT: shldl $1, %ebx, %edx
+; X86-NEXT: orl %eax, %edx
+; X86-NEXT: addl %ebx, %ebx
+; X86-NEXT: orl {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Folded Reload
+; X86-NEXT: .LBB2_19: # %udiv-end
+; X86-NEXT: xorl %edi, %ecx
+; X86-NEXT: xorl %edi, %esi
+; X86-NEXT: xorl %edi, %edx
+; X86-NEXT: xorl %edi, %ebx
+; X86-NEXT: subl %edi, %ebx
+; X86-NEXT: sbbl %edi, %edx
+; X86-NEXT: sbbl %edi, %esi
+; X86-NEXT: sbbl %edi, %ecx
+; X86-NEXT: movl 8(%ebp), %eax
+; X86-NEXT: movl %ebx, (%eax)
+; X86-NEXT: movl %edx, 4(%eax)
+; X86-NEXT: movl %esi, 8(%eax)
+; X86-NEXT: movl %ecx, 12(%eax)
+; X86-NEXT: leal -12(%ebp), %esp
+; X86-NEXT: popl %esi
+; X86-NEXT: popl %edi
+; X86-NEXT: popl %ebx
+; X86-NEXT: popl %ebp
+; X86-NEXT: retl $4
;
; X64-LABEL: test3:
; X64: # %bb.0:
@@ -129,6 +438,7 @@ define i128 @test3(i128 %x) nounwind {
; X64-NEXT: callq __divti3 at PLT
; X64-NEXT: popq %rcx
; X64-NEXT: retq
+; X86 doesn't have __divti3, so the urem is expanded into a loop.
%tmp = sdiv i128 %x, -73786976294838206467
ret i128 %tmp
}
diff --git a/llvm/test/CodeGen/X86/iabs.ll b/llvm/test/CodeGen/X86/iabs.ll
index bdceeefbcfaba..abe76d728e030 100644
--- a/llvm/test/CodeGen/X86/iabs.ll
+++ b/llvm/test/CodeGen/X86/iabs.ll
@@ -125,31 +125,34 @@ define i128 @test_i128(i128 %a) nounwind {
; X86: # %bb.0:
; X86-NEXT: pushl %ebp
; X86-NEXT: movl %esp, %ebp
+; X86-NEXT: pushl %ebx
; X86-NEXT: pushl %edi
; X86-NEXT: pushl %esi
; X86-NEXT: andl $-16, %esp
-; X86-NEXT: movl 36(%ebp), %ecx
-; X86-NEXT: movl %ecx, %eax
-; X86-NEXT: sarl $31, %eax
-; X86-NEXT: xorl %eax, %ecx
-; X86-NEXT: movl 32(%ebp), %edx
-; X86-NEXT: xorl %eax, %edx
-; X86-NEXT: movl 28(%ebp), %esi
-; X86-NEXT: xorl %eax, %esi
-; X86-NEXT: movl 24(%ebp), %edi
-; X86-NEXT: xorl %eax, %edi
-; X86-NEXT: subl %eax, %edi
-; X86-NEXT: sbbl %eax, %esi
-; X86-NEXT: sbbl %eax, %edx
-; X86-NEXT: sbbl %eax, %ecx
+; X86-NEXT: subl $16, %esp
; X86-NEXT: movl 8(%ebp), %eax
-; X86-NEXT: movl %edi, (%eax)
-; X86-NEXT: movl %esi, 4(%eax)
-; X86-NEXT: movl %edx, 8(%eax)
+; X86-NEXT: movl 36(%ebp), %ecx
+; X86-NEXT: movl %ecx, %edx
+; X86-NEXT: sarl $31, %edx
+; X86-NEXT: xorl %edx, %ecx
+; X86-NEXT: movl 32(%ebp), %esi
+; X86-NEXT: xorl %edx, %esi
+; X86-NEXT: movl 28(%ebp), %edi
+; X86-NEXT: xorl %edx, %edi
+; X86-NEXT: movl 24(%ebp), %ebx
+; X86-NEXT: xorl %edx, %ebx
+; X86-NEXT: subl %edx, %ebx
+; X86-NEXT: sbbl %edx, %edi
+; X86-NEXT: sbbl %edx, %esi
+; X86-NEXT: sbbl %edx, %ecx
+; X86-NEXT: movl %ebx, (%eax)
+; X86-NEXT: movl %edi, 4(%eax)
+; X86-NEXT: movl %esi, 8(%eax)
; X86-NEXT: movl %ecx, 12(%eax)
-; X86-NEXT: leal -8(%ebp), %esp
+; X86-NEXT: leal -12(%ebp), %esp
; X86-NEXT: popl %esi
; X86-NEXT: popl %edi
+; X86-NEXT: popl %ebx
; X86-NEXT: popl %ebp
; X86-NEXT: retl $4
;
diff --git a/llvm/test/CodeGen/X86/peephole-copy.mir b/llvm/test/CodeGen/X86/peephole-copy.mir
index f399398ab1ba1..98da30641edfb 100644
--- a/llvm/test/CodeGen/X86/peephole-copy.mir
+++ b/llvm/test/CodeGen/X86/peephole-copy.mir
@@ -22,14 +22,14 @@ body: |
bb.0:
; CHECK-LABEL: name: c
; CHECK: [[MOV32ri:%[0-9]+]]:gr32_abcd = MOV32ri 512
- ; CHECK-NEXT: INLINEASM &"", 1 /* sideeffect attdialect */, 3211273 /* reguse:GR32_ABCD */, [[MOV32ri]], 1 /* reguse */, implicit-def early-clobber $df
+ ; CHECK-NEXT: INLINEASM &"", 1 /* sideeffect attdialect */, 2949129 /* reguse:GR32_ABCD */, [[MOV32ri]], 1 /* reguse */, implicit-def early-clobber $df
; CHECK-NEXT: [[MOV32ri1:%[0-9]+]]:gr32_abcd = MOV32ri 512
- ; CHECK-NEXT: INLINEASM &"", 1 /* sideeffect attdialect */, 3211273 /* reguse:GR32_ABCD */, [[MOV32ri1]], 1 /* reguse */, implicit-def early-clobber $df
+ ; CHECK-NEXT: INLINEASM &"", 1 /* sideeffect attdialect */, 2949129 /* reguse:GR32_ABCD */, [[MOV32ri1]], 1 /* reguse */, implicit-def early-clobber $df
; CHECK-NEXT: RET 0
%2 = MOV32ri 512
%0 = COPY %2
- INLINEASM &"", 1 /* sideeffect attdialect */, 3211273 /* reguse:GR32_ABCD */, %0:gr32_abcd, 1 /* clobber */, implicit-def early-clobber $df
+ INLINEASM &"", 1 /* sideeffect attdialect */, 2949129 /* reguse:GR32_ABCD */, %0:gr32_abcd, 1 /* clobber */, implicit-def early-clobber $df
%1 = COPY %2
- INLINEASM &"", 1 /* sideeffect attdialect */, 3211273 /* reguse:GR32_ABCD */, %1:gr32_abcd, 1 /* clobber */, implicit-def early-clobber $df
+ INLINEASM &"", 1 /* sideeffect attdialect */, 2949129 /* reguse:GR32_ABCD */, %1:gr32_abcd, 1 /* clobber */, implicit-def early-clobber $df
RET 0
...
diff --git a/llvm/test/CodeGen/X86/physreg-pairs-error.ll b/llvm/test/CodeGen/X86/physreg-pairs-error.ll
index 3ee52023b61c3..e8ec4a2beff94 100644
--- a/llvm/test/CodeGen/X86/physreg-pairs-error.ll
+++ b/llvm/test/CodeGen/X86/physreg-pairs-error.ll
@@ -1,6 +1,8 @@
-; RUN: not llc -mtriple=i386-unknown-linux-gnu -o - %s 2>&1 | FileCheck %s
+; RUN: llc -mtriple=i386-unknown-linux-gnu -o - %s | FileCheck %s
-; CHECK: error: couldn't allocate input reg for constraint '{esp}'
+; CHECK-LABEL: test_esp:
+; CHECK: movl $-1985229329, %esp
+; CHECK: movl %esp, %eax
define dso_local i64 @test_esp(i64 %in) local_unnamed_addr nounwind {
entry:
%0 = tail call i64 asm sideeffect "mov $1, $0", "=r,{esp},~{dirflag},~{fpsr},~{flags}"(i64 81985529216486895)
@@ -9,4 +11,3 @@ entry:
%conv1 = sext i32 %add to i64
ret i64 %conv1
}
-
diff --git a/llvm/test/CodeGen/X86/physreg-pairs.ll b/llvm/test/CodeGen/X86/physreg-pairs.ll
index 07ee803709caa..a32fb7a4942c9 100644
--- a/llvm/test/CodeGen/X86/physreg-pairs.ll
+++ b/llvm/test/CodeGen/X86/physreg-pairs.ll
@@ -11,7 +11,7 @@ define dso_local i64 @test_eax(i64 %in) local_unnamed_addr nounwind {
; CHECK-LABEL: test_eax:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: movl $-1985229329, %eax # imm = 0x89ABCDEF
-; CHECK-NEXT: movl $19088743, %edx # imm = 0x1234567
+; CHECK-NEXT: movl $19088743, %ecx # imm = 0x1234567
; CHECK-NEXT: #APP
; CHECK-NEXT: movl %eax, %eax
; CHECK-NEXT: #NO_APP
@@ -30,14 +30,16 @@ entry:
define dso_local i64 @test_edx(i64 %in) local_unnamed_addr nounwind {
; CHECK-LABEL: test_edx:
; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: pushl %esi
; CHECK-NEXT: movl $-1985229329, %edx # imm = 0x89ABCDEF
-; CHECK-NEXT: movl $19088743, %ecx # imm = 0x1234567
+; CHECK-NEXT: movl $19088743, %esi # imm = 0x1234567
; CHECK-NEXT: #APP
; CHECK-NEXT: movl %edx, %eax
; CHECK-NEXT: #NO_APP
; CHECK-NEXT: addl $3, %eax
; CHECK-NEXT: movl %eax, %edx
; CHECK-NEXT: sarl $31, %edx
+; CHECK-NEXT: popl %esi
; CHECK-NEXT: retl
entry:
%0 = tail call i64 asm sideeffect "mov $1, $0", "=r,{edx},~{dirflag},~{fpsr},~{flags}"(i64 81985529216486895)
@@ -50,16 +52,14 @@ entry:
define dso_local i64 @test_ecx(i64 %in) local_unnamed_addr nounwind {
; CHECK-LABEL: test_ecx:
; CHECK: # %bb.0: # %entry
-; CHECK-NEXT: pushl %ebx
; CHECK-NEXT: movl $-1985229329, %ecx # imm = 0x89ABCDEF
-; CHECK-NEXT: movl $19088743, %ebx # imm = 0x1234567
+; CHECK-NEXT: movl $19088743, %edx # imm = 0x1234567
; CHECK-NEXT: #APP
; CHECK-NEXT: movl %ecx, %eax
; CHECK-NEXT: #NO_APP
; CHECK-NEXT: addl $3, %eax
; CHECK-NEXT: movl %eax, %edx
; CHECK-NEXT: sarl $31, %edx
-; CHECK-NEXT: popl %ebx
; CHECK-NEXT: retl
entry:
%0 = tail call i64 asm sideeffect "mov $1, $0", "=r,{ecx},~{dirflag},~{fpsr},~{flags}"(i64 81985529216486895)
@@ -72,18 +72,18 @@ entry:
define dso_local i64 @test_ebx(i64 %in) local_unnamed_addr nounwind {
; CHECK-LABEL: test_ebx:
; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: pushl %ebp
; CHECK-NEXT: pushl %ebx
-; CHECK-NEXT: pushl %esi
; CHECK-NEXT: movl $-1985229329, %ebx # imm = 0x89ABCDEF
-; CHECK-NEXT: movl $19088743, %esi # imm = 0x1234567
+; CHECK-NEXT: movl $19088743, %ebp # imm = 0x1234567
; CHECK-NEXT: #APP
; CHECK-NEXT: movl %ebx, %eax
; CHECK-NEXT: #NO_APP
; CHECK-NEXT: addl $3, %eax
; CHECK-NEXT: movl %eax, %edx
; CHECK-NEXT: sarl $31, %edx
-; CHECK-NEXT: popl %esi
; CHECK-NEXT: popl %ebx
+; CHECK-NEXT: popl %ebp
; CHECK-NEXT: retl
entry:
%0 = tail call i64 asm sideeffect "mov $1, $0", "=r,{ebx},~{dirflag},~{fpsr},~{flags}"(i64 81985529216486895)
@@ -120,10 +120,10 @@ entry:
define dso_local i64 @test_edi(i64 %in) local_unnamed_addr nounwind {
; CHECK-LABEL: test_edi:
; CHECK: # %bb.0: # %entry
-; CHECK-NEXT: pushl %ebp
+; CHECK-NEXT: pushl %ebx
; CHECK-NEXT: pushl %edi
; CHECK-NEXT: movl $-1985229329, %edi # imm = 0x89ABCDEF
-; CHECK-NEXT: movl $19088743, %ebp # imm = 0x1234567
+; CHECK-NEXT: movl $19088743, %ebx # imm = 0x1234567
; CHECK-NEXT: #APP
; CHECK-NEXT: movl %edi, %eax
; CHECK-NEXT: #NO_APP
@@ -131,7 +131,7 @@ define dso_local i64 @test_edi(i64 %in) local_unnamed_addr nounwind {
; CHECK-NEXT: movl %eax, %edx
; CHECK-NEXT: sarl $31, %edx
; CHECK-NEXT: popl %edi
-; CHECK-NEXT: popl %ebp
+; CHECK-NEXT: popl %ebx
; CHECK-NEXT: retl
entry:
%0 = tail call i64 asm sideeffect "mov $1, $0", "=r,{edi},~{dirflag},~{fpsr},~{flags}"(i64 81985529216486895)
diff --git a/llvm/test/CodeGen/X86/popcnt.ll b/llvm/test/CodeGen/X86/popcnt.ll
index 3004b8b72fcc5..64658e7e7ca27 100644
--- a/llvm/test/CodeGen/X86/popcnt.ll
+++ b/llvm/test/CodeGen/X86/popcnt.ll
@@ -342,84 +342,87 @@ define i128 @cnt128(i128 %x) nounwind readnone {
; X86-NOSSE: # %bb.0:
; X86-NOSSE-NEXT: pushl %ebp
; X86-NOSSE-NEXT: movl %esp, %ebp
+; X86-NOSSE-NEXT: pushl %ebx
; X86-NOSSE-NEXT: pushl %edi
; X86-NOSSE-NEXT: pushl %esi
; X86-NOSSE-NEXT: andl $-16, %esp
-; X86-NOSSE-NEXT: movl 24(%ebp), %eax
-; X86-NOSSE-NEXT: movl 32(%ebp), %ecx
-; X86-NOSSE-NEXT: movl 36(%ebp), %esi
-; X86-NOSSE-NEXT: movl %esi, %edx
-; X86-NOSSE-NEXT: shrl %edx
-; X86-NOSSE-NEXT: andl $1431655765, %edx # imm = 0x55555555
-; X86-NOSSE-NEXT: subl %edx, %esi
-; X86-NOSSE-NEXT: movl %esi, %edx
-; X86-NOSSE-NEXT: andl $858993459, %edx # imm = 0x33333333
+; X86-NOSSE-NEXT: subl $16, %esp
+; X86-NOSSE-NEXT: movl 8(%ebp), %eax
+; X86-NOSSE-NEXT: movl 24(%ebp), %ecx
+; X86-NOSSE-NEXT: movl 28(%ebp), %edx
+; X86-NOSSE-NEXT: movl 32(%ebp), %esi
+; X86-NOSSE-NEXT: movl 36(%ebp), %edi
+; X86-NOSSE-NEXT: movl %edi, %ebx
+; X86-NOSSE-NEXT: shrl %ebx
+; X86-NOSSE-NEXT: andl $1431655765, %ebx # imm = 0x55555555
+; X86-NOSSE-NEXT: subl %ebx, %edi
+; X86-NOSSE-NEXT: movl %edi, %ebx
+; X86-NOSSE-NEXT: andl $858993459, %ebx # imm = 0x33333333
+; X86-NOSSE-NEXT: shrl $2, %edi
+; X86-NOSSE-NEXT: andl $858993459, %edi # imm = 0x33333333
+; X86-NOSSE-NEXT: addl %ebx, %edi
+; X86-NOSSE-NEXT: movl %edi, %ebx
+; X86-NOSSE-NEXT: shrl $4, %ebx
+; X86-NOSSE-NEXT: addl %edi, %ebx
+; X86-NOSSE-NEXT: andl $252645135, %ebx # imm = 0xF0F0F0F
+; X86-NOSSE-NEXT: imull $16843009, %ebx, %edi # imm = 0x1010101
+; X86-NOSSE-NEXT: shrl $24, %edi
+; X86-NOSSE-NEXT: movl %esi, %ebx
+; X86-NOSSE-NEXT: shrl %ebx
+; X86-NOSSE-NEXT: andl $1431655765, %ebx # imm = 0x55555555
+; X86-NOSSE-NEXT: subl %ebx, %esi
+; X86-NOSSE-NEXT: movl %esi, %ebx
+; X86-NOSSE-NEXT: andl $858993459, %ebx # imm = 0x33333333
; X86-NOSSE-NEXT: shrl $2, %esi
; X86-NOSSE-NEXT: andl $858993459, %esi # imm = 0x33333333
-; X86-NOSSE-NEXT: addl %edx, %esi
-; X86-NOSSE-NEXT: movl %esi, %edx
-; X86-NOSSE-NEXT: shrl $4, %edx
-; X86-NOSSE-NEXT: addl %esi, %edx
-; X86-NOSSE-NEXT: movl %ecx, %esi
-; X86-NOSSE-NEXT: shrl %esi
-; X86-NOSSE-NEXT: andl $1431655765, %esi # imm = 0x55555555
-; X86-NOSSE-NEXT: subl %esi, %ecx
-; X86-NOSSE-NEXT: movl %ecx, %esi
-; X86-NOSSE-NEXT: andl $858993459, %esi # imm = 0x33333333
+; X86-NOSSE-NEXT: addl %ebx, %esi
+; X86-NOSSE-NEXT: movl %esi, %ebx
+; X86-NOSSE-NEXT: shrl $4, %ebx
+; X86-NOSSE-NEXT: addl %esi, %ebx
+; X86-NOSSE-NEXT: andl $252645135, %ebx # imm = 0xF0F0F0F
+; X86-NOSSE-NEXT: imull $16843009, %ebx, %esi # imm = 0x1010101
+; X86-NOSSE-NEXT: shrl $24, %esi
+; X86-NOSSE-NEXT: addl %edi, %esi
+; X86-NOSSE-NEXT: movl %edx, %edi
+; X86-NOSSE-NEXT: shrl %edi
+; X86-NOSSE-NEXT: andl $1431655765, %edi # imm = 0x55555555
+; X86-NOSSE-NEXT: subl %edi, %edx
+; X86-NOSSE-NEXT: movl %edx, %edi
+; X86-NOSSE-NEXT: andl $858993459, %edi # imm = 0x33333333
+; X86-NOSSE-NEXT: shrl $2, %edx
+; X86-NOSSE-NEXT: andl $858993459, %edx # imm = 0x33333333
+; X86-NOSSE-NEXT: addl %edi, %edx
+; X86-NOSSE-NEXT: movl %edx, %edi
+; X86-NOSSE-NEXT: shrl $4, %edi
+; X86-NOSSE-NEXT: addl %edx, %edi
+; X86-NOSSE-NEXT: andl $252645135, %edi # imm = 0xF0F0F0F
+; X86-NOSSE-NEXT: imull $16843009, %edi, %edx # imm = 0x1010101
+; X86-NOSSE-NEXT: shrl $24, %edx
+; X86-NOSSE-NEXT: movl %ecx, %edi
+; X86-NOSSE-NEXT: shrl %edi
+; X86-NOSSE-NEXT: andl $1431655765, %edi # imm = 0x55555555
+; X86-NOSSE-NEXT: subl %edi, %ecx
+; X86-NOSSE-NEXT: movl %ecx, %edi
+; X86-NOSSE-NEXT: andl $858993459, %edi # imm = 0x33333333
; X86-NOSSE-NEXT: shrl $2, %ecx
; X86-NOSSE-NEXT: andl $858993459, %ecx # imm = 0x33333333
-; X86-NOSSE-NEXT: addl %esi, %ecx
+; X86-NOSSE-NEXT: addl %edi, %ecx
; X86-NOSSE-NEXT: movl %ecx, %edi
; X86-NOSSE-NEXT: shrl $4, %edi
; X86-NOSSE-NEXT: addl %ecx, %edi
-; X86-NOSSE-NEXT: movl 28(%ebp), %esi
-; X86-NOSSE-NEXT: andl $252645135, %edx # imm = 0xF0F0F0F
-; X86-NOSSE-NEXT: imull $16843009, %edx, %edx # imm = 0x1010101
-; X86-NOSSE-NEXT: shrl $24, %edx
; X86-NOSSE-NEXT: andl $252645135, %edi # imm = 0xF0F0F0F
; X86-NOSSE-NEXT: imull $16843009, %edi, %ecx # imm = 0x1010101
; X86-NOSSE-NEXT: shrl $24, %ecx
; X86-NOSSE-NEXT: addl %edx, %ecx
-; X86-NOSSE-NEXT: movl %esi, %edx
-; X86-NOSSE-NEXT: shrl %edx
-; X86-NOSSE-NEXT: andl $1431655765, %edx # imm = 0x55555555
-; X86-NOSSE-NEXT: subl %edx, %esi
-; X86-NOSSE-NEXT: movl %esi, %edx
-; X86-NOSSE-NEXT: andl $858993459, %edx # imm = 0x33333333
-; X86-NOSSE-NEXT: shrl $2, %esi
-; X86-NOSSE-NEXT: andl $858993459, %esi # imm = 0x33333333
-; X86-NOSSE-NEXT: addl %edx, %esi
-; X86-NOSSE-NEXT: movl %esi, %edx
-; X86-NOSSE-NEXT: shrl $4, %edx
-; X86-NOSSE-NEXT: addl %esi, %edx
-; X86-NOSSE-NEXT: movl %eax, %esi
-; X86-NOSSE-NEXT: shrl %esi
-; X86-NOSSE-NEXT: andl $1431655765, %esi # imm = 0x55555555
-; X86-NOSSE-NEXT: subl %esi, %eax
-; X86-NOSSE-NEXT: movl %eax, %esi
-; X86-NOSSE-NEXT: andl $858993459, %esi # imm = 0x33333333
-; X86-NOSSE-NEXT: shrl $2, %eax
-; X86-NOSSE-NEXT: andl $858993459, %eax # imm = 0x33333333
-; X86-NOSSE-NEXT: addl %esi, %eax
-; X86-NOSSE-NEXT: movl %eax, %esi
-; X86-NOSSE-NEXT: shrl $4, %esi
-; X86-NOSSE-NEXT: addl %eax, %esi
-; X86-NOSSE-NEXT: andl $252645135, %edx # imm = 0xF0F0F0F
-; X86-NOSSE-NEXT: imull $16843009, %edx, %eax # imm = 0x1010101
-; X86-NOSSE-NEXT: shrl $24, %eax
-; X86-NOSSE-NEXT: andl $252645135, %esi # imm = 0xF0F0F0F
-; X86-NOSSE-NEXT: imull $16843009, %esi, %edx # imm = 0x1010101
-; X86-NOSSE-NEXT: shrl $24, %edx
-; X86-NOSSE-NEXT: addl %eax, %edx
-; X86-NOSSE-NEXT: addl %ecx, %edx
-; X86-NOSSE-NEXT: movl 8(%ebp), %eax
-; X86-NOSSE-NEXT: movl %edx, (%eax)
+; X86-NOSSE-NEXT: addl %esi, %ecx
+; X86-NOSSE-NEXT: movl %ecx, (%eax)
; X86-NOSSE-NEXT: movl $0, 12(%eax)
; X86-NOSSE-NEXT: movl $0, 8(%eax)
; X86-NOSSE-NEXT: movl $0, 4(%eax)
-; X86-NOSSE-NEXT: leal -8(%ebp), %esp
+; X86-NOSSE-NEXT: leal -12(%ebp), %esp
; X86-NOSSE-NEXT: popl %esi
; X86-NOSSE-NEXT: popl %edi
+; X86-NOSSE-NEXT: popl %ebx
; X86-NOSSE-NEXT: popl %ebp
; X86-NOSSE-NEXT: retl $4
;
@@ -955,85 +958,84 @@ define i128 @cnt128_optsize(i128 %x) nounwind readnone optsize {
; X86-NOSSE-NEXT: pushl %esi
; X86-NOSSE-NEXT: andl $-16, %esp
; X86-NOSSE-NEXT: subl $16, %esp
-; X86-NOSSE-NEXT: movl 32(%ebp), %edx
-; X86-NOSSE-NEXT: movl 36(%ebp), %esi
-; X86-NOSSE-NEXT: movl %esi, %eax
+; X86-NOSSE-NEXT: movl 28(%ebp), %edx
+; X86-NOSSE-NEXT: movl 32(%ebp), %ecx
+; X86-NOSSE-NEXT: movl 36(%ebp), %edi
+; X86-NOSSE-NEXT: movl %edi, %eax
; X86-NOSSE-NEXT: shrl %eax
-; X86-NOSSE-NEXT: movl $1431655765, %ecx # imm = 0x55555555
-; X86-NOSSE-NEXT: andl %ecx, %eax
-; X86-NOSSE-NEXT: subl %eax, %esi
-; X86-NOSSE-NEXT: movl $858993459, %ecx # imm = 0x33333333
-; X86-NOSSE-NEXT: movl %esi, %edi
-; X86-NOSSE-NEXT: andl %ecx, %edi
-; X86-NOSSE-NEXT: shrl $2, %esi
-; X86-NOSSE-NEXT: andl %ecx, %esi
-; X86-NOSSE-NEXT: addl %edi, %esi
-; X86-NOSSE-NEXT: movl %esi, %edi
-; X86-NOSSE-NEXT: shrl $4, %edi
-; X86-NOSSE-NEXT: addl %esi, %edi
-; X86-NOSSE-NEXT: movl %edx, %esi
-; X86-NOSSE-NEXT: shrl %esi
-; X86-NOSSE-NEXT: movl $1431655765, %eax # imm = 0x55555555
-; X86-NOSSE-NEXT: andl %eax, %esi
-; X86-NOSSE-NEXT: subl %esi, %edx
-; X86-NOSSE-NEXT: movl %edx, %esi
-; X86-NOSSE-NEXT: andl %ecx, %esi
+; X86-NOSSE-NEXT: movl $1431655765, %esi # imm = 0x55555555
+; X86-NOSSE-NEXT: andl %esi, %eax
+; X86-NOSSE-NEXT: subl %eax, %edi
+; X86-NOSSE-NEXT: movl $858993459, %eax # imm = 0x33333333
+; X86-NOSSE-NEXT: movl %edi, %ebx
+; X86-NOSSE-NEXT: andl %eax, %ebx
+; X86-NOSSE-NEXT: shrl $2, %edi
+; X86-NOSSE-NEXT: andl %eax, %edi
+; X86-NOSSE-NEXT: addl %ebx, %edi
+; X86-NOSSE-NEXT: movl %edi, %ebx
+; X86-NOSSE-NEXT: shrl $4, %ebx
+; X86-NOSSE-NEXT: addl %edi, %ebx
+; X86-NOSSE-NEXT: movl %ecx, %edi
+; X86-NOSSE-NEXT: shrl %edi
+; X86-NOSSE-NEXT: andl %esi, %edi
+; X86-NOSSE-NEXT: subl %edi, %ecx
+; X86-NOSSE-NEXT: movl %ecx, %edi
+; X86-NOSSE-NEXT: andl %eax, %edi
+; X86-NOSSE-NEXT: shrl $2, %ecx
+; X86-NOSSE-NEXT: andl %eax, %ecx
+; X86-NOSSE-NEXT: addl %edi, %ecx
+; X86-NOSSE-NEXT: movl %ecx, %esi
+; X86-NOSSE-NEXT: shrl $4, %esi
+; X86-NOSSE-NEXT: addl %ecx, %esi
+; X86-NOSSE-NEXT: movl $252645135, %edi # imm = 0xF0F0F0F
+; X86-NOSSE-NEXT: andl %edi, %ebx
+; X86-NOSSE-NEXT: imull $16843009, %ebx, %ecx # imm = 0x1010101
+; X86-NOSSE-NEXT: shrl $24, %ecx
+; X86-NOSSE-NEXT: andl %edi, %esi
+; X86-NOSSE-NEXT: imull $16843009, %esi, %esi # imm = 0x1010101
+; X86-NOSSE-NEXT: shrl $24, %esi
+; X86-NOSSE-NEXT: addl %ecx, %esi
+; X86-NOSSE-NEXT: movl %edx, %ecx
+; X86-NOSSE-NEXT: shrl %ecx
+; X86-NOSSE-NEXT: movl $1431655765, %edi # imm = 0x55555555
+; X86-NOSSE-NEXT: andl %edi, %ecx
+; X86-NOSSE-NEXT: subl %ecx, %edx
+; X86-NOSSE-NEXT: movl %edx, %ecx
+; X86-NOSSE-NEXT: andl %eax, %ecx
; X86-NOSSE-NEXT: shrl $2, %edx
-; X86-NOSSE-NEXT: andl %ecx, %edx
-; X86-NOSSE-NEXT: addl %esi, %edx
+; X86-NOSSE-NEXT: andl %eax, %edx
+; X86-NOSSE-NEXT: addl %ecx, %edx
; X86-NOSSE-NEXT: movl %edx, %ebx
; X86-NOSSE-NEXT: shrl $4, %ebx
; X86-NOSSE-NEXT: addl %edx, %ebx
-; X86-NOSSE-NEXT: movl $252645135, %edx # imm = 0xF0F0F0F
-; X86-NOSSE-NEXT: andl %edx, %edi
-; X86-NOSSE-NEXT: imull $16843009, %edi, %edi # imm = 0x1010101
-; X86-NOSSE-NEXT: shrl $24, %edi
-; X86-NOSSE-NEXT: andl %edx, %ebx
-; X86-NOSSE-NEXT: imull $16843009, %ebx, %edx # imm = 0x1010101
-; X86-NOSSE-NEXT: shrl $24, %edx
-; X86-NOSSE-NEXT: addl %edi, %edx
-; X86-NOSSE-NEXT: movl 28(%ebp), %ebx
-; X86-NOSSE-NEXT: movl %ebx, %edi
-; X86-NOSSE-NEXT: shrl %edi
-; X86-NOSSE-NEXT: andl %eax, %edi
-; X86-NOSSE-NEXT: subl %edi, %ebx
-; X86-NOSSE-NEXT: movl %ebx, %edi
-; X86-NOSSE-NEXT: andl %ecx, %edi
-; X86-NOSSE-NEXT: shrl $2, %ebx
-; X86-NOSSE-NEXT: andl %ecx, %ebx
-; X86-NOSSE-NEXT: addl %edi, %ebx
-; X86-NOSSE-NEXT: movl %ebx, %edi
-; X86-NOSSE-NEXT: shrl $4, %edi
-; X86-NOSSE-NEXT: addl %ebx, %edi
-; X86-NOSSE-NEXT: movl 24(%ebp), %eax
-; X86-NOSSE-NEXT: movl %eax, %ebx
-; X86-NOSSE-NEXT: shrl %ebx
-; X86-NOSSE-NEXT: movl $1431655765, %esi # imm = 0x55555555
-; X86-NOSSE-NEXT: andl %esi, %ebx
-; X86-NOSSE-NEXT: subl %ebx, %eax
-; X86-NOSSE-NEXT: movl %eax, %ebx
+; X86-NOSSE-NEXT: movl 24(%ebp), %edx
+; X86-NOSSE-NEXT: movl %edx, %ecx
+; X86-NOSSE-NEXT: shrl %ecx
+; X86-NOSSE-NEXT: andl %edi, %ecx
+; X86-NOSSE-NEXT: subl %ecx, %edx
+; X86-NOSSE-NEXT: movl %edx, %ecx
+; X86-NOSSE-NEXT: andl %eax, %ecx
+; X86-NOSSE-NEXT: shrl $2, %edx
+; X86-NOSSE-NEXT: andl %eax, %edx
+; X86-NOSSE-NEXT: addl %ecx, %edx
+; X86-NOSSE-NEXT: movl %edx, %eax
+; X86-NOSSE-NEXT: shrl $4, %eax
+; X86-NOSSE-NEXT: addl %edx, %eax
+; X86-NOSSE-NEXT: movl $252645135, %ecx # imm = 0xF0F0F0F
; X86-NOSSE-NEXT: andl %ecx, %ebx
-; X86-NOSSE-NEXT: shrl $2, %eax
; X86-NOSSE-NEXT: andl %ecx, %eax
-; X86-NOSSE-NEXT: addl %ebx, %eax
-; X86-NOSSE-NEXT: movl %eax, %ecx
-; X86-NOSSE-NEXT: shrl $4, %ecx
-; X86-NOSSE-NEXT: addl %eax, %ecx
-; X86-NOSSE-NEXT: movl $252645135, %eax # imm = 0xF0F0F0F
-; X86-NOSSE-NEXT: andl %eax, %edi
-; X86-NOSSE-NEXT: andl %eax, %ecx
-; X86-NOSSE-NEXT: imull $16843009, %edi, %eax # imm = 0x1010101
-; X86-NOSSE-NEXT: shrl $24, %eax
-; X86-NOSSE-NEXT: imull $16843009, %ecx, %ecx # imm = 0x1010101
+; X86-NOSSE-NEXT: imull $16843009, %ebx, %ecx # imm = 0x1010101
; X86-NOSSE-NEXT: shrl $24, %ecx
-; X86-NOSSE-NEXT: addl %eax, %ecx
+; X86-NOSSE-NEXT: imull $16843009, %eax, %edx # imm = 0x1010101
+; X86-NOSSE-NEXT: shrl $24, %edx
+; X86-NOSSE-NEXT: addl %ecx, %edx
; X86-NOSSE-NEXT: movl 8(%ebp), %eax
-; X86-NOSSE-NEXT: addl %edx, %ecx
-; X86-NOSSE-NEXT: xorl %edx, %edx
-; X86-NOSSE-NEXT: movl %edx, 12(%eax)
-; X86-NOSSE-NEXT: movl %edx, 8(%eax)
-; X86-NOSSE-NEXT: movl %edx, 4(%eax)
-; X86-NOSSE-NEXT: movl %ecx, (%eax)
+; X86-NOSSE-NEXT: addl %esi, %edx
+; X86-NOSSE-NEXT: xorl %ecx, %ecx
+; X86-NOSSE-NEXT: movl %ecx, 12(%eax)
+; X86-NOSSE-NEXT: movl %ecx, 8(%eax)
+; X86-NOSSE-NEXT: movl %ecx, 4(%eax)
+; X86-NOSSE-NEXT: movl %edx, (%eax)
; X86-NOSSE-NEXT: leal -12(%ebp), %esp
; X86-NOSSE-NEXT: popl %esi
; X86-NOSSE-NEXT: popl %edi
@@ -1461,85 +1463,88 @@ define i128 @cnt128_pgso(i128 %x) nounwind readnone !prof !14 {
; X86-NOSSE: # %bb.0:
; X86-NOSSE-NEXT: pushl %ebp
; X86-NOSSE-NEXT: movl %esp, %ebp
+; X86-NOSSE-NEXT: pushl %ebx
; X86-NOSSE-NEXT: pushl %edi
; X86-NOSSE-NEXT: pushl %esi
; X86-NOSSE-NEXT: andl $-16, %esp
-; X86-NOSSE-NEXT: movl 24(%ebp), %eax
-; X86-NOSSE-NEXT: movl 32(%ebp), %ecx
-; X86-NOSSE-NEXT: movl 36(%ebp), %esi
-; X86-NOSSE-NEXT: movl %esi, %edx
-; X86-NOSSE-NEXT: shrl %edx
-; X86-NOSSE-NEXT: andl $1431655765, %edx # imm = 0x55555555
-; X86-NOSSE-NEXT: subl %edx, %esi
-; X86-NOSSE-NEXT: movl %esi, %edx
-; X86-NOSSE-NEXT: andl $858993459, %edx # imm = 0x33333333
+; X86-NOSSE-NEXT: subl $16, %esp
+; X86-NOSSE-NEXT: movl 8(%ebp), %eax
+; X86-NOSSE-NEXT: movl 24(%ebp), %ecx
+; X86-NOSSE-NEXT: movl 28(%ebp), %edx
+; X86-NOSSE-NEXT: movl 32(%ebp), %esi
+; X86-NOSSE-NEXT: movl 36(%ebp), %edi
+; X86-NOSSE-NEXT: movl %edi, %ebx
+; X86-NOSSE-NEXT: shrl %ebx
+; X86-NOSSE-NEXT: andl $1431655765, %ebx # imm = 0x55555555
+; X86-NOSSE-NEXT: subl %ebx, %edi
+; X86-NOSSE-NEXT: movl %edi, %ebx
+; X86-NOSSE-NEXT: andl $858993459, %ebx # imm = 0x33333333
+; X86-NOSSE-NEXT: shrl $2, %edi
+; X86-NOSSE-NEXT: andl $858993459, %edi # imm = 0x33333333
+; X86-NOSSE-NEXT: addl %ebx, %edi
+; X86-NOSSE-NEXT: movl %edi, %ebx
+; X86-NOSSE-NEXT: shrl $4, %ebx
+; X86-NOSSE-NEXT: addl %edi, %ebx
+; X86-NOSSE-NEXT: andl $252645135, %ebx # imm = 0xF0F0F0F
+; X86-NOSSE-NEXT: imull $16843009, %ebx, %edi # imm = 0x1010101
+; X86-NOSSE-NEXT: shrl $24, %edi
+; X86-NOSSE-NEXT: movl %esi, %ebx
+; X86-NOSSE-NEXT: shrl %ebx
+; X86-NOSSE-NEXT: andl $1431655765, %ebx # imm = 0x55555555
+; X86-NOSSE-NEXT: subl %ebx, %esi
+; X86-NOSSE-NEXT: movl %esi, %ebx
+; X86-NOSSE-NEXT: andl $858993459, %ebx # imm = 0x33333333
; X86-NOSSE-NEXT: shrl $2, %esi
; X86-NOSSE-NEXT: andl $858993459, %esi # imm = 0x33333333
-; X86-NOSSE-NEXT: addl %edx, %esi
-; X86-NOSSE-NEXT: movl %esi, %edx
-; X86-NOSSE-NEXT: shrl $4, %edx
-; X86-NOSSE-NEXT: addl %esi, %edx
-; X86-NOSSE-NEXT: movl %ecx, %esi
-; X86-NOSSE-NEXT: shrl %esi
-; X86-NOSSE-NEXT: andl $1431655765, %esi # imm = 0x55555555
-; X86-NOSSE-NEXT: subl %esi, %ecx
-; X86-NOSSE-NEXT: movl %ecx, %esi
-; X86-NOSSE-NEXT: andl $858993459, %esi # imm = 0x33333333
+; X86-NOSSE-NEXT: addl %ebx, %esi
+; X86-NOSSE-NEXT: movl %esi, %ebx
+; X86-NOSSE-NEXT: shrl $4, %ebx
+; X86-NOSSE-NEXT: addl %esi, %ebx
+; X86-NOSSE-NEXT: andl $252645135, %ebx # imm = 0xF0F0F0F
+; X86-NOSSE-NEXT: imull $16843009, %ebx, %esi # imm = 0x1010101
+; X86-NOSSE-NEXT: shrl $24, %esi
+; X86-NOSSE-NEXT: addl %edi, %esi
+; X86-NOSSE-NEXT: movl %edx, %edi
+; X86-NOSSE-NEXT: shrl %edi
+; X86-NOSSE-NEXT: andl $1431655765, %edi # imm = 0x55555555
+; X86-NOSSE-NEXT: subl %edi, %edx
+; X86-NOSSE-NEXT: movl %edx, %edi
+; X86-NOSSE-NEXT: andl $858993459, %edi # imm = 0x33333333
+; X86-NOSSE-NEXT: shrl $2, %edx
+; X86-NOSSE-NEXT: andl $858993459, %edx # imm = 0x33333333
+; X86-NOSSE-NEXT: addl %edi, %edx
+; X86-NOSSE-NEXT: movl %edx, %edi
+; X86-NOSSE-NEXT: shrl $4, %edi
+; X86-NOSSE-NEXT: addl %edx, %edi
+; X86-NOSSE-NEXT: andl $252645135, %edi # imm = 0xF0F0F0F
+; X86-NOSSE-NEXT: imull $16843009, %edi, %edx # imm = 0x1010101
+; X86-NOSSE-NEXT: shrl $24, %edx
+; X86-NOSSE-NEXT: movl %ecx, %edi
+; X86-NOSSE-NEXT: shrl %edi
+; X86-NOSSE-NEXT: andl $1431655765, %edi # imm = 0x55555555
+; X86-NOSSE-NEXT: subl %edi, %ecx
+; X86-NOSSE-NEXT: movl %ecx, %edi
+; X86-NOSSE-NEXT: andl $858993459, %edi # imm = 0x33333333
; X86-NOSSE-NEXT: shrl $2, %ecx
; X86-NOSSE-NEXT: andl $858993459, %ecx # imm = 0x33333333
-; X86-NOSSE-NEXT: addl %esi, %ecx
+; X86-NOSSE-NEXT: addl %edi, %ecx
; X86-NOSSE-NEXT: movl %ecx, %edi
; X86-NOSSE-NEXT: shrl $4, %edi
; X86-NOSSE-NEXT: addl %ecx, %edi
-; X86-NOSSE-NEXT: movl 28(%ebp), %esi
-; X86-NOSSE-NEXT: andl $252645135, %edx # imm = 0xF0F0F0F
-; X86-NOSSE-NEXT: imull $16843009, %edx, %edx # imm = 0x1010101
-; X86-NOSSE-NEXT: shrl $24, %edx
; X86-NOSSE-NEXT: andl $252645135, %edi # imm = 0xF0F0F0F
; X86-NOSSE-NEXT: imull $16843009, %edi, %ecx # imm = 0x1010101
; X86-NOSSE-NEXT: shrl $24, %ecx
; X86-NOSSE-NEXT: addl %edx, %ecx
-; X86-NOSSE-NEXT: movl %esi, %edx
-; X86-NOSSE-NEXT: shrl %edx
-; X86-NOSSE-NEXT: andl $1431655765, %edx # imm = 0x55555555
-; X86-NOSSE-NEXT: subl %edx, %esi
-; X86-NOSSE-NEXT: movl %esi, %edx
-; X86-NOSSE-NEXT: andl $858993459, %edx # imm = 0x33333333
-; X86-NOSSE-NEXT: shrl $2, %esi
-; X86-NOSSE-NEXT: andl $858993459, %esi # imm = 0x33333333
-; X86-NOSSE-NEXT: addl %edx, %esi
-; X86-NOSSE-NEXT: movl %esi, %edx
-; X86-NOSSE-NEXT: shrl $4, %edx
-; X86-NOSSE-NEXT: addl %esi, %edx
-; X86-NOSSE-NEXT: movl %eax, %esi
-; X86-NOSSE-NEXT: shrl %esi
-; X86-NOSSE-NEXT: andl $1431655765, %esi # imm = 0x55555555
-; X86-NOSSE-NEXT: subl %esi, %eax
-; X86-NOSSE-NEXT: movl %eax, %esi
-; X86-NOSSE-NEXT: andl $858993459, %esi # imm = 0x33333333
-; X86-NOSSE-NEXT: shrl $2, %eax
-; X86-NOSSE-NEXT: andl $858993459, %eax # imm = 0x33333333
-; X86-NOSSE-NEXT: addl %esi, %eax
-; X86-NOSSE-NEXT: movl %eax, %esi
-; X86-NOSSE-NEXT: shrl $4, %esi
-; X86-NOSSE-NEXT: addl %eax, %esi
-; X86-NOSSE-NEXT: andl $252645135, %edx # imm = 0xF0F0F0F
-; X86-NOSSE-NEXT: imull $16843009, %edx, %eax # imm = 0x1010101
-; X86-NOSSE-NEXT: shrl $24, %eax
-; X86-NOSSE-NEXT: andl $252645135, %esi # imm = 0xF0F0F0F
-; X86-NOSSE-NEXT: imull $16843009, %esi, %edx # imm = 0x1010101
-; X86-NOSSE-NEXT: shrl $24, %edx
-; X86-NOSSE-NEXT: addl %eax, %edx
-; X86-NOSSE-NEXT: movl 8(%ebp), %eax
-; X86-NOSSE-NEXT: addl %ecx, %edx
-; X86-NOSSE-NEXT: xorl %ecx, %ecx
-; X86-NOSSE-NEXT: movl %ecx, 12(%eax)
-; X86-NOSSE-NEXT: movl %ecx, 8(%eax)
-; X86-NOSSE-NEXT: movl %ecx, 4(%eax)
-; X86-NOSSE-NEXT: movl %edx, (%eax)
-; X86-NOSSE-NEXT: leal -8(%ebp), %esp
+; X86-NOSSE-NEXT: addl %esi, %ecx
+; X86-NOSSE-NEXT: xorl %edx, %edx
+; X86-NOSSE-NEXT: movl %edx, 12(%eax)
+; X86-NOSSE-NEXT: movl %edx, 8(%eax)
+; X86-NOSSE-NEXT: movl %edx, 4(%eax)
+; X86-NOSSE-NEXT: movl %ecx, (%eax)
+; X86-NOSSE-NEXT: leal -12(%ebp), %esp
; X86-NOSSE-NEXT: popl %esi
; X86-NOSSE-NEXT: popl %edi
+; X86-NOSSE-NEXT: popl %ebx
; X86-NOSSE-NEXT: popl %ebp
; X86-NOSSE-NEXT: retl $4
;
diff --git a/llvm/test/CodeGen/X86/pr34080-2.ll b/llvm/test/CodeGen/X86/pr34080-2.ll
index de34bfb13159c..b4a57234be618 100644
--- a/llvm/test/CodeGen/X86/pr34080-2.ll
+++ b/llvm/test/CodeGen/X86/pr34080-2.ll
@@ -61,14 +61,14 @@ define void @computeJD(ptr) nounwind {
; CHECK-NEXT: imull $3600000, 20(%ebx), %ecx # imm = 0x36EE80
; CHECK-NEXT: imull $60000, 24(%ebx), %eax # imm = 0xEA60
; CHECK-NEXT: addl %ecx, %eax
+; CHECK-NEXT: movl %eax, %ecx
+; CHECK-NEXT: sarl $31, %ecx
; CHECK-NEXT: fldl 28(%ebx)
; CHECK-NEXT: fmuls {{\.?LCPI[0-9]+_[0-9]+}}
; CHECK-NEXT: fnstcw {{[0-9]+}}(%esp)
-; CHECK-NEXT: movzwl {{[0-9]+}}(%esp), %ecx
-; CHECK-NEXT: orl $3072, %ecx # imm = 0xC00
-; CHECK-NEXT: movw %cx, {{[0-9]+}}(%esp)
-; CHECK-NEXT: movl %eax, %ecx
-; CHECK-NEXT: sarl $31, %ecx
+; CHECK-NEXT: movzwl {{[0-9]+}}(%esp), %edx
+; CHECK-NEXT: orl $3072, %edx # imm = 0xC00
+; CHECK-NEXT: movw %dx, {{[0-9]+}}(%esp)
; CHECK-NEXT: fldcw {{[0-9]+}}(%esp)
; CHECK-NEXT: fistpll {{[0-9]+}}(%esp)
; CHECK-NEXT: fldcw {{[0-9]+}}(%esp)
diff --git a/llvm/test/CodeGen/X86/pr86880.mir b/llvm/test/CodeGen/X86/pr86880.mir
index 92ebf9a265bb9..949ffa7949ea3 100644
--- a/llvm/test/CodeGen/X86/pr86880.mir
+++ b/llvm/test/CodeGen/X86/pr86880.mir
@@ -11,10 +11,10 @@ body: |
; CHECK-LABEL: name: foo
; CHECK: liveins: $eax
; CHECK-NEXT: {{ $}}
- ; CHECK-NEXT: INLINEASM &"", 0 /* attdialect */, 10 /* regdef */, implicit-def dead $eax, 2686986 /* regdef:GR32_NOREX2 */, def renamable $r15d, 10 /* regdef */, implicit-def dead $ecx, 10 /* regdef */, implicit-def dead $edx, 2147483657 /* reguse tiedto:$0 */, $eax(tied-def 3)
+ ; CHECK-NEXT: INLINEASM &"", 0 /* attdialect */, 10 /* regdef */, implicit-def dead $eax, 2490378 /* regdef:GR32_NOREX2 */, def renamable $r15d, 10 /* regdef */, implicit-def dead $ecx, 10 /* regdef */, implicit-def dead $edx, 2147483657 /* reguse tiedto:$0 */, $eax(tied-def 3)
; CHECK-NEXT: renamable $ecx = COPY killed renamable $r15d
; CHECK-NEXT: NOOP implicit $ecx
- INLINEASM &"", 0 /* attdialect */, 10 /* regdef */, implicit-def dead $eax, 2686986 /* regdef:GR32_NOREX2 */, def renamable $r15d, 10 /* regdef */, implicit-def dead $ecx, 10 /* regdef */, implicit-def dead $edx, 2147483657 /* reguse tiedto:$0 */, $eax(tied-def 3)
+ INLINEASM &"", 0 /* attdialect */, 10 /* regdef */, implicit-def dead $eax, 2490378 /* regdef:GR32_NOREX2 */, def renamable $r15d, 10 /* regdef */, implicit-def dead $ecx, 10 /* regdef */, implicit-def dead $edx, 2147483657 /* reguse tiedto:$0 */, $eax(tied-def 3)
renamable $ecx = COPY killed renamable $r15d
NOOP implicit $ecx
diff --git a/llvm/test/CodeGen/X86/regallocfast-callbr-asm-spills-after-reload.mir b/llvm/test/CodeGen/X86/regallocfast-callbr-asm-spills-after-reload.mir
index 4341250e0e66a..d816d13004402 100644
--- a/llvm/test/CodeGen/X86/regallocfast-callbr-asm-spills-after-reload.mir
+++ b/llvm/test/CodeGen/X86/regallocfast-callbr-asm-spills-after-reload.mir
@@ -36,7 +36,7 @@ body: |
%6:gr32 = MOV32rm %0, 1, $noreg, 0, $noreg :: (load (s32))
%5:gr32_norex2 = COPY %6
%4:gr32_norex2 = COPY %5
- INLINEASM_BR &" subl $$11, $0; cmpl $$11, $0; je ${2:l};", 0 /* attdialect */, 2686986 /* regdef:GR32_NOREX2 */, def %4, 2147483657 /* reguse tiedto:$0 */, %4(tied-def 3), 13 /* imm */, %bb.3, 12 /* clobber */, implicit-def early-clobber $df, 12 /* clobber */, implicit-def early-clobber $fpsw, 12 /* clobber */, implicit-def early-clobber $eflags
+ INLINEASM_BR &" subl $$11, $0; cmpl $$11, $0; je ${2:l};", 0 /* attdialect */, 2490378 /* regdef:GR32_NOREX2 */, def %4, 2147483657 /* reguse tiedto:$0 */, %4(tied-def 3), 13 /* imm */, %bb.3, 12 /* clobber */, implicit-def early-clobber $df, 12 /* clobber */, implicit-def early-clobber $fpsw, 12 /* clobber */, implicit-def early-clobber $eflags
%1:gr32 = COPY %4
JMP_1 %bb.1
diff --git a/llvm/test/CodeGen/X86/scheduler-asm-moves.mir b/llvm/test/CodeGen/X86/scheduler-asm-moves.mir
index 045b02188888f..31c01fcf98238 100644
--- a/llvm/test/CodeGen/X86/scheduler-asm-moves.mir
+++ b/llvm/test/CodeGen/X86/scheduler-asm-moves.mir
@@ -127,7 +127,7 @@ body: |
; CHECK-NEXT: [[MOV32rm:%[0-9]+]]:gr32 = MOV32rm $noreg, 1, $noreg, @csum_ipv6_magic_daddr, $noreg :: (dereferenceable load (s32) from @csum_ipv6_magic_daddr, !tbaa !4)
; CHECK-NEXT: [[MOV32rm1:%[0-9]+]]:gr32 = MOV32rm $noreg, 1, $noreg, @csum_ipv6_magic_proto, $noreg :: (dereferenceable load (s32) from @csum_ipv6_magic_proto, !tbaa !4)
; CHECK-NEXT: [[MOV32r0_:%[0-9]+]]:gr32 = MOV32r0 implicit-def dead $eflags
- ; CHECK-NEXT: INLINEASM &"", 0 /* attdialect */, 2359307 /* regdef-ec:GR32 */, def early-clobber %2, 65545 /* reguse:GR8 */, [[MOV8rm]], 2359305 /* reguse:GR32 */, [[MOV32rm]], 2359305 /* reguse:GR32 */, [[MOV32r0_]], 2359305 /* reguse:GR32 */, [[MOV32rm1]], 12 /* clobber */, implicit-def dead early-clobber $df, 12 /* clobber */, implicit-def early-clobber $fpsw, 12 /* clobber */, implicit-def dead early-clobber $eflags, !8
+ ; CHECK-NEXT: INLINEASM &"", 0 /* attdialect */, 2228235 /* regdef-ec:GR32 */, def early-clobber %2, 65545 /* reguse:GR8 */, [[MOV8rm]], 2228233 /* reguse:GR32 */, [[MOV32rm]], 2228233 /* reguse:GR32 */, [[MOV32r0_]], 2228233 /* reguse:GR32 */, [[MOV32rm1]], 12 /* clobber */, implicit-def dead early-clobber $df, 12 /* clobber */, implicit-def early-clobber $fpsw, 12 /* clobber */, implicit-def dead early-clobber $eflags, !8
; CHECK-NEXT: MOV32mr $noreg, 1, $noreg, @csum_ipv6_magic_sum, $noreg, %2 :: (store (s32) into @csum_ipv6_magic_sum, !tbaa !4)
; CHECK-NEXT: [[MOV32rm2:%[0-9]+]]:gr32 = MOV32rm $noreg, 1, $noreg, @synproxy_send_tcp_ipv6_nskb, $noreg :: (dereferenceable load (s32) from @synproxy_send_tcp_ipv6_nskb, !tbaa !9)
; CHECK-NEXT: OR8mi [[MOV32rm2]], 1, $noreg, 0, $noreg, 3, implicit-def dead $eflags :: (store (s8) into %ir.4), (load (s8) from %ir.4)
@@ -142,7 +142,7 @@ body: |
%4:gr32 = MOV32rm $noreg, 1, $noreg, @csum_ipv6_magic_daddr, $noreg :: (dereferenceable load (s32) from @csum_ipv6_magic_daddr, !tbaa !5)
%6:gr32 = MOV32rm $noreg, 1, $noreg, @csum_ipv6_magic_proto, $noreg :: (dereferenceable load (s32) from @csum_ipv6_magic_proto, !tbaa !5)
%5:gr32 = MOV32r0 implicit-def dead $eflags
- INLINEASM &"", 0 /* attdialect */, 2359307 /* regdef-ec:GR32 */, def early-clobber %2, 65545 /* reguse:GR8 */, %3, 2359305 /* reguse:GR32 */, %4, 2359305 /* reguse:GR32 */, %5, 2359305 /* reguse:GR32 */, %6, 12 /* clobber */, implicit-def dead early-clobber $df, 12 /* clobber */, implicit-def early-clobber $fpsw, 12 /* clobber */, implicit-def dead early-clobber $eflags, !9
+ INLINEASM &"", 0 /* attdialect */, 2228235 /* regdef-ec:GR32 */, def early-clobber %2, 65545 /* reguse:GR8 */, %3, 2228233 /* reguse:GR32 */, %4, 2228233 /* reguse:GR32 */, %5, 2228233 /* reguse:GR32 */, %6, 12 /* clobber */, implicit-def dead early-clobber $df, 12 /* clobber */, implicit-def early-clobber $fpsw, 12 /* clobber */, implicit-def dead early-clobber $eflags, !9
MOV32mr $noreg, 1, $noreg, @csum_ipv6_magic_sum, $noreg, %2 :: (store (s32) into @csum_ipv6_magic_sum, !tbaa !5)
%7:gr32 = MOV32rm $noreg, 1, $noreg, @synproxy_send_tcp_ipv6_nskb, $noreg :: (dereferenceable load (s32) from @synproxy_send_tcp_ipv6_nskb, !tbaa !10)
OR8mi %7, 1, $noreg, 0, $noreg, 3, implicit-def dead $eflags :: (store (s8) into %ir.4), (load (s8) from %ir.4)
diff --git a/llvm/test/CodeGen/X86/scmp.ll b/llvm/test/CodeGen/X86/scmp.ll
index 8a287229a1cb1..164c2bc02a480 100644
--- a/llvm/test/CodeGen/X86/scmp.ll
+++ b/llvm/test/CodeGen/X86/scmp.ll
@@ -124,26 +124,26 @@ define i8 @scmp.8.128(i128 %x, i128 %y) nounwind {
; X86-NEXT: pushl %esi
; X86-NEXT: andl $-16, %esp
; X86-NEXT: subl $16, %esp
-; X86-NEXT: movl 24(%ebp), %ecx
-; X86-NEXT: movl 28(%ebp), %eax
-; X86-NEXT: movl 12(%ebp), %edi
-; X86-NEXT: cmpl %ecx, 8(%ebp)
-; X86-NEXT: sbbl %eax, %edi
-; X86-NEXT: movl 32(%ebp), %edi
+; X86-NEXT: movl 32(%ebp), %eax
+; X86-NEXT: movl 24(%ebp), %edx
+; X86-NEXT: movl 28(%ebp), %ecx
+; X86-NEXT: movl 12(%ebp), %ebx
+; X86-NEXT: cmpl %edx, 8(%ebp)
+; X86-NEXT: sbbl %ecx, %ebx
; X86-NEXT: movl 16(%ebp), %ebx
-; X86-NEXT: sbbl %edi, %ebx
+; X86-NEXT: sbbl %eax, %ebx
; X86-NEXT: movl 36(%ebp), %ebx
-; X86-NEXT: movl 20(%ebp), %edx
-; X86-NEXT: movl %edx, %ecx
-; X86-NEXT: sbbl %ebx, %ecx
-; X86-NEXT: setl %cl
-; X86-NEXT: movl 24(%ebp), %esi
-; X86-NEXT: cmpl 8(%ebp), %esi
-; X86-NEXT: sbbl 12(%ebp), %eax
-; X86-NEXT: sbbl 16(%ebp), %edi
-; X86-NEXT: sbbl %edx, %ebx
+; X86-NEXT: movl 20(%ebp), %esi
+; X86-NEXT: movl %esi, %edx
+; X86-NEXT: sbbl %ebx, %edx
+; X86-NEXT: setl %dl
+; X86-NEXT: movl 24(%ebp), %edi
+; X86-NEXT: cmpl 8(%ebp), %edi
+; X86-NEXT: sbbl 12(%ebp), %ecx
+; X86-NEXT: sbbl 16(%ebp), %eax
+; X86-NEXT: sbbl %esi, %ebx
; X86-NEXT: setl %al
-; X86-NEXT: subb %cl, %al
+; X86-NEXT: subb %dl, %al
; X86-NEXT: leal -12(%ebp), %esp
; X86-NEXT: popl %esi
; X86-NEXT: popl %edi
diff --git a/llvm/test/CodeGen/X86/sdiv_fix.ll b/llvm/test/CodeGen/X86/sdiv_fix.ll
index 392bc83d9d5d8..b0bbc475d02cc 100644
--- a/llvm/test/CodeGen/X86/sdiv_fix.ll
+++ b/llvm/test/CodeGen/X86/sdiv_fix.ll
@@ -335,10 +335,10 @@ define i64 @func5(i64 %x, i64 %y) nounwind {
; X86-NEXT: subl $4, %esp
; X86-NEXT: movl 20(%ebp), %eax
; X86-NEXT: movl %eax, {{[0-9]+}}(%esp)
-; X86-NEXT: movl 16(%ebp), %eax
-; X86-NEXT: movl %eax, {{[0-9]+}}(%esp)
; X86-NEXT: movl %ebx, {{[0-9]+}}(%esp)
; X86-NEXT: movl %ebx, {{[0-9]+}}(%esp)
+; X86-NEXT: movl 16(%ebp), %eax
+; X86-NEXT: movl %eax, {{[0-9]+}}(%esp)
; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
; X86-NEXT: movl %ecx, {{[0-9]+}}(%esp)
; X86-NEXT: movl %edi, {{[0-9]+}}(%esp)
diff --git a/llvm/test/CodeGen/X86/sdiv_fix_sat.ll b/llvm/test/CodeGen/X86/sdiv_fix_sat.ll
index 7df490f984928..54acff521777a 100644
--- a/llvm/test/CodeGen/X86/sdiv_fix_sat.ll
+++ b/llvm/test/CodeGen/X86/sdiv_fix_sat.ll
@@ -398,11 +398,11 @@ define i64 @func5(i64 %x, i64 %y) nounwind {
; X86-NEXT: subl $4, %esp
; X86-NEXT: movl 20(%ebp), %eax
; X86-NEXT: movl %eax, {{[0-9]+}}(%esp)
-; X86-NEXT: movl 16(%ebp), %eax
-; X86-NEXT: movl %eax, {{[0-9]+}}(%esp)
; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
; X86-NEXT: movl %ecx, {{[0-9]+}}(%esp)
; X86-NEXT: movl %ecx, {{[0-9]+}}(%esp)
+; X86-NEXT: movl 16(%ebp), %eax
+; X86-NEXT: movl %eax, {{[0-9]+}}(%esp)
; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Reload
; X86-NEXT: movl %edx, {{[0-9]+}}(%esp)
; X86-NEXT: movl %edi, {{[0-9]+}}(%esp)
@@ -417,12 +417,11 @@ define i64 @func5(i64 %x, i64 %y) nounwind {
; X86-NEXT: subl $1, %edi
; X86-NEXT: sbbl $0, %eax
; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
-; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
-; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
-; X86-NEXT: sbbl $0, %eax
-; X86-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
-; X86-NEXT: movl %esi, %ebx
+; X86-NEXT: movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
+; X86-NEXT: sbbl $0, %esi
+; X86-NEXT: movl {{[0-9]+}}(%esp), %ebx
+; X86-NEXT: movl %ebx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-NEXT: sbbl $0, %ebx
; X86-NEXT: testl %ecx, %ecx
; X86-NEXT: sets %al
@@ -439,24 +438,26 @@ define i64 @func5(i64 %x, i64 %y) nounwind {
; X86-NEXT: orl %eax, %ecx
; X86-NEXT: setne %al
; X86-NEXT: testb %al, {{[-0-9]+}}(%e{{[sb]}}p) # 1-byte Folded Reload
-; X86-NEXT: cmovel %esi, %ebx
+; X86-NEXT: cmovel {{[-0-9]+}}(%e{{[sb]}}p), %ebx # 4-byte Folded Reload
+; X86-NEXT: movl %esi, %edx
+; X86-NEXT: cmovel {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload
; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
; X86-NEXT: cmovel {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Folded Reload
-; X86-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
-; X86-NEXT: cmovel {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Folded Reload
-; X86-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; X86-NEXT: cmovel {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Folded Reload
; X86-NEXT: cmpl $-1, %edi
-; X86-NEXT: sbbl $2147483647, %ecx # imm = 0x7FFFFFFF
; X86-NEXT: movl %eax, %ecx
+; X86-NEXT: movl %eax, %esi
+; X86-NEXT: sbbl $2147483647, %ecx # imm = 0x7FFFFFFF
+; X86-NEXT: movl %edx, %ecx
; X86-NEXT: sbbl $0, %ecx
; X86-NEXT: movl %ebx, %ecx
; X86-NEXT: sbbl $0, %ecx
+; X86-NEXT: movl $0, %eax
+; X86-NEXT: cmovgel %eax, %ebx
+; X86-NEXT: cmovgel %eax, %edx
+; X86-NEXT: movl %edx, %eax
; X86-NEXT: movl $2147483647, %edx # imm = 0x7FFFFFFF
-; X86-NEXT: cmovll {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Folded Reload
-; X86-NEXT: movl $0, %ecx
-; X86-NEXT: cmovgel %ecx, %ebx
-; X86-NEXT: cmovgel %ecx, %eax
+; X86-NEXT: cmovll %esi, %edx
; X86-NEXT: movl $-1, %ecx
; X86-NEXT: cmovgel %ecx, %edi
; X86-NEXT: movl %edi, %esi
diff --git a/llvm/test/CodeGen/X86/shift-i128.ll b/llvm/test/CodeGen/X86/shift-i128.ll
index 049ee47af9681..c120731001ad7 100644
--- a/llvm/test/CodeGen/X86/shift-i128.ll
+++ b/llvm/test/CodeGen/X86/shift-i128.ll
@@ -33,21 +33,21 @@ define void @test_lshr_i128(i128 %x, i128 %a, ptr nocapture %r) nounwind {
; i686-NEXT: shrb $3, %al
; i686-NEXT: andb $12, %al
; i686-NEXT: movzbl %al, %edi
-; i686-NEXT: movl 8(%esp,%edi), %eax
+; i686-NEXT: movl 8(%esp,%edi), %edx
+; i686-NEXT: movl (%esp,%edi), %eax
; i686-NEXT: movl 4(%esp,%edi), %ebx
-; i686-NEXT: movl %ebx, %edx
-; i686-NEXT: shrdl %cl, %eax, %edx
-; i686-NEXT: movl (%esp,%edi), %esi
+; i686-NEXT: movl %ebx, %esi
+; i686-NEXT: shrdl %cl, %edx, %esi
; i686-NEXT: movl 12(%esp,%edi), %edi
-; i686-NEXT: shrdl %cl, %edi, %eax
-; i686-NEXT: shrdl %cl, %ebx, %esi
-; i686-NEXT: movl 40(%ebp), %ebx
+; i686-NEXT: shrdl %cl, %edi, %edx
+; i686-NEXT: shrdl %cl, %ebx, %eax
; i686-NEXT: # kill: def $cl killed $cl killed $ecx
; i686-NEXT: shrl %cl, %edi
-; i686-NEXT: movl %edi, 12(%ebx)
-; i686-NEXT: movl %eax, 8(%ebx)
-; i686-NEXT: movl %edx, 4(%ebx)
-; i686-NEXT: movl %esi, (%ebx)
+; i686-NEXT: movl 40(%ebp), %ecx
+; i686-NEXT: movl %edi, 12(%ecx)
+; i686-NEXT: movl %edx, 8(%ecx)
+; i686-NEXT: movl %esi, 4(%ecx)
+; i686-NEXT: movl %eax, (%ecx)
; i686-NEXT: leal -12(%ebp), %esp
; i686-NEXT: popl %esi
; i686-NEXT: popl %edi
@@ -101,21 +101,21 @@ define void @test_ashr_i128(i128 %x, i128 %a, ptr nocapture %r) nounwind {
; i686-NEXT: shrb $3, %al
; i686-NEXT: andb $12, %al
; i686-NEXT: movzbl %al, %edi
-; i686-NEXT: movl 8(%esp,%edi), %eax
+; i686-NEXT: movl 8(%esp,%edi), %edx
+; i686-NEXT: movl (%esp,%edi), %eax
; i686-NEXT: movl 4(%esp,%edi), %ebx
-; i686-NEXT: movl %ebx, %edx
-; i686-NEXT: shrdl %cl, %eax, %edx
-; i686-NEXT: movl (%esp,%edi), %esi
+; i686-NEXT: movl %ebx, %esi
+; i686-NEXT: shrdl %cl, %edx, %esi
; i686-NEXT: movl 12(%esp,%edi), %edi
-; i686-NEXT: shrdl %cl, %edi, %eax
-; i686-NEXT: shrdl %cl, %ebx, %esi
-; i686-NEXT: movl 40(%ebp), %ebx
+; i686-NEXT: shrdl %cl, %edi, %edx
+; i686-NEXT: shrdl %cl, %ebx, %eax
; i686-NEXT: # kill: def $cl killed $cl killed $ecx
; i686-NEXT: sarl %cl, %edi
-; i686-NEXT: movl %edi, 12(%ebx)
-; i686-NEXT: movl %eax, 8(%ebx)
-; i686-NEXT: movl %edx, 4(%ebx)
-; i686-NEXT: movl %esi, (%ebx)
+; i686-NEXT: movl 40(%ebp), %ecx
+; i686-NEXT: movl %edi, 12(%ecx)
+; i686-NEXT: movl %edx, 8(%ecx)
+; i686-NEXT: movl %esi, 4(%ecx)
+; i686-NEXT: movl %eax, (%ecx)
; i686-NEXT: leal -12(%ebp), %esp
; i686-NEXT: popl %esi
; i686-NEXT: popl %edi
@@ -151,7 +151,7 @@ define void @test_shl_i128(i128 %x, i128 %a, ptr nocapture %r) nounwind {
; i686-NEXT: pushl %edi
; i686-NEXT: pushl %esi
; i686-NEXT: andl $-16, %esp
-; i686-NEXT: subl $48, %esp
+; i686-NEXT: subl $64, %esp
; i686-NEXT: movl 24(%ebp), %ecx
; i686-NEXT: movl 8(%ebp), %eax
; i686-NEXT: movl 12(%ebp), %edx
@@ -164,28 +164,30 @@ define void @test_shl_i128(i128 %x, i128 %a, ptr nocapture %r) nounwind {
; i686-NEXT: movl $0, {{[0-9]+}}(%esp)
; i686-NEXT: movl $0, {{[0-9]+}}(%esp)
; i686-NEXT: movl $0, {{[0-9]+}}(%esp)
-; i686-NEXT: movl $0, (%esp)
+; i686-NEXT: movl $0, {{[0-9]+}}(%esp)
; i686-NEXT: movl %ecx, %eax
; i686-NEXT: shrb $3, %al
; i686-NEXT: andb $12, %al
; i686-NEXT: negb %al
-; i686-NEXT: movsbl %al, %edi
-; i686-NEXT: movl 20(%esp,%edi), %eax
-; i686-NEXT: movl 24(%esp,%edi), %ebx
-; i686-NEXT: movl %ebx, %esi
-; i686-NEXT: shldl %cl, %eax, %esi
-; i686-NEXT: movl 16(%esp,%edi), %edx
-; i686-NEXT: movl 28(%esp,%edi), %edi
-; i686-NEXT: shldl %cl, %ebx, %edi
-; i686-NEXT: movl 40(%ebp), %ebx
-; i686-NEXT: movl %edi, 12(%ebx)
-; i686-NEXT: movl %esi, 8(%ebx)
-; i686-NEXT: movl %edx, %esi
-; i686-NEXT: shll %cl, %esi
+; i686-NEXT: movsbl %al, %esi
+; i686-NEXT: movl 32(%esp,%esi), %eax
+; i686-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
+; i686-NEXT: movl 36(%esp,%esi), %edx
+; i686-NEXT: movl 40(%esp,%esi), %ebx
+; i686-NEXT: movl %ebx, %edi
+; i686-NEXT: shldl %cl, %edx, %edi
+; i686-NEXT: movl 44(%esp,%esi), %eax
+; i686-NEXT: movl 40(%ebp), %esi
+; i686-NEXT: shldl %cl, %ebx, %eax
+; i686-NEXT: movl %eax, 12(%esi)
+; i686-NEXT: movl %edi, 8(%esi)
+; i686-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload
+; i686-NEXT: movl %edi, %eax
+; i686-NEXT: shll %cl, %eax
; i686-NEXT: # kill: def $cl killed $cl killed $ecx
-; i686-NEXT: shldl %cl, %edx, %eax
-; i686-NEXT: movl %eax, 4(%ebx)
-; i686-NEXT: movl %esi, (%ebx)
+; i686-NEXT: shldl %cl, %edi, %edx
+; i686-NEXT: movl %edx, 4(%esi)
+; i686-NEXT: movl %eax, (%esi)
; i686-NEXT: leal -12(%ebp), %esp
; i686-NEXT: popl %esi
; i686-NEXT: popl %edi
@@ -286,15 +288,15 @@ define void @test_lshr_v2i128(<2 x i128> %x, <2 x i128> %a, ptr nocapture %r) no
; i686-NEXT: movl 24(%ebp), %eax
; i686-NEXT: movl 28(%ebp), %ecx
; i686-NEXT: movl 32(%ebp), %esi
-; i686-NEXT: movl 20(%ebp), %edi
-; i686-NEXT: movl %edi, {{[0-9]+}}(%esp)
-; i686-NEXT: movl 16(%ebp), %edi
-; i686-NEXT: movl %edi, {{[0-9]+}}(%esp)
-; i686-NEXT: movl 12(%ebp), %edi
-; i686-NEXT: movl %edi, {{[0-9]+}}(%esp)
-; i686-NEXT: movl 8(%ebp), %edi
-; i686-NEXT: movl %edi, {{[0-9]+}}(%esp)
; i686-NEXT: movl 36(%ebp), %edi
+; i686-NEXT: movl 20(%ebp), %ebx
+; i686-NEXT: movl %ebx, {{[0-9]+}}(%esp)
+; i686-NEXT: movl 16(%ebp), %ebx
+; i686-NEXT: movl %ebx, {{[0-9]+}}(%esp)
+; i686-NEXT: movl 12(%ebp), %ebx
+; i686-NEXT: movl %ebx, {{[0-9]+}}(%esp)
+; i686-NEXT: movl 8(%ebp), %ebx
+; i686-NEXT: movl %ebx, {{[0-9]+}}(%esp)
; i686-NEXT: movl %edi, {{[0-9]+}}(%esp)
; i686-NEXT: movl %esi, {{[0-9]+}}(%esp)
; i686-NEXT: movl %ecx, {{[0-9]+}}(%esp)
@@ -303,58 +305,58 @@ define void @test_lshr_v2i128(<2 x i128> %x, <2 x i128> %a, ptr nocapture %r) no
; i686-NEXT: movl $0, {{[0-9]+}}(%esp)
; i686-NEXT: movl $0, {{[0-9]+}}(%esp)
; i686-NEXT: movl $0, {{[0-9]+}}(%esp)
-; i686-NEXT: movl %edx, %ebx
-; i686-NEXT: andl $31, %ebx
+; i686-NEXT: movl %edx, %eax
+; i686-NEXT: andl $31, %eax
; i686-NEXT: shrl $3, %edx
; i686-NEXT: andl $12, %edx
-; i686-NEXT: movl 40(%esp,%edx), %eax
-; i686-NEXT: movl 36(%esp,%edx), %esi
-; i686-NEXT: movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
-; i686-NEXT: movl %ebx, %ecx
-; i686-NEXT: shrdl %cl, %eax, %esi
-; i686-NEXT: movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
+; i686-NEXT: movl 40(%esp,%edx), %esi
; i686-NEXT: movl 32(%esp,%edx), %ecx
; i686-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
+; i686-NEXT: movl 36(%esp,%edx), %edi
+; i686-NEXT: movl %edi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
+; i686-NEXT: movl %eax, %ecx
+; i686-NEXT: shrdl %cl, %esi, %edi
+; i686-NEXT: movl %edi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; i686-NEXT: movl 44(%esp,%edx), %edx
-; i686-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
-; i686-NEXT: movl %ebx, %ecx
-; i686-NEXT: movl %ebx, %esi
-; i686-NEXT: shrdl %cl, %edx, %eax
-; i686-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
+; i686-NEXT: movl %edx, (%esp) # 4-byte Spill
+; i686-NEXT: shrdl %cl, %edx, %esi
+; i686-NEXT: movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; i686-NEXT: movl $0, {{[0-9]+}}(%esp)
; i686-NEXT: movl $0, {{[0-9]+}}(%esp)
; i686-NEXT: movl $0, {{[0-9]+}}(%esp)
; i686-NEXT: movl $0, {{[0-9]+}}(%esp)
; i686-NEXT: movl 56(%ebp), %edx
-; i686-NEXT: movl %edx, %eax
-; i686-NEXT: andl $31, %eax
+; i686-NEXT: movl %edx, %ebx
+; i686-NEXT: andl $31, %ebx
; i686-NEXT: shrl $3, %edx
; i686-NEXT: andl $12, %edx
-; i686-NEXT: movl 72(%esp,%edx), %ebx
-; i686-NEXT: movl 68(%esp,%edx), %edi
-; i686-NEXT: movl %edi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
-; i686-NEXT: movl %eax, %ecx
-; i686-NEXT: shrdl %cl, %ebx, %edi
-; i686-NEXT: movl %edi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
-; i686-NEXT: movl 64(%esp,%edx), %edi
+; i686-NEXT: movl 72(%esp,%edx), %edi
+; i686-NEXT: movl 68(%esp,%edx), %esi
+; i686-NEXT: movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
+; i686-NEXT: movl %ebx, %ecx
+; i686-NEXT: shrdl %cl, %edi, %esi
+; i686-NEXT: movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
+; i686-NEXT: movl 64(%esp,%edx), %ecx
+; i686-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; i686-NEXT: movl 76(%esp,%edx), %edx
-; i686-NEXT: shrdl %cl, %edx, %ebx
-; i686-NEXT: movl %esi, %ecx
+; i686-NEXT: movl %ebx, %ecx
+; i686-NEXT: shrdl %cl, %edx, %edi
+; i686-NEXT: movl %eax, %ecx
; i686-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload
; i686-NEXT: shrdl %cl, %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
-; i686-NEXT: # kill: def $cl killed $cl killed $ecx
-; i686-NEXT: shrl %cl, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
-; i686-NEXT: movl %eax, %ecx
+; i686-NEXT: shrl %cl, (%esp) # 4-byte Folded Spill
+; i686-NEXT: movl %ebx, %ecx
; i686-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload
-; i686-NEXT: shrdl %cl, %esi, %edi
+; i686-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
+; i686-NEXT: shrdl %cl, %eax, %esi
; i686-NEXT: shrl %cl, %edx
; i686-NEXT: movl 72(%ebp), %eax
; i686-NEXT: movl %edx, 28(%eax)
-; i686-NEXT: movl %ebx, 24(%eax)
+; i686-NEXT: movl %edi, 24(%eax)
; i686-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
; i686-NEXT: movl %ecx, 20(%eax)
-; i686-NEXT: movl %edi, 16(%eax)
-; i686-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
+; i686-NEXT: movl %esi, 16(%eax)
+; i686-NEXT: movl (%esp), %ecx # 4-byte Reload
; i686-NEXT: movl %ecx, 12(%eax)
; i686-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
; i686-NEXT: movl %ecx, 8(%eax)
@@ -410,47 +412,46 @@ define void @test_ashr_v2i128(<2 x i128> %x, <2 x i128> %a, ptr nocapture %r) no
; i686-NEXT: andl $-16, %esp
; i686-NEXT: subl $112, %esp
; i686-NEXT: movl 40(%ebp), %edx
-; i686-NEXT: movl 24(%ebp), %eax
-; i686-NEXT: movl 28(%ebp), %ecx
-; i686-NEXT: movl 32(%ebp), %esi
-; i686-NEXT: movl 16(%ebp), %edi
-; i686-NEXT: movl %edi, {{[0-9]+}}(%esp)
-; i686-NEXT: movl 12(%ebp), %edi
-; i686-NEXT: movl %edi, {{[0-9]+}}(%esp)
-; i686-NEXT: movl 8(%ebp), %edi
-; i686-NEXT: movl %edi, {{[0-9]+}}(%esp)
-; i686-NEXT: movl 20(%ebp), %edi
-; i686-NEXT: movl %edi, {{[0-9]+}}(%esp)
-; i686-NEXT: sarl $31, %edi
-; i686-NEXT: movl %edi, {{[0-9]+}}(%esp)
-; i686-NEXT: movl %edi, {{[0-9]+}}(%esp)
-; i686-NEXT: movl %edi, {{[0-9]+}}(%esp)
-; i686-NEXT: movl %edi, {{[0-9]+}}(%esp)
-; i686-NEXT: movl 36(%ebp), %edi
+; i686-NEXT: movl 24(%ebp), %ecx
+; i686-NEXT: movl 28(%ebp), %esi
+; i686-NEXT: movl 32(%ebp), %edi
+; i686-NEXT: movl 36(%ebp), %eax
+; i686-NEXT: movl 16(%ebp), %ebx
+; i686-NEXT: movl %ebx, {{[0-9]+}}(%esp)
+; i686-NEXT: movl 12(%ebp), %ebx
+; i686-NEXT: movl %ebx, {{[0-9]+}}(%esp)
+; i686-NEXT: movl 8(%ebp), %ebx
+; i686-NEXT: movl %ebx, {{[0-9]+}}(%esp)
+; i686-NEXT: movl 20(%ebp), %ebx
+; i686-NEXT: movl %ebx, {{[0-9]+}}(%esp)
+; i686-NEXT: sarl $31, %ebx
+; i686-NEXT: movl %ebx, {{[0-9]+}}(%esp)
+; i686-NEXT: movl %ebx, {{[0-9]+}}(%esp)
+; i686-NEXT: movl %ebx, {{[0-9]+}}(%esp)
+; i686-NEXT: movl %ebx, {{[0-9]+}}(%esp)
+; i686-NEXT: movl %eax, {{[0-9]+}}(%esp)
; i686-NEXT: movl %edi, {{[0-9]+}}(%esp)
; i686-NEXT: movl %esi, {{[0-9]+}}(%esp)
; i686-NEXT: movl %ecx, {{[0-9]+}}(%esp)
+; i686-NEXT: sarl $31, %eax
+; i686-NEXT: movl %eax, {{[0-9]+}}(%esp)
+; i686-NEXT: movl %eax, {{[0-9]+}}(%esp)
+; i686-NEXT: movl %eax, {{[0-9]+}}(%esp)
; i686-NEXT: movl %eax, {{[0-9]+}}(%esp)
-; i686-NEXT: sarl $31, %edi
-; i686-NEXT: movl %edi, {{[0-9]+}}(%esp)
-; i686-NEXT: movl %edi, {{[0-9]+}}(%esp)
-; i686-NEXT: movl %edi, {{[0-9]+}}(%esp)
-; i686-NEXT: movl %edi, {{[0-9]+}}(%esp)
; i686-NEXT: movl %edx, %eax
; i686-NEXT: andl $31, %eax
; i686-NEXT: shrl $3, %edx
; i686-NEXT: andl $12, %edx
; i686-NEXT: movl 40(%esp,%edx), %esi
+; i686-NEXT: movl 32(%esp,%edx), %ecx
+; i686-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; i686-NEXT: movl 36(%esp,%edx), %edi
; i686-NEXT: movl %edi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; i686-NEXT: movl %eax, %ecx
; i686-NEXT: shrdl %cl, %esi, %edi
; i686-NEXT: movl %edi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
-; i686-NEXT: movl 32(%esp,%edx), %ecx
-; i686-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; i686-NEXT: movl 44(%esp,%edx), %edx
; i686-NEXT: movl %edx, (%esp) # 4-byte Spill
-; i686-NEXT: movl %eax, %ecx
; i686-NEXT: shrdl %cl, %edx, %esi
; i686-NEXT: movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; i686-NEXT: movl 56(%ebp), %edx
@@ -458,32 +459,32 @@ define void @test_ashr_v2i128(<2 x i128> %x, <2 x i128> %a, ptr nocapture %r) no
; i686-NEXT: andl $31, %ebx
; i686-NEXT: shrl $3, %edx
; i686-NEXT: andl $12, %edx
-; i686-NEXT: movl 72(%esp,%edx), %esi
-; i686-NEXT: movl 68(%esp,%edx), %edi
-; i686-NEXT: movl %edi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
+; i686-NEXT: movl 72(%esp,%edx), %edi
+; i686-NEXT: movl 68(%esp,%edx), %esi
+; i686-NEXT: movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; i686-NEXT: movl %ebx, %ecx
-; i686-NEXT: shrdl %cl, %esi, %edi
-; i686-NEXT: movl %edi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
+; i686-NEXT: shrdl %cl, %edi, %esi
+; i686-NEXT: movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; i686-NEXT: movl 64(%esp,%edx), %ecx
; i686-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; i686-NEXT: movl 76(%esp,%edx), %edx
; i686-NEXT: movl %ebx, %ecx
-; i686-NEXT: shrdl %cl, %edx, %esi
+; i686-NEXT: shrdl %cl, %edx, %edi
; i686-NEXT: movl %eax, %ecx
-; i686-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload
-; i686-NEXT: shrdl %cl, %edi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
+; i686-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload
+; i686-NEXT: shrdl %cl, %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
; i686-NEXT: sarl %cl, (%esp) # 4-byte Folded Spill
; i686-NEXT: movl %ebx, %ecx
-; i686-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload
+; i686-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %esi # 4-byte Reload
; i686-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
-; i686-NEXT: shrdl %cl, %eax, %edi
+; i686-NEXT: shrdl %cl, %eax, %esi
; i686-NEXT: sarl %cl, %edx
; i686-NEXT: movl 72(%ebp), %eax
; i686-NEXT: movl %edx, 28(%eax)
-; i686-NEXT: movl %esi, 24(%eax)
+; i686-NEXT: movl %edi, 24(%eax)
; i686-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
; i686-NEXT: movl %ecx, 20(%eax)
-; i686-NEXT: movl %edi, 16(%eax)
+; i686-NEXT: movl %esi, 16(%eax)
; i686-NEXT: movl (%esp), %ecx # 4-byte Reload
; i686-NEXT: movl %ecx, 12(%eax)
; i686-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
@@ -542,24 +543,24 @@ define void @test_shl_v2i128(<2 x i128> %x, <2 x i128> %a, ptr nocapture %r) nou
; i686-NEXT: pushl %esi
; i686-NEXT: andl $-16, %esp
; i686-NEXT: subl $128, %esp
-; i686-NEXT: movl 40(%ebp), %edi
+; i686-NEXT: movl 40(%ebp), %ecx
; i686-NEXT: movl 24(%ebp), %eax
-; i686-NEXT: movl 28(%ebp), %ecx
+; i686-NEXT: movl 28(%ebp), %ebx
; i686-NEXT: movl 32(%ebp), %edx
-; i686-NEXT: movl 20(%ebp), %esi
-; i686-NEXT: movl %esi, {{[0-9]+}}(%esp)
-; i686-NEXT: movl 16(%ebp), %esi
-; i686-NEXT: movl %esi, {{[0-9]+}}(%esp)
-; i686-NEXT: movl 12(%ebp), %esi
-; i686-NEXT: movl %esi, {{[0-9]+}}(%esp)
-; i686-NEXT: movl 8(%ebp), %esi
-; i686-NEXT: movl %esi, {{[0-9]+}}(%esp)
; i686-NEXT: movl 36(%ebp), %esi
+; i686-NEXT: movl 20(%ebp), %edi
+; i686-NEXT: movl %edi, {{[0-9]+}}(%esp)
+; i686-NEXT: movl 16(%ebp), %edi
+; i686-NEXT: movl %edi, {{[0-9]+}}(%esp)
+; i686-NEXT: movl 12(%ebp), %edi
+; i686-NEXT: movl %edi, {{[0-9]+}}(%esp)
+; i686-NEXT: movl 8(%ebp), %edi
+; i686-NEXT: movl %edi, {{[0-9]+}}(%esp)
; i686-NEXT: movl %esi, {{[0-9]+}}(%esp)
; i686-NEXT: movl %edx, {{[0-9]+}}(%esp)
-; i686-NEXT: movl %ecx, {{[0-9]+}}(%esp)
+; i686-NEXT: movl %ebx, {{[0-9]+}}(%esp)
; i686-NEXT: movl %eax, {{[0-9]+}}(%esp)
-; i686-NEXT: movl %edi, %ebx
+; i686-NEXT: movl %ecx, %ebx
; i686-NEXT: shrl $3, %ebx
; i686-NEXT: andl $12, %ebx
; i686-NEXT: leal {{[0-9]+}}(%esp), %eax
@@ -573,7 +574,6 @@ define void @test_shl_v2i128(<2 x i128> %x, <2 x i128> %a, ptr nocapture %r) nou
; i686-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; i686-NEXT: movl 8(%eax), %eax
; i686-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
-; i686-NEXT: movl %edi, %ecx
; i686-NEXT: andl $31, %ecx
; i686-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; i686-NEXT: # kill: def $cl killed $cl killed $ecx
@@ -948,33 +948,31 @@ define i128 @shift_i128_limited_shamt(i128 noundef %a, i32 noundef %b) nounwind
; i686-NEXT: pushl %esi
; i686-NEXT: andl $-16, %esp
; i686-NEXT: subl $16, %esp
-; i686-NEXT: movl 32(%ebp), %ebx
-; i686-NEXT: movl 28(%ebp), %edi
+; i686-NEXT: movl 32(%ebp), %esi
+; i686-NEXT: movl 28(%ebp), %eax
+; i686-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
; i686-NEXT: movzbl 40(%ebp), %ecx
; i686-NEXT: movb $6, %dl
; i686-NEXT: subb %cl, %dl
; i686-NEXT: addb $-7, %cl
-; i686-NEXT: movl %edi, %eax
; i686-NEXT: shrl %eax
; i686-NEXT: shrl %cl, %eax
; i686-NEXT: movl %edx, %ecx
-; i686-NEXT: shll %cl, %ebx
-; i686-NEXT: orl %eax, %ebx
-; i686-NEXT: movl 24(%ebp), %esi
-; i686-NEXT: movl %esi, %eax
-; i686-NEXT: shll %cl, %eax
-; i686-NEXT: shldl %cl, %esi, %edi
-; i686-NEXT: movl %edi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
-; i686-NEXT: movl 8(%ebp), %edi
-; i686-NEXT: movl 36(%ebp), %esi
+; i686-NEXT: shll %cl, %esi
+; i686-NEXT: orl %eax, %esi
+; i686-NEXT: movl 24(%ebp), %edi
+; i686-NEXT: shll %cl, %edi
+; i686-NEXT: movl 8(%ebp), %eax
+; i686-NEXT: movl 24(%ebp), %ebx
+; i686-NEXT: shldl %cl, %ebx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Folded Spill
+; i686-NEXT: movl 36(%ebp), %ebx
; i686-NEXT: movl 32(%ebp), %edx
-; i686-NEXT: shldl %cl, %edx, %esi
-; i686-NEXT: movl %esi, 12(%edi)
-; i686-NEXT: movl %ebx, 8(%edi)
+; i686-NEXT: shldl %cl, %edx, %ebx
+; i686-NEXT: movl %ebx, 12(%eax)
+; i686-NEXT: movl %esi, 8(%eax)
; i686-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
-; i686-NEXT: movl %ecx, 4(%edi)
-; i686-NEXT: movl %eax, (%edi)
-; i686-NEXT: movl %edi, %eax
+; i686-NEXT: movl %ecx, 4(%eax)
+; i686-NEXT: movl %edi, (%eax)
; i686-NEXT: leal -12(%ebp), %esp
; i686-NEXT: popl %esi
; i686-NEXT: popl %edi
@@ -1007,7 +1005,7 @@ define i128 @shift_i128_limited_shamt_no_nuw(i128 noundef %a, i32 noundef %b) no
; i686-NEXT: pushl %edi
; i686-NEXT: pushl %esi
; i686-NEXT: andl $-16, %esp
-; i686-NEXT: subl $48, %esp
+; i686-NEXT: subl $64, %esp
; i686-NEXT: movzbl 40(%ebp), %eax
; i686-NEXT: movl 24(%ebp), %ecx
; i686-NEXT: movl 28(%ebp), %edx
@@ -1027,23 +1025,25 @@ define i128 @shift_i128_limited_shamt_no_nuw(i128 noundef %a, i32 noundef %b) no
; i686-NEXT: movl $0, {{[0-9]+}}(%esp)
; i686-NEXT: movl $0, {{[0-9]+}}(%esp)
; i686-NEXT: movl $0, {{[0-9]+}}(%esp)
-; i686-NEXT: movl $0, (%esp)
-; i686-NEXT: movl 20(%esp,%eax), %edx
-; i686-NEXT: movl 24(%esp,%eax), %ebx
+; i686-NEXT: movl $0, {{[0-9]+}}(%esp)
+; i686-NEXT: movl 32(%esp,%eax), %edx
+; i686-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
+; i686-NEXT: movl 36(%esp,%eax), %esi
+; i686-NEXT: movl 40(%esp,%eax), %ebx
; i686-NEXT: movl %ebx, %edi
-; i686-NEXT: shldl %cl, %edx, %edi
-; i686-NEXT: movl 16(%esp,%eax), %esi
-; i686-NEXT: movl 28(%esp,%eax), %eax
+; i686-NEXT: shldl %cl, %esi, %edi
+; i686-NEXT: movl 44(%esp,%eax), %eax
+; i686-NEXT: movl 8(%ebp), %edx
; i686-NEXT: shldl %cl, %ebx, %eax
-; i686-NEXT: movl 8(%ebp), %ebx
-; i686-NEXT: movl %eax, 12(%ebx)
-; i686-NEXT: movl %edi, 8(%ebx)
-; i686-NEXT: movl %esi, %eax
+; i686-NEXT: movl %eax, 12(%edx)
+; i686-NEXT: movl %edi, 8(%edx)
+; i686-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload
+; i686-NEXT: movl %edi, %eax
; i686-NEXT: shll %cl, %eax
-; i686-NEXT: shldl %cl, %esi, %edx
-; i686-NEXT: movl %edx, 4(%ebx)
-; i686-NEXT: movl %eax, (%ebx)
-; i686-NEXT: movl %ebx, %eax
+; i686-NEXT: shldl %cl, %edi, %esi
+; i686-NEXT: movl %esi, 4(%edx)
+; i686-NEXT: movl %eax, (%edx)
+; i686-NEXT: movl %edx, %eax
; i686-NEXT: leal -12(%ebp), %esp
; i686-NEXT: popl %esi
; i686-NEXT: popl %edi
@@ -1079,7 +1079,7 @@ define i128 @shift_i128_limited_shamt_unknown_lhs(i128 noundef %a, i32 noundef %
; i686-NEXT: pushl %edi
; i686-NEXT: pushl %esi
; i686-NEXT: andl $-16, %esp
-; i686-NEXT: subl $48, %esp
+; i686-NEXT: subl $64, %esp
; i686-NEXT: movl 24(%ebp), %eax
; i686-NEXT: movl 28(%ebp), %edx
; i686-NEXT: movl 32(%ebp), %esi
@@ -1093,29 +1093,31 @@ define i128 @shift_i128_limited_shamt_unknown_lhs(i128 noundef %a, i32 noundef %
; i686-NEXT: movl $0, {{[0-9]+}}(%esp)
; i686-NEXT: movl $0, {{[0-9]+}}(%esp)
; i686-NEXT: movl $0, {{[0-9]+}}(%esp)
-; i686-NEXT: movl $0, (%esp)
+; i686-NEXT: movl $0, {{[0-9]+}}(%esp)
; i686-NEXT: movl %ecx, %eax
; i686-NEXT: shrb $3, %al
; i686-NEXT: andb $12, %al
; i686-NEXT: negb %al
; i686-NEXT: movsbl %al, %eax
-; i686-NEXT: movl 20(%esp,%eax), %edx
-; i686-NEXT: movl 24(%esp,%eax), %ebx
+; i686-NEXT: movl 32(%esp,%eax), %edx
+; i686-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
+; i686-NEXT: movl 36(%esp,%eax), %esi
+; i686-NEXT: movl 40(%esp,%eax), %ebx
; i686-NEXT: movl %ebx, %edi
-; i686-NEXT: shldl %cl, %edx, %edi
-; i686-NEXT: movl 16(%esp,%eax), %esi
-; i686-NEXT: movl 28(%esp,%eax), %eax
+; i686-NEXT: shldl %cl, %esi, %edi
+; i686-NEXT: movl 44(%esp,%eax), %eax
+; i686-NEXT: movl 8(%ebp), %edx
; i686-NEXT: shldl %cl, %ebx, %eax
-; i686-NEXT: movl 8(%ebp), %ebx
-; i686-NEXT: movl %eax, 12(%ebx)
-; i686-NEXT: movl %edi, 8(%ebx)
-; i686-NEXT: movl %esi, %eax
+; i686-NEXT: movl %eax, 12(%edx)
+; i686-NEXT: movl %edi, 8(%edx)
+; i686-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edi # 4-byte Reload
+; i686-NEXT: movl %edi, %eax
; i686-NEXT: shll %cl, %eax
; i686-NEXT: # kill: def $cl killed $cl killed $ecx
-; i686-NEXT: shldl %cl, %esi, %edx
-; i686-NEXT: movl %edx, 4(%ebx)
-; i686-NEXT: movl %eax, (%ebx)
-; i686-NEXT: movl %ebx, %eax
+; i686-NEXT: shldl %cl, %edi, %esi
+; i686-NEXT: movl %esi, 4(%edx)
+; i686-NEXT: movl %eax, (%edx)
+; i686-NEXT: movl %edx, %eax
; i686-NEXT: leal -12(%ebp), %esp
; i686-NEXT: popl %esi
; i686-NEXT: popl %edi
diff --git a/llvm/test/CodeGen/X86/shift-i256.ll b/llvm/test/CodeGen/X86/shift-i256.ll
index 128e2199fb56f..d2d396f17436a 100644
--- a/llvm/test/CodeGen/X86/shift-i256.ll
+++ b/llvm/test/CodeGen/X86/shift-i256.ll
@@ -18,16 +18,16 @@ define void @shift1(i256 %x, i256 %a, ptr nocapture %r) nounwind readnone {
; CHECK-NEXT: movl 8(%ebp), %eax
; CHECK-NEXT: movl 12(%ebp), %edx
; CHECK-NEXT: movl 16(%ebp), %esi
+; CHECK-NEXT: movl 20(%ebp), %ebx
; CHECK-NEXT: movl 32(%ebp), %edi
; CHECK-NEXT: movl %edi, {{[0-9]+}}(%esp)
; CHECK-NEXT: movl 28(%ebp), %edi
; CHECK-NEXT: movl %edi, {{[0-9]+}}(%esp)
; CHECK-NEXT: movl 24(%ebp), %edi
; CHECK-NEXT: movl %edi, {{[0-9]+}}(%esp)
-; CHECK-NEXT: movl 20(%ebp), %edi
-; CHECK-NEXT: movl %edi, {{[0-9]+}}(%esp)
; CHECK-NEXT: movl 36(%ebp), %edi
; CHECK-NEXT: movl %edi, {{[0-9]+}}(%esp)
+; CHECK-NEXT: movl %ebx, {{[0-9]+}}(%esp)
; CHECK-NEXT: movl %esi, {{[0-9]+}}(%esp)
; CHECK-NEXT: movl %edx, {{[0-9]+}}(%esp)
; CHECK-NEXT: movl %eax, {{[0-9]+}}(%esp)
diff --git a/llvm/test/CodeGen/X86/smax.ll b/llvm/test/CodeGen/X86/smax.ll
index 509d4443e930a..e7b4179db99f1 100644
--- a/llvm/test/CodeGen/X86/smax.ll
+++ b/llvm/test/CodeGen/X86/smax.ll
@@ -722,29 +722,32 @@ define i128 @test_signbits_i128(i128 %a, i128 %b) nounwind {
; X86: # %bb.0:
; X86-NEXT: pushl %ebp
; X86-NEXT: movl %esp, %ebp
+; X86-NEXT: pushl %ebx
; X86-NEXT: pushl %edi
; X86-NEXT: pushl %esi
; X86-NEXT: andl $-16, %esp
+; X86-NEXT: subl $16, %esp
+; X86-NEXT: movl 8(%ebp), %eax
; X86-NEXT: movl 32(%ebp), %esi
-; X86-NEXT: movl 36(%ebp), %eax
+; X86-NEXT: movl 36(%ebp), %edx
; X86-NEXT: movl 48(%ebp), %ecx
-; X86-NEXT: movl 52(%ebp), %edx
-; X86-NEXT: shrdl $28, %edx, %ecx
-; X86-NEXT: sarl $28, %edx
+; X86-NEXT: movl 52(%ebp), %edi
+; X86-NEXT: shrdl $28, %edi, %ecx
+; X86-NEXT: sarl $28, %edi
; X86-NEXT: cmpl %esi, %ecx
-; X86-NEXT: movl %edx, %edi
-; X86-NEXT: sbbl %eax, %edi
+; X86-NEXT: movl %edi, %ebx
+; X86-NEXT: sbbl %edx, %ebx
; X86-NEXT: cmovll %esi, %ecx
-; X86-NEXT: cmovll %eax, %edx
-; X86-NEXT: movl 8(%ebp), %eax
-; X86-NEXT: movl %edx, 4(%eax)
+; X86-NEXT: cmovll %edx, %edi
+; X86-NEXT: movl %edi, 4(%eax)
+; X86-NEXT: sarl $31, %edi
; X86-NEXT: movl %ecx, (%eax)
-; X86-NEXT: sarl $31, %edx
-; X86-NEXT: movl %edx, 12(%eax)
-; X86-NEXT: movl %edx, 8(%eax)
-; X86-NEXT: leal -8(%ebp), %esp
+; X86-NEXT: movl %edi, 12(%eax)
+; X86-NEXT: movl %edi, 8(%eax)
+; X86-NEXT: leal -12(%ebp), %esp
; X86-NEXT: popl %esi
; X86-NEXT: popl %edi
+; X86-NEXT: popl %ebx
; X86-NEXT: popl %ebp
; X86-NEXT: retl $4
%ax = ashr i128 %a, 64
diff --git a/llvm/test/CodeGen/X86/smin.ll b/llvm/test/CodeGen/X86/smin.ll
index 5e9fe27b41d2c..ae87bfaa404d4 100644
--- a/llvm/test/CodeGen/X86/smin.ll
+++ b/llvm/test/CodeGen/X86/smin.ll
@@ -157,27 +157,27 @@ define i128 @test_i128(i128 %a, i128 %b) nounwind {
; X86-NEXT: pushl %esi
; X86-NEXT: andl $-16, %esp
; X86-NEXT: subl $16, %esp
-; X86-NEXT: movl 40(%ebp), %ecx
-; X86-NEXT: movl 44(%ebp), %edx
-; X86-NEXT: movl 28(%ebp), %esi
-; X86-NEXT: cmpl %ecx, 24(%ebp)
-; X86-NEXT: sbbl %edx, %esi
-; X86-NEXT: movl 48(%ebp), %esi
-; X86-NEXT: movl 32(%ebp), %ebx
+; X86-NEXT: movl 48(%ebp), %ecx
+; X86-NEXT: movl 40(%ebp), %edx
+; X86-NEXT: movl 44(%ebp), %esi
+; X86-NEXT: movl 28(%ebp), %ebx
+; X86-NEXT: cmpl %edx, 24(%ebp)
; X86-NEXT: sbbl %esi, %ebx
+; X86-NEXT: movl 32(%ebp), %ebx
+; X86-NEXT: sbbl %ecx, %ebx
; X86-NEXT: movl 52(%ebp), %ebx
; X86-NEXT: movl 36(%ebp), %edi
; X86-NEXT: movl %edi, %eax
; X86-NEXT: sbbl %ebx, %eax
-; X86-NEXT: cmovll 24(%ebp), %ecx
-; X86-NEXT: cmovll 28(%ebp), %edx
-; X86-NEXT: cmovll 32(%ebp), %esi
+; X86-NEXT: cmovll 24(%ebp), %edx
+; X86-NEXT: cmovll 28(%ebp), %esi
+; X86-NEXT: cmovll 32(%ebp), %ecx
; X86-NEXT: cmovll %edi, %ebx
; X86-NEXT: movl 8(%ebp), %eax
; X86-NEXT: movl %ebx, 12(%eax)
-; X86-NEXT: movl %esi, 8(%eax)
-; X86-NEXT: movl %edx, 4(%eax)
-; X86-NEXT: movl %ecx, (%eax)
+; X86-NEXT: movl %ecx, 8(%eax)
+; X86-NEXT: movl %esi, 4(%eax)
+; X86-NEXT: movl %edx, (%eax)
; X86-NEXT: leal -12(%ebp), %esp
; X86-NEXT: popl %esi
; X86-NEXT: popl %edi
@@ -722,29 +722,32 @@ define i128 @test_signbits_i128(i128 %a, i128 %b) nounwind {
; X86: # %bb.0:
; X86-NEXT: pushl %ebp
; X86-NEXT: movl %esp, %ebp
+; X86-NEXT: pushl %ebx
; X86-NEXT: pushl %edi
; X86-NEXT: pushl %esi
; X86-NEXT: andl $-16, %esp
+; X86-NEXT: subl $16, %esp
+; X86-NEXT: movl 8(%ebp), %eax
; X86-NEXT: movl 32(%ebp), %esi
-; X86-NEXT: movl 36(%ebp), %eax
+; X86-NEXT: movl 36(%ebp), %edx
; X86-NEXT: movl 48(%ebp), %ecx
-; X86-NEXT: movl 52(%ebp), %edx
-; X86-NEXT: shrdl $28, %edx, %ecx
-; X86-NEXT: sarl $28, %edx
+; X86-NEXT: movl 52(%ebp), %edi
+; X86-NEXT: shrdl $28, %edi, %ecx
+; X86-NEXT: sarl $28, %edi
; X86-NEXT: cmpl %ecx, %esi
-; X86-NEXT: movl %eax, %edi
-; X86-NEXT: sbbl %edx, %edi
+; X86-NEXT: movl %edx, %ebx
+; X86-NEXT: sbbl %edi, %ebx
; X86-NEXT: cmovll %esi, %ecx
-; X86-NEXT: cmovll %eax, %edx
-; X86-NEXT: movl 8(%ebp), %eax
-; X86-NEXT: movl %edx, 4(%eax)
+; X86-NEXT: cmovll %edx, %edi
+; X86-NEXT: movl %edi, 4(%eax)
+; X86-NEXT: sarl $31, %edi
; X86-NEXT: movl %ecx, (%eax)
-; X86-NEXT: sarl $31, %edx
-; X86-NEXT: movl %edx, 12(%eax)
-; X86-NEXT: movl %edx, 8(%eax)
-; X86-NEXT: leal -8(%ebp), %esp
+; X86-NEXT: movl %edi, 12(%eax)
+; X86-NEXT: movl %edi, 8(%eax)
+; X86-NEXT: leal -12(%ebp), %esp
; X86-NEXT: popl %esi
; X86-NEXT: popl %edi
+; X86-NEXT: popl %ebx
; X86-NEXT: popl %ebp
; X86-NEXT: retl $4
%ax = ashr i128 %a, 64
diff --git a/llvm/test/CodeGen/X86/statepoint-invoke-ra-enter-at-end.mir b/llvm/test/CodeGen/X86/statepoint-invoke-ra-enter-at-end.mir
index 29c22bb8d3fd1..d27e1eb555448 100644
--- a/llvm/test/CodeGen/X86/statepoint-invoke-ra-enter-at-end.mir
+++ b/llvm/test/CodeGen/X86/statepoint-invoke-ra-enter-at-end.mir
@@ -344,7 +344,7 @@ body: |
; CHECK-NEXT: CMP64rr [[MOV64rm4]], [[COPY7]], implicit-def $eflags
; CHECK-NEXT: undef [[MOV32ri1:%[0-9]+]].sub_32bit:gr64_with_sub_8bit = MOV32ri 0
; CHECK-NEXT: [[MOV64rm4:%[0-9]+]]:gr64 = CMOV64rr [[MOV64rm4]], [[MOV32ri1]], 4, implicit killed $eflags
- ; CHECK-NEXT: INLINEASM &"lock btsq $0,($1)", 1 /* sideeffect attdialect */, 4784137 /* reguse:GR64 */, [[MOV32ri1]], 4784137 /* reguse:GR64 */, undef %56:gr64, 12 /* clobber */, implicit-def dead early-clobber $df, 12 /* clobber */, implicit-def early-clobber $fpsw, 12 /* clobber */, implicit-def dead early-clobber $eflags
+ ; CHECK-NEXT: INLINEASM &"lock btsq $0,($1)", 1 /* sideeffect attdialect */, 4390921 /* reguse:GR64 */, [[MOV32ri1]], 4390921 /* reguse:GR64 */, undef %56:gr64, 12 /* clobber */, implicit-def dead early-clobber $df, 12 /* clobber */, implicit-def early-clobber $fpsw, 12 /* clobber */, implicit-def dead early-clobber $eflags
; CHECK-NEXT: LCMPXCHG32 undef %67:gr64, 1, $noreg, 0, $noreg, [[COPY6]], implicit-def dead $eax, implicit-def dead $eflags, implicit undef $eax :: (load store acquire monotonic (s32) on `ptr addrspace(1) undef`, addrspace 1)
; CHECK-NEXT: ADJCALLSTACKDOWN64 0, 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp
; CHECK-NEXT: $rdi = COPY [[COPY5]]
@@ -464,7 +464,7 @@ body: |
%63:gr64 = NOT64r %63
CMP64rr %63, %31, implicit-def $eflags
%63:gr64 = CMOV64rr %63, %53, 4, implicit killed $eflags
- INLINEASM &"lock btsq $0,($1)", 1 /* sideeffect attdialect */, 4784137 /* reguse:GR64 */, %53, 4784137 /* reguse:GR64 */, undef %56:gr64, 12 /* clobber */, implicit-def dead early-clobber $df, 12 /* clobber */, implicit-def early-clobber $fpsw, 12 /* clobber */, implicit-def dead early-clobber $eflags
+ INLINEASM &"lock btsq $0,($1)", 1 /* sideeffect attdialect */, 4390921 /* reguse:GR64 */, %53, 4390921 /* reguse:GR64 */, undef %56:gr64, 12 /* clobber */, implicit-def dead early-clobber $df, 12 /* clobber */, implicit-def early-clobber $fpsw, 12 /* clobber */, implicit-def dead early-clobber $eflags
LCMPXCHG32 undef %67:gr64, 1, $noreg, 0, $noreg, %65, implicit-def dead $eax, implicit-def dead $eflags, implicit undef $eax :: (load store acquire monotonic (s32) on `ptr addrspace(1) undef`, addrspace 1)
ADJCALLSTACKDOWN64 0, 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp
$rdi = COPY %64
diff --git a/llvm/test/CodeGen/X86/ucmp.ll b/llvm/test/CodeGen/X86/ucmp.ll
index 7f17299b39e33..05565a768aab4 100644
--- a/llvm/test/CodeGen/X86/ucmp.ll
+++ b/llvm/test/CodeGen/X86/ucmp.ll
@@ -113,25 +113,25 @@ define i8 @ucmp.8.128(i128 %x, i128 %y) nounwind {
; X86-NEXT: pushl %esi
; X86-NEXT: andl $-16, %esp
; X86-NEXT: subl $16, %esp
+; X86-NEXT: movl 16(%ebp), %esi
; X86-NEXT: movl 8(%ebp), %eax
; X86-NEXT: movl 12(%ebp), %edx
; X86-NEXT: movl 28(%ebp), %ecx
; X86-NEXT: cmpl %eax, 24(%ebp)
; X86-NEXT: movl %ecx, %eax
; X86-NEXT: sbbl %edx, %eax
-; X86-NEXT: movl 16(%ebp), %ebx
; X86-NEXT: movl 32(%ebp), %eax
-; X86-NEXT: sbbl %ebx, %eax
+; X86-NEXT: sbbl %esi, %eax
; X86-NEXT: movl 20(%ebp), %ecx
-; X86-NEXT: movl 36(%ebp), %esi
-; X86-NEXT: movl %esi, %eax
+; X86-NEXT: movl 36(%ebp), %edi
+; X86-NEXT: movl %edi, %eax
; X86-NEXT: sbbl %ecx, %eax
; X86-NEXT: setb %al
-; X86-NEXT: movl 8(%ebp), %edi
-; X86-NEXT: cmpl 24(%ebp), %edi
+; X86-NEXT: movl 8(%ebp), %ebx
+; X86-NEXT: cmpl 24(%ebp), %ebx
; X86-NEXT: sbbl 28(%ebp), %edx
-; X86-NEXT: sbbl 32(%ebp), %ebx
-; X86-NEXT: sbbl %esi, %ecx
+; X86-NEXT: sbbl 32(%ebp), %esi
+; X86-NEXT: sbbl %edi, %ecx
; X86-NEXT: sbbb $0, %al
; X86-NEXT: leal -12(%ebp), %esp
; X86-NEXT: popl %esi
diff --git a/llvm/test/CodeGen/X86/umax.ll b/llvm/test/CodeGen/X86/umax.ll
index 7ef859978cdbf..9bd31389feb5e 100644
--- a/llvm/test/CodeGen/X86/umax.ll
+++ b/llvm/test/CodeGen/X86/umax.ll
@@ -1320,29 +1320,32 @@ define i128 @test_signbits_i128(i128 %a, i128 %b) nounwind {
; X86: # %bb.0:
; X86-NEXT: pushl %ebp
; X86-NEXT: movl %esp, %ebp
+; X86-NEXT: pushl %ebx
; X86-NEXT: pushl %edi
; X86-NEXT: pushl %esi
; X86-NEXT: andl $-16, %esp
+; X86-NEXT: subl $16, %esp
+; X86-NEXT: movl 8(%ebp), %eax
; X86-NEXT: movl 32(%ebp), %esi
-; X86-NEXT: movl 36(%ebp), %eax
+; X86-NEXT: movl 36(%ebp), %edx
; X86-NEXT: movl 48(%ebp), %ecx
-; X86-NEXT: movl 52(%ebp), %edx
-; X86-NEXT: shrdl $28, %edx, %ecx
-; X86-NEXT: sarl $28, %edx
+; X86-NEXT: movl 52(%ebp), %edi
+; X86-NEXT: shrdl $28, %edi, %ecx
+; X86-NEXT: sarl $28, %edi
; X86-NEXT: cmpl %esi, %ecx
-; X86-NEXT: movl %edx, %edi
-; X86-NEXT: sbbl %eax, %edi
+; X86-NEXT: movl %edi, %ebx
+; X86-NEXT: sbbl %edx, %ebx
; X86-NEXT: cmovbl %esi, %ecx
-; X86-NEXT: cmovbl %eax, %edx
-; X86-NEXT: movl 8(%ebp), %eax
-; X86-NEXT: movl %edx, 4(%eax)
+; X86-NEXT: cmovbl %edx, %edi
+; X86-NEXT: movl %edi, 4(%eax)
+; X86-NEXT: sarl $31, %edi
; X86-NEXT: movl %ecx, (%eax)
-; X86-NEXT: sarl $31, %edx
-; X86-NEXT: movl %edx, 12(%eax)
-; X86-NEXT: movl %edx, 8(%eax)
-; X86-NEXT: leal -8(%ebp), %esp
+; X86-NEXT: movl %edi, 12(%eax)
+; X86-NEXT: movl %edi, 8(%eax)
+; X86-NEXT: leal -12(%ebp), %esp
; X86-NEXT: popl %esi
; X86-NEXT: popl %edi
+; X86-NEXT: popl %ebx
; X86-NEXT: popl %ebp
; X86-NEXT: retl $4
%ax = ashr i128 %a, 64
diff --git a/llvm/test/CodeGen/X86/umin.ll b/llvm/test/CodeGen/X86/umin.ll
index c927abf3a4263..60a494ef1bf6a 100644
--- a/llvm/test/CodeGen/X86/umin.ll
+++ b/llvm/test/CodeGen/X86/umin.ll
@@ -153,27 +153,27 @@ define i128 @test_i128(i128 %a, i128 %b) nounwind {
; X86-NEXT: pushl %esi
; X86-NEXT: andl $-16, %esp
; X86-NEXT: subl $16, %esp
-; X86-NEXT: movl 40(%ebp), %ecx
-; X86-NEXT: movl 44(%ebp), %edx
-; X86-NEXT: movl 28(%ebp), %esi
-; X86-NEXT: cmpl %ecx, 24(%ebp)
-; X86-NEXT: sbbl %edx, %esi
-; X86-NEXT: movl 48(%ebp), %esi
-; X86-NEXT: movl 32(%ebp), %ebx
+; X86-NEXT: movl 48(%ebp), %ecx
+; X86-NEXT: movl 40(%ebp), %edx
+; X86-NEXT: movl 44(%ebp), %esi
+; X86-NEXT: movl 28(%ebp), %ebx
+; X86-NEXT: cmpl %edx, 24(%ebp)
; X86-NEXT: sbbl %esi, %ebx
+; X86-NEXT: movl 32(%ebp), %ebx
+; X86-NEXT: sbbl %ecx, %ebx
; X86-NEXT: movl 52(%ebp), %ebx
; X86-NEXT: movl 36(%ebp), %edi
; X86-NEXT: movl %edi, %eax
; X86-NEXT: sbbl %ebx, %eax
-; X86-NEXT: cmovbl 24(%ebp), %ecx
-; X86-NEXT: cmovbl 28(%ebp), %edx
-; X86-NEXT: cmovbl 32(%ebp), %esi
+; X86-NEXT: cmovbl 24(%ebp), %edx
+; X86-NEXT: cmovbl 28(%ebp), %esi
+; X86-NEXT: cmovbl 32(%ebp), %ecx
; X86-NEXT: cmovbl %edi, %ebx
; X86-NEXT: movl 8(%ebp), %eax
; X86-NEXT: movl %ebx, 12(%eax)
-; X86-NEXT: movl %esi, 8(%eax)
-; X86-NEXT: movl %edx, 4(%eax)
-; X86-NEXT: movl %ecx, (%eax)
+; X86-NEXT: movl %ecx, 8(%eax)
+; X86-NEXT: movl %esi, 4(%eax)
+; X86-NEXT: movl %edx, (%eax)
; X86-NEXT: leal -12(%ebp), %esp
; X86-NEXT: popl %esi
; X86-NEXT: popl %edi
@@ -731,29 +731,32 @@ define i128 @test_signbits_i128(i128 %a, i128 %b) nounwind {
; X86: # %bb.0:
; X86-NEXT: pushl %ebp
; X86-NEXT: movl %esp, %ebp
+; X86-NEXT: pushl %ebx
; X86-NEXT: pushl %edi
; X86-NEXT: pushl %esi
; X86-NEXT: andl $-16, %esp
+; X86-NEXT: subl $16, %esp
+; X86-NEXT: movl 8(%ebp), %eax
; X86-NEXT: movl 32(%ebp), %esi
-; X86-NEXT: movl 36(%ebp), %eax
+; X86-NEXT: movl 36(%ebp), %edx
; X86-NEXT: movl 48(%ebp), %ecx
-; X86-NEXT: movl 52(%ebp), %edx
-; X86-NEXT: shrdl $28, %edx, %ecx
-; X86-NEXT: sarl $28, %edx
+; X86-NEXT: movl 52(%ebp), %edi
+; X86-NEXT: shrdl $28, %edi, %ecx
+; X86-NEXT: sarl $28, %edi
; X86-NEXT: cmpl %ecx, %esi
-; X86-NEXT: movl %eax, %edi
-; X86-NEXT: sbbl %edx, %edi
+; X86-NEXT: movl %edx, %ebx
+; X86-NEXT: sbbl %edi, %ebx
; X86-NEXT: cmovbl %esi, %ecx
-; X86-NEXT: cmovbl %eax, %edx
-; X86-NEXT: movl 8(%ebp), %eax
-; X86-NEXT: movl %edx, 4(%eax)
+; X86-NEXT: cmovbl %edx, %edi
+; X86-NEXT: movl %edi, 4(%eax)
+; X86-NEXT: sarl $31, %edi
; X86-NEXT: movl %ecx, (%eax)
-; X86-NEXT: sarl $31, %edx
-; X86-NEXT: movl %edx, 12(%eax)
-; X86-NEXT: movl %edx, 8(%eax)
-; X86-NEXT: leal -8(%ebp), %esp
+; X86-NEXT: movl %edi, 12(%eax)
+; X86-NEXT: movl %edi, 8(%eax)
+; X86-NEXT: leal -12(%ebp), %esp
; X86-NEXT: popl %esi
; X86-NEXT: popl %edi
+; X86-NEXT: popl %ebx
; X86-NEXT: popl %ebp
; X86-NEXT: retl $4
%ax = ashr i128 %a, 64
diff --git a/llvm/test/CodeGen/X86/vp2intersect_multiple_pairs.ll b/llvm/test/CodeGen/X86/vp2intersect_multiple_pairs.ll
index 9f2f1d57c2dbc..55acce34a5453 100644
--- a/llvm/test/CodeGen/X86/vp2intersect_multiple_pairs.ll
+++ b/llvm/test/CodeGen/X86/vp2intersect_multiple_pairs.ll
@@ -9,6 +9,7 @@ define void @test(<16 x i32> %a0, <16 x i32> %b0, <16 x i32> %a1, <16 x i32> %b1
; X86: # %bb.0: # %entry
; X86-NEXT: pushl %ebp
; X86-NEXT: movl %esp, %ebp
+; X86-NEXT: pushl %ebx
; X86-NEXT: pushl %edi
; X86-NEXT: pushl %esi
; X86-NEXT: andl $-64, %esp
@@ -46,19 +47,20 @@ define void @test(<16 x i32> %a0, <16 x i32> %b0, <16 x i32> %a1, <16 x i32> %b1
; X86-NEXT: kmovw {{[-0-9]+}}(%e{{[sb]}}p), %k0 # 2-byte Reload
; X86-NEXT: kmovw {{[-0-9]+}}(%e{{[sb]}}p), %k1 # 2-byte Reload
; X86-NEXT: kmovw %k0, %edi
-; X86-NEXT: addl %edi, %eax
-; X86-NEXT: kmovw {{[-0-9]+}}(%e{{[sb]}}p), %k2 # 2-byte Reload
-; X86-NEXT: kmovw {{[-0-9]+}}(%e{{[sb]}}p), %k3 # 2-byte Reload
-; X86-NEXT: kmovw %k2, %edi
+; X86-NEXT: kmovw {{[-0-9]+}}(%e{{[sb]}}p), %k0 # 2-byte Reload
+; X86-NEXT: kmovw {{[-0-9]+}}(%e{{[sb]}}p), %k1 # 2-byte Reload
+; X86-NEXT: kmovw %k0, %ebx
+; X86-NEXT: addl %ebx, %eax
+; X86-NEXT: kmovw %k1, %ebx
; X86-NEXT: addl %edx, %ecx
-; X86-NEXT: kmovw %k1, %edx
-; X86-NEXT: addl %edi, %edx
-; X86-NEXT: addl %edx, %eax
+; X86-NEXT: addl %ebx, %eax
+; X86-NEXT: addl %edi, %eax
; X86-NEXT: addl %ecx, %eax
; X86-NEXT: movw %ax, (%esi)
-; X86-NEXT: leal -8(%ebp), %esp
+; X86-NEXT: leal -12(%ebp), %esp
; X86-NEXT: popl %esi
; X86-NEXT: popl %edi
+; X86-NEXT: popl %ebx
; X86-NEXT: popl %ebp
; X86-NEXT: retl
;
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