[llvm] [AMDGPU] misched: avoid subregister dependencies (PR #140255)

[Matt Arsenault via llvm-commits]

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@@ -468,6 +468,28 @@ class LLVM_ABI TargetRegisterInfo : public MCRegisterInfo {
     return false;
   }
 
+  /// Returns true if the two subregisters are equal or overlap.
+  /// The registers may be virtual registers.
+  bool subRegsOverlap(Register RegA, unsigned SubA, Register RegB,
+                      unsigned SubB) const {
+    if (RegA == RegB && SubA == SubB)
+      return true;
+    if (RegA.isVirtual() && RegB.isVirtual()) {
+      if (RegA != RegB)
+        return false;
+      LaneBitmask LA = getSubRegIndexLaneMask(SubA);
+      LaneBitmask LB = getSubRegIndexLaneMask(SubB);
+      return (LA & LB).any();
+    }
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arsenm wrote:

Because the interference is an assignment decision for the virtual register. It's context dependent on the lane mask and position in the function 

https://github.com/llvm/llvm-project/pull/140255