[llvm] [mlir] [mlir] Add Normalize pass (PR #162266)
Jacques Pienaar via llvm-commits
llvm-commits at lists.llvm.org
Fri Oct 24 04:49:39 PDT 2025
================
@@ -0,0 +1,203 @@
+// RUN: mlir-opt %s --normalize --mlir-use-nameloc-as-prefix 2>&1 | FileCheck %s
+
+// CHECK-LABEL: module {
+// CHECK: func.func @infinte_loop(%[[ARG0:.*]]: memref<?xi32>, %[[ARG1:.*]]: i32) {
+// CHECK: %vl15969$e5677$ = arith.constant 1 : i32
+// CHECK: %vl15390$funcArg1-vl15969$ = arith.addi %[[ARG1:.*]], %vl15969$e5677$ : i32
+// CHECK: cf.br ^bb1(%vl15390$funcArg1-vl15969$, %vl15390$funcArg1-vl15969$ : i32, i32)
+// CHECK: ^bb1(%[[VAL_0:.*]]: i32, %[[VAL_1:.*]]: i32): // 2 preds: ^bb0, ^bb1
+// CHECK: %vl22288$20b04$ = arith.constant 0 : i32
+// CHECK: %vl13736$blockArg0-vl22288$ = arith.muli %[[VAL_0:.*]], %vl22288$20b04$ : i32
+// CHECK: %vl22288$ded78$ = arith.constant -1 : i32
+// CHECK: %op51214$vl13736-vl22288$ = arith.xori %vl13736$blockArg0-vl22288$, %vl22288$ded78$ : i32
+// CHECK: %op12693$blockArg0-op51214$ = arith.addi %[[VAL_0:.*]], %op51214$vl13736-vl22288$ : i32
+// CHECK: %vl15894$blockArg1-vl22288$ = arith.addi %[[VAL_1:.*]], %vl22288$ded78$ : i32
+// CHECK: %op15672$op12693-vl15894$ = arith.addi %op12693$blockArg0-op51214$, %vl15894$blockArg1-vl22288$ : i32
+// CHECK: %op97825$op15672-vl13736$ = arith.muli %op15672$op12693-vl15894$, %vl13736$blockArg0-vl22288$ : i32
+// CHECK: %op51214$op97825-vl22288$ = arith.xori %op97825$op15672-vl13736$, %vl22288$ded78$ : i32
+// CHECK: %op12343$op15672-op51214$ = arith.addi %op15672$op12693-vl15894$, %op51214$op97825-vl22288$ : i32
+// CHECK: %op27844$op12343-vl22288$ = arith.addi %op12343$op15672-op51214$, %vl22288$20b04$ : i32
+// CHECK: %op97825$op27844-op97825$ = arith.muli %op27844$op12343-vl22288$, %op97825$op15672-vl13736$ : i32
+// CHECK: %op51214$op97825-vl22288$_0 = arith.xori %op97825$op27844-op97825$, %vl22288$ded78$ : i32
+// CHECK: %op12343$op27844-op51214$ = arith.addi %op27844$op12343-vl22288$, %op51214$op97825-vl22288$_0 : i32
+// CHECK: %op27844$op12343-vl22288$_1 = arith.addi %op12343$op27844-op51214$, %vl22288$20b04$ : i32
+// CHECK: %op27844$op27844-vl22288$ = arith.addi %op27844$op12343-vl22288$_1, %vl22288$20b04$ : i32
+// CHECK: %op27844$op27844-vl22288$_2 = arith.addi %op27844$op27844-vl22288$, %vl22288$20b04$ : i32
+// CHECK: %op97825$op27844-op97825$_3 = arith.muli %op27844$op12343-vl22288$_1, %op97825$op27844-op97825$ : i32
+// CHECK: %op97825$op27844-op97825$_4 = arith.muli %op27844$op27844-vl22288$_2, %op97825$op27844-op97825$_3 : i32
+// CHECK: %op51214$op97825-vl22288$_5 = arith.xori %op97825$op27844-op97825$_4, %vl22288$ded78$ : i32
+// CHECK: %op12343$op27844-op51214$_6 = arith.addi %op27844$op27844-vl22288$_2, %op51214$op97825-vl22288$_5 : i32
+// CHECK: %op27844$op12343-vl22288$_7 = arith.addi %op12343$op27844-op51214$_6, %vl22288$20b04$ : i32
+// CHECK: %op97825$op27844-op97825$_8 = arith.muli %op27844$op12343-vl22288$_7, %op97825$op27844-op97825$_4 : i32
+// CHECK: %op51214$op97825-vl22288$_9 = arith.xori %op97825$op27844-op97825$_8, %vl22288$ded78$ : i32
+// CHECK: %op12343$op27844-op51214$_10 = arith.addi %op27844$op12343-vl22288$_7, %op51214$op97825-vl22288$_9 : i32
+// CHECK: %op27844$op12343-vl22288$_11 = arith.addi %op12343$op27844-op51214$_10, %vl22288$20b04$ : i32
+// CHECK: %op97825$op27844-op97825$_12 = arith.muli %op27844$op12343-vl22288$_11, %op97825$op27844-op97825$_8 : i32
+// CHECK: %op51214$op97825-vl22288$_13 = arith.xori %op97825$op27844-op97825$_12, %vl22288$ded78$ : i32
+// CHECK: %op12343$op27844-op51214$_14 = arith.addi %op27844$op12343-vl22288$_11, %op51214$op97825-vl22288$_13 : i32
+// CHECK: %op27844$op12343-vl22288$_15 = arith.addi %op12343$op27844-op51214$_14, %vl22288$20b04$ : i32
+// CHECK: %op97825$op27844-op97825$_16 = arith.muli %op27844$op12343-vl22288$_15, %op97825$op27844-op97825$_12 : i32
+// CHECK: %op51214$op97825-vl22288$_17 = arith.xori %op97825$op27844-op97825$_16, %vl22288$ded78$ : i32
+// CHECK: %op12343$op27844-op51214$_18 = arith.addi %op27844$op12343-vl22288$_15, %op51214$op97825-vl22288$_17 : i32
+// CHECK: %op27844$op12343-vl22288$_19 = arith.addi %op12343$op27844-op51214$_18, %vl22288$20b04$ : i32
+// CHECK: %op97825$op27844-op97825$_20 = arith.muli %op27844$op12343-vl22288$_19, %op97825$op27844-op97825$_16 : i32
+// CHECK: %op51214$op97825-vl22288$_21 = arith.xori %op97825$op27844-op97825$_20, %vl22288$ded78$ : i32
+// CHECK: %op12343$op27844-op51214$_22 = arith.addi %op27844$op12343-vl22288$_19, %op51214$op97825-vl22288$_21 : i32
+// CHECK: %vl22288$51850$ = arith.constant -9 : i32
+// CHECK: %vl15894$blockArg1-vl22288$_23 = arith.addi %[[VAL_1:.*]], %vl22288$51850$ : i32
+// CHECK: %op15672$op12343-vl15894$ = arith.addi %op12343$op27844-op51214$_22, %vl15894$blockArg1-vl22288$_23 : i32
+// CHECK: %op97825$op15672-op97825$ = arith.muli %op15672$op12343-vl15894$, %op97825$op27844-op97825$_20 : i32
+// CHECK: %op51214$op97825-vl22288$_24 = arith.xori %op97825$op15672-op97825$, %vl22288$ded78$ : i32
+// CHECK: %op12343$op15672-op51214$_25 = arith.addi %op15672$op12343-vl15894$, %op51214$op97825-vl22288$_24 : i32
+// CHECK: %op27844$op12343-vl22288$_26 = arith.addi %op12343$op15672-op51214$_25, %vl22288$20b04$ : i32
+// CHECK: %op97825$op27844-op97825$_27 = arith.muli %op27844$op12343-vl22288$_26, %op97825$op15672-op97825$ : i32
+// CHECK: %op51214$op97825-vl22288$_28 = arith.xori %op97825$op27844-op97825$_27, %vl22288$ded78$ : i32
+// CHECK: %op12343$op27844-op51214$_29 = arith.addi %op27844$op12343-vl22288$_26, %op51214$op97825-vl22288$_28 : i32
+// CHECK: %op27844$op12343-vl22288$_30 = arith.addi %op12343$op27844-op51214$_29, %vl22288$20b04$ : i32
+// CHECK: %op97825$op27844-op97825$_31 = arith.muli %op27844$op12343-vl22288$_30, %op97825$op27844-op97825$_27 : i32
+// CHECK: %op51214$op97825-vl22288$_32 = arith.xori %op97825$op27844-op97825$_31, %vl22288$ded78$ : i32
+// CHECK: %op12343$op27844-op51214$_33 = arith.addi %op27844$op12343-vl22288$_30, %op51214$op97825-vl22288$_32 : i32
+// CHECK: %op27844$op12343-vl22288$_34 = arith.addi %op12343$op27844-op51214$_33, %vl22288$20b04$ : i32
+// CHECK: %op97825$op27844-op97825$_35 = arith.muli %op27844$op12343-vl22288$_34, %op97825$op27844-op97825$_31 : i32
+// CHECK: %op51214$op97825-vl22288$_36 = arith.xori %op97825$op27844-op97825$_35, %vl22288$ded78$ : i32
+// CHECK: %op12343$op27844-op51214$_37 = arith.addi %op27844$op12343-vl22288$_34, %op51214$op97825-vl22288$_36 : i32
+// CHECK: %op27844$op12343-vl22288$_38 = arith.addi %op12343$op27844-op51214$_37, %vl22288$20b04$ : i32
+// CHECK: %op97825$op27844-op97825$_39 = arith.muli %op27844$op12343-vl22288$_38, %op97825$op27844-op97825$_35 : i32
+// CHECK: %op51214$op97825-vl22288$_40 = arith.xori %op97825$op27844-op97825$_39, %vl22288$ded78$ : i32
+// CHECK: %op12343$op27844-op51214$_41 = arith.addi %op27844$op12343-vl22288$_38, %op51214$op97825-vl22288$_40 : i32
+// CHECK: %vl22288$7b7de$ = arith.constant -14 : i32
+// CHECK: %vl15894$blockArg1-vl22288$_42 = arith.addi %[[VAL_1:.*]], %vl22288$7b7de$ : i32
+// CHECK: %op15672$op12343-vl15894$_43 = arith.addi %op12343$op27844-op51214$_41, %vl15894$blockArg1-vl22288$_42 : i32
+// CHECK: %op97825$op15672-op97825$_44 = arith.muli %op15672$op12343-vl15894$_43, %op97825$op27844-op97825$_39 : i32
+// CHECK: %op51214$op97825-vl22288$_45 = arith.xori %op97825$op15672-op97825$_44, %vl22288$ded78$ : i32
+// CHECK: %op12343$op15672-op51214$_46 = arith.addi %op15672$op12343-vl15894$_43, %op51214$op97825-vl22288$_45 : i32
+// CHECK: %op27844$op12343-vl22288$_47 = arith.addi %op12343$op15672-op51214$_46, %vl22288$20b04$ : i32
+// CHECK: %op97825$op27844-op97825$_48 = arith.muli %op27844$op12343-vl22288$_47, %op97825$op15672-op97825$_44 : i32
+// CHECK: %op51214$op97825-vl22288$_49 = arith.xori %op97825$op27844-op97825$_48, %vl22288$ded78$ : i32
+// CHECK: %op12343$op27844-op51214$_50 = arith.addi %op27844$op12343-vl22288$_47, %op51214$op97825-vl22288$_49 : i32
+// CHECK: %op27844$op12343-vl22288$_51 = arith.addi %op12343$op27844-op51214$_50, %vl22288$20b04$ : i32
+// CHECK: %op97825$op27844-op97825$_52 = arith.muli %op27844$op12343-vl22288$_51, %op97825$op27844-op97825$_48 : i32
+// CHECK: %op51214$op97825-vl22288$_53 = arith.xori %op97825$op27844-op97825$_52, %vl22288$ded78$ : i32
+// CHECK: %op12343$op27844-op51214$_54 = arith.addi %op27844$op12343-vl22288$_51, %op51214$op97825-vl22288$_53 : i32
+// CHECK: %op27844$op12343-vl22288$_55 = arith.addi %op12343$op27844-op51214$_54, %vl22288$20b04$ : i32
+// CHECK: %op97825$op27844-op97825$_56 = arith.muli %op27844$op12343-vl22288$_55, %op97825$op27844-op97825$_52 : i32
+// CHECK: %op51214$op97825-vl22288$_57 = arith.xori %op97825$op27844-op97825$_56, %vl22288$ded78$ : i32
+// CHECK: %op12343$op27844-op51214$_58 = arith.addi %op27844$op12343-vl22288$_55, %op51214$op97825-vl22288$_57 : i32
+// CHECK: %op27844$op12343-vl22288$_59 = arith.addi %op12343$op27844-op51214$_58, %vl22288$20b04$ : i32
+// CHECK: %op97825$op27844-op97825$_60 = arith.muli %op27844$op12343-vl22288$_59, %op97825$op27844-op97825$_56 : i32
+// CHECK: %op51214$op97825-vl22288$_61 = arith.xori %op97825$op27844-op97825$_60, %vl22288$ded78$ : i32
+// CHECK: %op12343$op27844-op51214$_62 = arith.addi %op27844$op12343-vl22288$_59, %op51214$op97825-vl22288$_61 : i32
+// CHECK: %op27844$op12343-vl22288$_63 = arith.addi %op12343$op27844-op51214$_62, %vl22288$20b04$ : i32
+// CHECK: %op97825$op27844-op97825$_64 = arith.muli %op27844$op12343-vl22288$_63, %op97825$op27844-op97825$_60 : i32
+// CHECK: %op51214$op97825-vl22288$_65 = arith.xori %op97825$op27844-op97825$_64, %vl22288$ded78$ : i32
+// CHECK: %op12343$op27844-op51214$_66 = arith.addi %op27844$op12343-vl22288$_63, %op51214$op97825-vl22288$_65 : i32
+// CHECK: %op27844$op12343-vl22288$_67 = arith.addi %op12343$op27844-op51214$_66, %vl22288$20b04$ : i32
+// CHECK: %op27844$op27844-vl22288$_68 = arith.addi %op27844$op12343-vl22288$_67, %vl22288$20b04$ : i32
+// CHECK: %vl22288$1e72e$ = arith.constant -21 : i32
+// CHECK: %vl15894$blockArg1-vl22288$_69 = arith.addi %[[VAL_1:.*]], %vl22288$1e72e$ : i32
+// CHECK: %op15672$op27844-vl15894$ = arith.addi %op27844$op27844-vl22288$_68, %vl15894$blockArg1-vl22288$_69 : i32
+// CHECK: %vl48856$e527e$ = arith.constant 0 : index
+// CHECK: memref.store %op15672$op27844-vl15894$, %[[ARG0:.*]][%vl48856$e527e$] : memref<?xi32>
+// CHECK: cf.br ^bb1(%op15672$op27844-vl15894$, %vl15894$blockArg1-vl22288$_69 : i32, i32)
+// CHECK: }
+// CHECK: }
+func.func @infinte_loop(%arg0: memref<?xi32>, %arg1: i32) {
+ %c1 = arith.constant 1 : i32
+ %a = arith.addi %arg1, %c1 : i32
+ cf.br ^bb1(%a, %a : i32, i32)
+
+ ^bb1(%tmp: i32, %tmp2: i32):
+ %c0 = arith.constant 0 : i32
+ %tmp3 = arith.muli %tmp, %c0 : i32
+ %cneg1 = arith.constant -1 : i32
+ %tmp4 = arith.xori %tmp3, %cneg1 : i32
+ %tmp5 = arith.addi %tmp, %tmp4 : i32
+ %tmp6 = arith.addi %tmp2, %cneg1 : i32
+ %tmp7 = arith.addi %tmp5, %tmp6 : i32
+ %tmp8 = arith.muli %tmp7, %tmp3 : i32
+ %tmp9 = arith.xori %tmp8, %cneg1 : i32
+ %tmp10 = arith.addi %tmp7, %tmp9 : i32
+ %tmp11 = arith.addi %tmp10, %c0 : i32
+ %tmp12 = arith.muli %tmp11, %tmp8 : i32
+ %tmp13 = arith.xori %tmp12, %cneg1 : i32
+ %tmp14 = arith.addi %tmp11, %tmp13 : i32
+ %tmp15 = arith.addi %tmp14, %c0 : i32
+ %tmp16 = arith.muli %tmp15, %tmp12 : i32
+ %tmp17 = arith.addi %tmp15, %c0 : i32
+ %tmp18 = arith.addi %tmp17, %c0 : i32
+ %tmp19 = arith.muli %tmp18, %tmp16 : i32
+ %tmp20 = arith.xori %tmp19, %cneg1 : i32
+ %tmp21 = arith.addi %tmp18, %tmp20 : i32
+ %tmp22 = arith.addi %tmp21, %c0 : i32
+ %tmp23 = arith.muli %tmp22, %tmp19 : i32
+ %tmp24 = arith.xori %tmp23, %cneg1 : i32
+ %tmp25 = arith.addi %tmp22, %tmp24 : i32
+ %tmp26 = arith.addi %tmp25, %c0 : i32
+ %tmp27 = arith.muli %tmp26, %tmp23 : i32
+ %tmp28 = arith.xori %tmp27, %cneg1 : i32
+ %tmp29 = arith.addi %tmp26, %tmp28 : i32
+ %tmp30 = arith.addi %tmp29, %c0 : i32
+ %tmp31 = arith.muli %tmp30, %tmp27 : i32
+ %tmp32 = arith.xori %tmp31, %cneg1 : i32
+ %tmp33 = arith.addi %tmp30, %tmp32 : i32
+ %tmp34 = arith.addi %tmp33, %c0 : i32
+ %tmp35 = arith.muli %tmp34, %tmp31 : i32
+ %tmp36 = arith.xori %tmp35, %cneg1 : i32
+ %tmp37 = arith.addi %tmp34, %tmp36 : i32
+ %cneg9 = arith.constant -9 : i32
+ %tmp38 = arith.addi %tmp2, %cneg9 : i32
+ %tmp39 = arith.addi %tmp37, %tmp38 : i32
+ %tmp40 = arith.muli %tmp39, %tmp35 : i32
+ %tmp41 = arith.xori %tmp40, %cneg1 : i32
+ %tmp42 = arith.addi %tmp39, %tmp41 : i32
+ %tmp43 = arith.addi %tmp42, %c0 : i32
+ %tmp44 = arith.muli %tmp43, %tmp40 : i32
----------------
jpienaar wrote:
A lot of these seem like they can't be reordered due to creating a rather linear sequence here. How about doing a N node tree-link input structure here linearized, that way you could have both short and long term reorderings? (of course many other generated could work, goal is just to know there are many variants possible and given two variants see same output).
https://github.com/llvm/llvm-project/pull/162266
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