[llvm] [UpdateTestChecks][llc] Remove support for aarch64-apple-darwin (PR #164874)

Tomer Shafir via llvm-commits llvm-commits at lists.llvm.org
Thu Oct 23 11:48:03 PDT 2025


https://github.com/tomershafir created https://github.com/llvm/llvm-project/pull/164874

Triples of the form *-darwin are not accurate and we should prefer real OS ones like *-macosx. This patch aligns and removes `aarch64-apple-darwin` support in `asm.py` for `update_llc_test_checks.py`. It also updates all autogenerated llc tests that use this variant to have macosx suffix and re-generates them.

>From c560e9e002bfd281eb2f0d19be135dfe7d7d0e2d Mon Sep 17 00:00:00 2001
From: tomershafir <tomer.shafir8 at gmail.com>
Date: Thu, 23 Oct 2025 21:47:09 +0300
Subject: [PATCH] [UpdateTestChecks][llc] Remove support for
 aarch64-apple-darwin

Triples of the form *-darwin are not accurate and we should prefer real OS ones like *-macosx. This patch aligns and removes `aarch64-apple-darwin` support in `asm.py` for `update_llc_test_checks.py`. It also updates all autogenerated llc tests that use this variant to have macosx suffix and re-generates them.
---
 .../GlobalISel/call-translator-variadic-musttail.ll    |  2 +-
 .../test/CodeGen/AArch64/GlobalISel/emutls-fallback.ll |  2 +-
 .../CodeGen/AArch64/GlobalISel/no-reduce-shl-of-ext.ll |  2 +-
 .../AArch64/GlobalISel/tail-call-no-save-fp-lr.ll      |  2 +-
 llvm/test/CodeGen/AArch64/aarch64_win64cc_vararg.ll    |  2 +-
 llvm/test/CodeGen/AArch64/and-mask-removal.ll          |  4 ++--
 llvm/test/CodeGen/AArch64/arm64-fcopysign.ll           |  2 +-
 llvm/test/CodeGen/AArch64/branch-relax-alignment.ll    |  2 +-
 llvm/test/CodeGen/AArch64/branch-relax-bcc.ll          |  2 +-
 llvm/test/CodeGen/AArch64/branch-relax-cbz.ll          |  2 +-
 llvm/test/CodeGen/AArch64/bswap-known-bits.ll          | 10 +++++-----
 .../test/CodeGen/AArch64/fast-isel-addressing-modes.ll |  4 ++--
 .../CodeGen/AArch64/fast-isel-branch-cond-split.ll     |  2 +-
 llvm/test/CodeGen/AArch64/fast-isel-cmp-vec.ll         |  2 +-
 llvm/test/CodeGen/AArch64/fast-isel-gep.ll             |  2 +-
 llvm/test/CodeGen/AArch64/fast-isel-memcpy.ll          |  2 +-
 llvm/test/CodeGen/AArch64/fast-isel-select.ll          |  6 +++---
 llvm/test/CodeGen/AArch64/fast-isel-shift.ll           |  2 +-
 llvm/test/CodeGen/AArch64/madd-combiner.ll             |  4 ++--
 llvm/test/CodeGen/AArch64/nontemporal-load.ll          |  2 +-
 llvm/test/CodeGen/AArch64/pr55644.ll                   |  2 +-
 llvm/test/CodeGen/AArch64/preserve_nonecc_call.ll      |  2 +-
 .../CodeGen/AArch64/preserve_nonecc_varargs_darwin.ll  |  2 +-
 llvm/test/CodeGen/AArch64/shift_minsize.ll             |  2 +-
 .../test/CodeGen/AArch64/stack-protector-darwin-got.ll |  2 +-
 llvm/test/CodeGen/AArch64/trampoline.ll                |  2 +-
 .../CodeGen/AArch64/vec-combine-compare-to-bitmask.ll  |  4 ++--
 .../AArch64/vec-combine-compare-truncate-store.ll      |  2 +-
 llvm/test/CodeGen/AArch64/vector-compress.ll           |  2 +-
 llvm/test/CodeGen/AArch64/vector-fcopysign.ll          |  4 ++--
 .../test/CodeGen/AArch64/vector-op-scalarize-strict.ll |  2 +-
 .../Inputs/target-triple-mismatch.ll                   |  1 +
 llvm/utils/UpdateTestChecks/asm.py                     |  1 -
 33 files changed, 43 insertions(+), 43 deletions(-)

diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/call-translator-variadic-musttail.ll b/llvm/test/CodeGen/AArch64/GlobalISel/call-translator-variadic-musttail.ll
index d2e94b29fe0e3..5d2ee01479bdc 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/call-translator-variadic-musttail.ll
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/call-translator-variadic-musttail.ll
@@ -1,5 +1,5 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc %s -verify-machineinstrs -mtriple aarch64-apple-darwin -global-isel -o - 2>&1 | FileCheck %s
+; RUN: llc %s -verify-machineinstrs -mtriple aarch64-apple-macosx -global-isel -o - 2>&1 | FileCheck %s
 
 ; There are two things we want to test here:
 ;  (1) We can tail call musttail calls.
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/emutls-fallback.ll b/llvm/test/CodeGen/AArch64/GlobalISel/emutls-fallback.ll
index e90b3e2d05afa..15dacad1ca3df 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/emutls-fallback.ll
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/emutls-fallback.ll
@@ -1,5 +1,5 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
-; RUN: llc -emulated-tls -mtriple aarch64-apple-darwin -global-isel -global-isel-abort=2 %s -o - 2>&1 | FileCheck %s
+; RUN: llc -emulated-tls -mtriple aarch64-apple-macosx -global-isel -global-isel-abort=2 %s -o - 2>&1 | FileCheck %s
 
 ; This file checks that the fallback path for instructions with emulated TLS variables to selection dag works.
 
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/no-reduce-shl-of-ext.ll b/llvm/test/CodeGen/AArch64/GlobalISel/no-reduce-shl-of-ext.ll
index ab009cb7cc0e3..3deda893acdb6 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/no-reduce-shl-of-ext.ll
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/no-reduce-shl-of-ext.ll
@@ -1,5 +1,5 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 3
-; RUN: llc %s -verify-machineinstrs -mtriple aarch64-apple-darwin -global-isel -o - | FileCheck %s
+; RUN: llc %s -verify-machineinstrs -mtriple aarch64-apple-macosx -global-isel -o - | FileCheck %s
 target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
 
 %struct.mszip_stream = type { i32, i32, i8, i32, ptr, i32, i32, i32, i32, ptr, ptr, ptr, ptr, ptr, i32, i32, i32, [288 x i8], [32 x i8], [1152 x i16], [128 x i16], [32768 x i8], ptr, ptr }
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/tail-call-no-save-fp-lr.ll b/llvm/test/CodeGen/AArch64/GlobalISel/tail-call-no-save-fp-lr.ll
index e54b3b8c2bcce..61aef9e963545 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/tail-call-no-save-fp-lr.ll
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/tail-call-no-save-fp-lr.ll
@@ -1,5 +1,5 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc %s -verify-machineinstrs -mtriple aarch64-apple-darwin -global-isel -global-isel-abort=1 -frame-pointer=non-leaf -o - 2>&1 | FileCheck %s
+; RUN: llc %s -verify-machineinstrs -mtriple aarch64-apple-macosx -global-isel -global-isel-abort=1 -frame-pointer=non-leaf -o - 2>&1 | FileCheck %s
 
 ; Check that we get a tail call to foo without saving fp/lr.
 define void @bar(i32 %a) {
diff --git a/llvm/test/CodeGen/AArch64/aarch64_win64cc_vararg.ll b/llvm/test/CodeGen/AArch64/aarch64_win64cc_vararg.ll
index 7d488c9ca2002..0780cc880d95e 100644
--- a/llvm/test/CodeGen/AArch64/aarch64_win64cc_vararg.ll
+++ b/llvm/test/CodeGen/AArch64/aarch64_win64cc_vararg.ll
@@ -1,6 +1,6 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
 ; RUN: llc < %s -mtriple=aarch64-linux-gnu | FileCheck %s
-; RUN: llc < %s --global-isel=1 -mtriple=aarch64-apple-darwin | FileCheck %s --check-prefix=DARWIN
+; RUN: llc < %s --global-isel=1 -mtriple=aarch64-apple-macosx | FileCheck %s --check-prefix=DARWIN
 
 define win64cc void @pass_va(i32 %count, ...) nounwind {
 ; CHECK-LABEL: pass_va:
diff --git a/llvm/test/CodeGen/AArch64/and-mask-removal.ll b/llvm/test/CodeGen/AArch64/and-mask-removal.ll
index 5046c0571ad2b..40917820dfdc8 100644
--- a/llvm/test/CodeGen/AArch64/and-mask-removal.ll
+++ b/llvm/test/CodeGen/AArch64/and-mask-removal.ll
@@ -1,6 +1,6 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=aarch64-apple-darwin -aarch64-enable-collect-loh=false -aarch64-enable-sink-fold=true < %s  | FileCheck %s --check-prefixes=CHECK,CHECK-SD
-; RUN: llc -mtriple=aarch64-apple-darwin -aarch64-enable-collect-loh=false -aarch64-enable-sink-fold=true -global-isel < %s  | FileCheck %s --check-prefixes=CHECK,CHECK-GI
+; RUN: llc -mtriple=aarch64-apple-macosx -aarch64-enable-collect-loh=false -aarch64-enable-sink-fold=true < %s  | FileCheck %s --check-prefixes=CHECK,CHECK-SD
+; RUN: llc -mtriple=aarch64-apple-macosx -aarch64-enable-collect-loh=false -aarch64-enable-sink-fold=true -global-isel < %s  | FileCheck %s --check-prefixes=CHECK,CHECK-GI
 
 @board = common global [400 x i8] zeroinitializer, align 1
 @next_string = common global i32 0, align 4
diff --git a/llvm/test/CodeGen/AArch64/arm64-fcopysign.ll b/llvm/test/CodeGen/AArch64/arm64-fcopysign.ll
index d5324e4274725..efe9e9c2768e7 100644
--- a/llvm/test/CodeGen/AArch64/arm64-fcopysign.ll
+++ b/llvm/test/CodeGen/AArch64/arm64-fcopysign.ll
@@ -1,5 +1,5 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=aarch64-apple-darwin | FileCheck %s
+; RUN: llc < %s -mtriple=aarch64-apple-macosx | FileCheck %s
 
 ; rdar://9332258
 
diff --git a/llvm/test/CodeGen/AArch64/branch-relax-alignment.ll b/llvm/test/CodeGen/AArch64/branch-relax-alignment.ll
index bafe432bbfbdb..e83561950c095 100644
--- a/llvm/test/CodeGen/AArch64/branch-relax-alignment.ll
+++ b/llvm/test/CodeGen/AArch64/branch-relax-alignment.ll
@@ -1,5 +1,5 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=aarch64-apple-darwin -aarch64-bcc-offset-bits=4 -align-all-nofallthru-blocks=4 < %s | FileCheck %s
+; RUN: llc -mtriple=aarch64-apple-macosx -aarch64-bcc-offset-bits=4 -align-all-nofallthru-blocks=4 < %s | FileCheck %s
 
 ; Long branch is assumed because the block has a higher alignment
 ; requirement than the function.
diff --git a/llvm/test/CodeGen/AArch64/branch-relax-bcc.ll b/llvm/test/CodeGen/AArch64/branch-relax-bcc.ll
index 1a901dc40f14c..d68663e2e6de5 100644
--- a/llvm/test/CodeGen/AArch64/branch-relax-bcc.ll
+++ b/llvm/test/CodeGen/AArch64/branch-relax-bcc.ll
@@ -1,5 +1,5 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=aarch64-apple-darwin -aarch64-bcc-offset-bits=3 < %s | FileCheck %s
+; RUN: llc -mtriple=aarch64-apple-macosx -aarch64-bcc-offset-bits=3 < %s | FileCheck %s
 
 define i32 @invert_bcc(float %x, float %y) #0 {
 ; CHECK-LABEL: invert_bcc:
diff --git a/llvm/test/CodeGen/AArch64/branch-relax-cbz.ll b/llvm/test/CodeGen/AArch64/branch-relax-cbz.ll
index 36d5c7b684fde..293b9f95c100c 100644
--- a/llvm/test/CodeGen/AArch64/branch-relax-cbz.ll
+++ b/llvm/test/CodeGen/AArch64/branch-relax-cbz.ll
@@ -1,5 +1,5 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=aarch64-apple-darwin -aarch64-cbz-offset-bits=3 < %s | FileCheck %s
+; RUN: llc -mtriple=aarch64-apple-macosx -aarch64-cbz-offset-bits=3 < %s | FileCheck %s
 
 
 define void @split_block_no_fallthrough(i64 %val) #0 {
diff --git a/llvm/test/CodeGen/AArch64/bswap-known-bits.ll b/llvm/test/CodeGen/AArch64/bswap-known-bits.ll
index 23619e47367d0..aedaefb08ceba 100644
--- a/llvm/test/CodeGen/AArch64/bswap-known-bits.ll
+++ b/llvm/test/CodeGen/AArch64/bswap-known-bits.ll
@@ -1,5 +1,5 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=aarch64-apple-darwin  | FileCheck %s
+; RUN: llc < %s -mtriple=aarch64-apple-macosx  | FileCheck %s
 
 declare i16 @llvm.bswap.i16(i16)
 declare i32 @llvm.bswap.i32(i32)
@@ -8,7 +8,7 @@ declare i64 @llvm.bswap.i64(i64)
 define i1 @test1(i16 %arg) {
 ; CHECK-LABEL: test1:
 ; CHECK:       ; %bb.0:
-; CHECK-NEXT:    mov w0, #1
+; CHECK-NEXT:    mov w0, #1 ; =0x1
 ; CHECK-NEXT:    ret
   %a = or i16 %arg, 511
   %b = call i16 @llvm.bswap.i16(i16 %a)
@@ -20,7 +20,7 @@ define i1 @test1(i16 %arg) {
 define i1 @test2(i16 %arg) {
 ; CHECK-LABEL: test2:
 ; CHECK:       ; %bb.0:
-; CHECK-NEXT:    mov w0, #1
+; CHECK-NEXT:    mov w0, #1 ; =0x1
 ; CHECK-NEXT:    ret
   %a = or i16 %arg, 1
   %b = call i16 @llvm.bswap.i16(i16 %a)
@@ -32,7 +32,7 @@ define i1 @test2(i16 %arg) {
 define i1 @test3(i16 %arg) {
 ; CHECK-LABEL: test3:
 ; CHECK:       ; %bb.0:
-; CHECK-NEXT:    mov w0, #1
+; CHECK-NEXT:    mov w0, #1 ; =0x1
 ; CHECK-NEXT:    ret
   %a = or i16 %arg, 256
   %b = call i16 @llvm.bswap.i16(i16 %a)
@@ -44,7 +44,7 @@ define i1 @test3(i16 %arg) {
 define i1 @test4(i32 %arg) {
 ; CHECK-LABEL: test4:
 ; CHECK:       ; %bb.0:
-; CHECK-NEXT:    mov w0, #1
+; CHECK-NEXT:    mov w0, #1 ; =0x1
 ; CHECK-NEXT:    ret
   %a = or i32 %arg, 2147483647  ; i32_MAX
   %b = call i32 @llvm.bswap.i32(i32 %a)
diff --git a/llvm/test/CodeGen/AArch64/fast-isel-addressing-modes.ll b/llvm/test/CodeGen/AArch64/fast-isel-addressing-modes.ll
index 5e14e63a23d3c..73d54561d9129 100644
--- a/llvm/test/CodeGen/AArch64/fast-isel-addressing-modes.ll
+++ b/llvm/test/CodeGen/AArch64/fast-isel-addressing-modes.ll
@@ -1,6 +1,6 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=aarch64-apple-darwin                             -verify-machineinstrs < %s | FileCheck %s --check-prefix=CHECK --check-prefix=SDAG
-; RUN: llc -mtriple=aarch64-apple-darwin -fast-isel -fast-isel-abort=1 -verify-machineinstrs < %s | FileCheck %s --check-prefix=CHECK --check-prefix=FAST
+; RUN: llc -mtriple=aarch64-apple-macosx                             -verify-machineinstrs < %s | FileCheck %s --check-prefix=CHECK --check-prefix=SDAG
+; RUN: llc -mtriple=aarch64-apple-macosx -fast-isel -fast-isel-abort=1 -verify-machineinstrs < %s | FileCheck %s --check-prefix=CHECK --check-prefix=FAST
 
 ; Load / Store Base Register only
 define zeroext i1 @load_breg_i1(ptr %a) {
diff --git a/llvm/test/CodeGen/AArch64/fast-isel-branch-cond-split.ll b/llvm/test/CodeGen/AArch64/fast-isel-branch-cond-split.ll
index 49e31447c1c0d..452d8b772c8c4 100644
--- a/llvm/test/CodeGen/AArch64/fast-isel-branch-cond-split.ll
+++ b/llvm/test/CodeGen/AArch64/fast-isel-branch-cond-split.ll
@@ -1,5 +1,5 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=aarch64-apple-darwin -fast-isel -fast-isel-abort=1 -verify-machineinstrs < %s | FileCheck %s
+; RUN: llc -mtriple=aarch64-apple-macosx -fast-isel -fast-isel-abort=1 -verify-machineinstrs < %s | FileCheck %s
 
 define i64 @test_or(i32 %a, i32 %b) {
 ; CHECK-LABEL: test_or:
diff --git a/llvm/test/CodeGen/AArch64/fast-isel-cmp-vec.ll b/llvm/test/CodeGen/AArch64/fast-isel-cmp-vec.ll
index 11f36508c42d0..1cfb8477b652c 100644
--- a/llvm/test/CodeGen/AArch64/fast-isel-cmp-vec.ll
+++ b/llvm/test/CodeGen/AArch64/fast-isel-cmp-vec.ll
@@ -1,5 +1,5 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=aarch64-apple-darwin -fast-isel -verify-machineinstrs \
+; RUN: llc -mtriple=aarch64-apple-macosx -fast-isel -verify-machineinstrs \
 ; RUN:   -aarch64-enable-atomic-cfg-tidy=0 -disable-cgp -disable-branch-fold \
 ; RUN:   < %s | FileCheck %s
 
diff --git a/llvm/test/CodeGen/AArch64/fast-isel-gep.ll b/llvm/test/CodeGen/AArch64/fast-isel-gep.ll
index 3dc4771eb01c1..83028ffbc02c7 100644
--- a/llvm/test/CodeGen/AArch64/fast-isel-gep.ll
+++ b/llvm/test/CodeGen/AArch64/fast-isel-gep.ll
@@ -1,5 +1,5 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=aarch64-apple-darwin -fast-isel -fast-isel-abort=1 -verify-machineinstrs < %s | FileCheck %s
+; RUN: llc -mtriple=aarch64-apple-macosx -fast-isel -fast-isel-abort=1 -verify-machineinstrs < %s | FileCheck %s
 
 %struct.foo = type { i32, i64, float, double }
 
diff --git a/llvm/test/CodeGen/AArch64/fast-isel-memcpy.ll b/llvm/test/CodeGen/AArch64/fast-isel-memcpy.ll
index 76873cd3ca9e5..2afba0410c617 100644
--- a/llvm/test/CodeGen/AArch64/fast-isel-memcpy.ll
+++ b/llvm/test/CodeGen/AArch64/fast-isel-memcpy.ll
@@ -1,5 +1,5 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=aarch64-apple-darwin -fast-isel -fast-isel-abort=1 -verify-machineinstrs < %s | FileCheck %s
+; RUN: llc -mtriple=aarch64-apple-macosx -fast-isel -fast-isel-abort=1 -verify-machineinstrs < %s | FileCheck %s
 
 ; Test that we don't segfault.
 define void @test(i64 %a, ptr %b) {
diff --git a/llvm/test/CodeGen/AArch64/fast-isel-select.ll b/llvm/test/CodeGen/AArch64/fast-isel-select.ll
index 6e55bf4968e78..3f9d78746db35 100644
--- a/llvm/test/CodeGen/AArch64/fast-isel-select.ll
+++ b/llvm/test/CodeGen/AArch64/fast-isel-select.ll
@@ -1,7 +1,7 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
-; RUN: llc -mtriple=aarch64-apple-darwin                             -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,CHECK-SDAGISEL
-; RUN: llc -mtriple=aarch64-apple-darwin -fast-isel -fast-isel-abort=1 -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,CHECK-FASTISEL
-; RUN: llc -mtriple=aarch64-apple-darwin -global-isel -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,CHECK-GISEL
+; RUN: llc -mtriple=aarch64-apple-macosx                             -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,CHECK-SDAGISEL
+; RUN: llc -mtriple=aarch64-apple-macosx -fast-isel -fast-isel-abort=1 -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,CHECK-FASTISEL
+; RUN: llc -mtriple=aarch64-apple-macosx -global-isel -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,CHECK-GISEL
 
 ; First test the different supported value types for select.
 define zeroext i1 @select_i1(i1 zeroext %c, i1 zeroext %a, i1 zeroext %b) {
diff --git a/llvm/test/CodeGen/AArch64/fast-isel-shift.ll b/llvm/test/CodeGen/AArch64/fast-isel-shift.ll
index 76f81719b4547..f36315339afbc 100644
--- a/llvm/test/CodeGen/AArch64/fast-isel-shift.ll
+++ b/llvm/test/CodeGen/AArch64/fast-isel-shift.ll
@@ -1,5 +1,5 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -fast-isel -fast-isel-abort=1 -mtriple=aarch64-apple-darwin -verify-machineinstrs < %s | FileCheck %s
+; RUN: llc -fast-isel -fast-isel-abort=1 -mtriple=aarch64-apple-macosx -verify-machineinstrs < %s | FileCheck %s
 
 define zeroext i16 @asr_zext_i1_i16(i1 %b) {
 ; CHECK-LABEL: asr_zext_i1_i16:
diff --git a/llvm/test/CodeGen/AArch64/madd-combiner.ll b/llvm/test/CodeGen/AArch64/madd-combiner.ll
index cc7fc8fc98629..805d36b5742ea 100644
--- a/llvm/test/CodeGen/AArch64/madd-combiner.ll
+++ b/llvm/test/CodeGen/AArch64/madd-combiner.ll
@@ -1,6 +1,6 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=aarch64-apple-darwin            -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,CHECK-ISEL
-; RUN: llc -mtriple=aarch64-apple-darwin -fast-isel -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,CHECK-FAST
+; RUN: llc -mtriple=aarch64-apple-macosx            -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,CHECK-ISEL
+; RUN: llc -mtriple=aarch64-apple-macosx -fast-isel -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,CHECK-FAST
 
 ; Test that we use the correct register class.
 define i32 @mul_add_imm(i32 %a, i32 %b) {
diff --git a/llvm/test/CodeGen/AArch64/nontemporal-load.ll b/llvm/test/CodeGen/AArch64/nontemporal-load.ll
index ffafe69b29266..99e7c6179f887 100644
--- a/llvm/test/CodeGen/AArch64/nontemporal-load.ll
+++ b/llvm/test/CodeGen/AArch64/nontemporal-load.ll
@@ -1,5 +1,5 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc --mattr=+sve -aarch64-enable-sink-fold=true < %s -mtriple aarch64-apple-darwin | FileCheck %s
+; RUN: llc --mattr=+sve -aarch64-enable-sink-fold=true < %s -mtriple aarch64-apple-macosx | FileCheck %s
 ; RUN: llc --mattr=+sve -aarch64-enable-sink-fold=true < %s -mtriple aarch64_be-unknown-unknown | FileCheck --check-prefix CHECK-BE %s
 
 define <4 x double> @test_ldnp_v4f64(ptr %A) {
diff --git a/llvm/test/CodeGen/AArch64/pr55644.ll b/llvm/test/CodeGen/AArch64/pr55644.ll
index 00d29d700cea1..618570b64147b 100644
--- a/llvm/test/CodeGen/AArch64/pr55644.ll
+++ b/llvm/test/CodeGen/AArch64/pr55644.ll
@@ -1,5 +1,5 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=aarch64-apple-darwin | FileCheck %s
+; RUN: llc < %s -mtriple=aarch64-apple-macosx | FileCheck %s
 
 define i1 @f(i2 %0) {
 ; CHECK-LABEL: f:
diff --git a/llvm/test/CodeGen/AArch64/preserve_nonecc_call.ll b/llvm/test/CodeGen/AArch64/preserve_nonecc_call.ll
index 9b9717c19321e..52bfcaba87e7d 100644
--- a/llvm/test/CodeGen/AArch64/preserve_nonecc_call.ll
+++ b/llvm/test/CodeGen/AArch64/preserve_nonecc_call.ll
@@ -1,6 +1,6 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4
 ; RUN: llc -mtriple=aarch64-unknown-unknown < %s | FileCheck --check-prefixes=CHECK %s
-; RUN: llc -mtriple=aarch64-apple-darwin < %s | FileCheck --check-prefixes=DARWIN %s
+; RUN: llc -mtriple=aarch64-apple-macosx < %s | FileCheck --check-prefixes=DARWIN %s
 ; RUN: llc -mtriple=aarch64-pc-windows < %s | FileCheck --check-prefixes=WIN %s
 
 ; This test checks various function call behaviors between preserve_none and
diff --git a/llvm/test/CodeGen/AArch64/preserve_nonecc_varargs_darwin.ll b/llvm/test/CodeGen/AArch64/preserve_nonecc_varargs_darwin.ll
index 2a77d4dd33fe5..9e3e9bd8dba18 100644
--- a/llvm/test/CodeGen/AArch64/preserve_nonecc_varargs_darwin.ll
+++ b/llvm/test/CodeGen/AArch64/preserve_nonecc_varargs_darwin.ll
@@ -1,5 +1,5 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
-; RUN: llc -mtriple=aarch64-apple-darwin -aarch64-enable-subreg-liveness-tracking < %s | FileCheck %s
+; RUN: llc -mtriple=aarch64-apple-macosx -aarch64-enable-subreg-liveness-tracking < %s | FileCheck %s
 
 define preserve_nonecc i32 @callee(i32 %a1, i32 %a2, i32 %a3, i32 %a4, i32 %a5, ...) nounwind noinline ssp {
 ; CHECK-LABEL: callee:
diff --git a/llvm/test/CodeGen/AArch64/shift_minsize.ll b/llvm/test/CodeGen/AArch64/shift_minsize.ll
index 235fee718f539..b53002dd86f08 100644
--- a/llvm/test/CodeGen/AArch64/shift_minsize.ll
+++ b/llvm/test/CodeGen/AArch64/shift_minsize.ll
@@ -1,7 +1,7 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
 ; RUN: llc < %s -mtriple=aarch64-unknown-unknown | FileCheck %s
 ; RUN: llc < %s -mtriple=aarch64-windows         | FileCheck %s -check-prefix=CHECK-WIN
-; RUN: llc < %s -mtriple=aarch64-apple-darwin    | FileCheck %s -check-prefix=CHECK-DARWIN
+; RUN: llc < %s -mtriple=aarch64-apple-macosx    | FileCheck %s -check-prefix=CHECK-DARWIN
 
 ; The Windows runtime doesn't have these.
 ; CHECK-WIN-NOT: __ashlti3
diff --git a/llvm/test/CodeGen/AArch64/stack-protector-darwin-got.ll b/llvm/test/CodeGen/AArch64/stack-protector-darwin-got.ll
index 8d144c12ae3f1..00b6d8f0a991a 100644
--- a/llvm/test/CodeGen/AArch64/stack-protector-darwin-got.ll
+++ b/llvm/test/CodeGen/AArch64/stack-protector-darwin-got.ll
@@ -1,5 +1,5 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
-; RUN: llc -mtriple=aarch64-apple-darwin < %s -o - | FileCheck %s
+; RUN: llc -mtriple=aarch64-apple-macosx < %s -o - | FileCheck %s
 
 @.str = private unnamed_addr constant [4 x i8] c"%s\0A\00", align 1
 
diff --git a/llvm/test/CodeGen/AArch64/trampoline.ll b/llvm/test/CodeGen/AArch64/trampoline.ll
index 3e933fadc4fa2..83bd29a0160e8 100644
--- a/llvm/test/CodeGen/AArch64/trampoline.ll
+++ b/llvm/test/CodeGen/AArch64/trampoline.ll
@@ -2,7 +2,7 @@
 ; RUN: llc -mtriple=aarch64-linux-gnu < %s | FileCheck %s --check-prefixes=CHECK-LINUX
 ; RUN: llc -mtriple=aarch64-none-eabi < %s | FileCheck %s --check-prefixes=CHECK-LINUX
 ; RUN: llc -mtriple=aarch64-pc-windows-msvc < %s | FileCheck %s --check-prefix=CHECK-PC
-; RUN: llc -mtriple=aarch64-apple-darwin < %s | FileCheck %s --check-prefixes=CHECK-APPLE
+; RUN: llc -mtriple=aarch64-apple-macosx < %s | FileCheck %s --check-prefixes=CHECK-APPLE
 
 @trampg = internal global [36 x i8] zeroinitializer, align 8
 
diff --git a/llvm/test/CodeGen/AArch64/vec-combine-compare-to-bitmask.ll b/llvm/test/CodeGen/AArch64/vec-combine-compare-to-bitmask.ll
index 80029fb717575..88eb6f19e6e08 100644
--- a/llvm/test/CodeGen/AArch64/vec-combine-compare-to-bitmask.ll
+++ b/llvm/test/CodeGen/AArch64/vec-combine-compare-to-bitmask.ll
@@ -1,6 +1,6 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
-; RUN: llc -mtriple=aarch64-apple-darwin -mattr=+neon -aarch64-enable-collect-loh=false -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,CHECK-SD
-; RUN: llc -mtriple=aarch64-apple-darwin -mattr=+neon -aarch64-enable-collect-loh=false -global-isel -global-isel-abort=2 -verify-machineinstrs < %s 2>&1 | FileCheck %s --check-prefixes=CHECK,CHECK-GI
+; RUN: llc -mtriple=aarch64-apple-macosx -mattr=+neon -aarch64-enable-collect-loh=false -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,CHECK-SD
+; RUN: llc -mtriple=aarch64-apple-macosx -mattr=+neon -aarch64-enable-collect-loh=false -global-isel -global-isel-abort=2 -verify-machineinstrs < %s 2>&1 | FileCheck %s --check-prefixes=CHECK,CHECK-GI
 
 ; CHECK-GI:       warning: Instruction selection used fallback path for convert_to_bitmask2
 ; CHECK-GI-NEXT:  warning: Instruction selection used fallback path for clang_builtins_undef_concat_convert_to_bitmask4
diff --git a/llvm/test/CodeGen/AArch64/vec-combine-compare-truncate-store.ll b/llvm/test/CodeGen/AArch64/vec-combine-compare-truncate-store.ll
index 3c42079dc8d8a..a9397df0ebaae 100644
--- a/llvm/test/CodeGen/AArch64/vec-combine-compare-truncate-store.ll
+++ b/llvm/test/CodeGen/AArch64/vec-combine-compare-truncate-store.ll
@@ -1,5 +1,5 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
-; RUN: llc -mtriple=aarch64-apple-darwin -mattr=+neon -verify-machineinstrs < %s | FileCheck %s
+; RUN: llc -mtriple=aarch64-apple-macosx -mattr=+neon -verify-machineinstrs < %s | FileCheck %s
 
 define void @store_16_elements(<16 x i8> %vec, ptr %out) {
 ; Bits used in mask
diff --git a/llvm/test/CodeGen/AArch64/vector-compress.ll b/llvm/test/CodeGen/AArch64/vector-compress.ll
index 55c343164a1b8..c0ce71b9d408f 100644
--- a/llvm/test/CodeGen/AArch64/vector-compress.ll
+++ b/llvm/test/CodeGen/AArch64/vector-compress.ll
@@ -1,5 +1,5 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4
-; RUN: llc -mtriple=aarch64-apple-darwin -verify-machineinstrs < %s | FileCheck %s
+; RUN: llc -mtriple=aarch64-apple-macosx -verify-machineinstrs < %s | FileCheck %s
 
 define <4 x i32> @test_compress_v4i32(<4 x i32> %vec, <4 x i1> %mask) {
 ; CHECK-LABEL: test_compress_v4i32:
diff --git a/llvm/test/CodeGen/AArch64/vector-fcopysign.ll b/llvm/test/CodeGen/AArch64/vector-fcopysign.ll
index 063b23275c616..670b222aee292 100644
--- a/llvm/test/CodeGen/AArch64/vector-fcopysign.ll
+++ b/llvm/test/CodeGen/AArch64/vector-fcopysign.ll
@@ -1,6 +1,6 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple aarch64-apple-darwin | FileCheck --check-prefixes=CHECK,NOFP16 %s
-; RUN: llc < %s -mtriple aarch64-apple-darwin -mattr=+v8.2a,+fullfp16 | FileCheck --check-prefixes=CHECK,FP16 %s
+; RUN: llc < %s -mtriple aarch64-apple-macosx | FileCheck --check-prefixes=CHECK,NOFP16 %s
+; RUN: llc < %s -mtriple aarch64-apple-macosx -mattr=+v8.2a,+fullfp16 | FileCheck --check-prefixes=CHECK,FP16 %s
 
 target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
 
diff --git a/llvm/test/CodeGen/AArch64/vector-op-scalarize-strict.ll b/llvm/test/CodeGen/AArch64/vector-op-scalarize-strict.ll
index 8d6855d4f8188..c124b660d3325 100644
--- a/llvm/test/CodeGen/AArch64/vector-op-scalarize-strict.ll
+++ b/llvm/test/CodeGen/AArch64/vector-op-scalarize-strict.ll
@@ -1,5 +1,5 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=aarch64-apple-darwin | FileCheck %s
+; RUN: llc < %s -mtriple=aarch64-apple-macosx | FileCheck %s
 
 ; Check that the legalizer doesn't crash when scalarizing FP instructions'
 ; operands or results. In each test either the result or the operand are
diff --git a/llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/target-triple-mismatch.ll b/llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/target-triple-mismatch.ll
index 3da27cbacd172..72c44496cbcfa 100644
--- a/llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/target-triple-mismatch.ll
+++ b/llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/target-triple-mismatch.ll
@@ -1,4 +1,5 @@
 ; RUN: llc < %s -mtriple=arm64-apple-darwin | FileCheck %s
+; RUN: llc < %s -mtriple=aarch64-apple-darwin | FileCheck %s
 
 define i64 @foo(i64 %a) {
 entry:
diff --git a/llvm/utils/UpdateTestChecks/asm.py b/llvm/utils/UpdateTestChecks/asm.py
index 457b23f4a5f59..38fbfc7ece783 100644
--- a/llvm/utils/UpdateTestChecks/asm.py
+++ b/llvm/utils/UpdateTestChecks/asm.py
@@ -557,7 +557,6 @@ def get_run_handler(triple):
         "i386": (scrub_asm_x86, ASM_FUNCTION_X86_RE),
         "arm64_32": (scrub_asm_arm_eabi, ASM_FUNCTION_AARCH64_DARWIN_RE),
         "aarch64": (scrub_asm_arm_eabi, ASM_FUNCTION_AARCH64_RE),
-        "aarch64-apple-darwin": (scrub_asm_arm_eabi, ASM_FUNCTION_AARCH64_DARWIN_RE),
         "aarch64-apple-ios": (scrub_asm_arm_eabi, ASM_FUNCTION_AARCH64_DARWIN_RE),
         "aarch64-apple-macosx": (scrub_asm_arm_eabi, ASM_FUNCTION_AARCH64_DARWIN_RE),
         "bpf": (scrub_asm_bpf, ASM_FUNCTION_BPF_RE),



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