[clang] [llvm] [llvm][clang] Add intrinsic support for cbo.zero instruction (Zicboz ISA extension) (PR #164822)

[Jessica Clarke via llvm-commits]

jrtc27 wrote:

AFAIK other architectures don't bother to expose this as an intrinsic. Why should RISC-V?

https://github.com/llvm/llvm-project/pull/164822