[llvm] [VPlan] Introduce cannotHoistOrSinkRecipe, fix miscompile (PR #162674)

[Florian Hahn via llvm-commits]

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@@ -425,3 +425,40 @@ loop:
 exit:
   ret void
 }
+
+define void @hoist_previous_value_and_operand_load(ptr %dst, i64 %mask) {
+; CHECK-LABEL: @hoist_previous_value_and_operand_load(
+; CHECK-NEXT:  bb:
+; CHECK-NEXT:    br label [[LOOP1:%.*]]
+; CHECK:       loop:
+; CHECK-NEXT:    [[IV:%.*]] = phi i64 [ 1, [[BB:%.*]] ], [ [[ADD:%.*]], [[LOOP1]] ]
+; CHECK-NEXT:    [[FOR_1:%.*]] = phi i32 [ 1, [[BB]] ], [ [[TRUNC:%.*]], [[LOOP1]] ]
+; CHECK-NEXT:    [[FOR_2:%.*]] = phi i32 [ 0, [[BB]] ], [ [[OR:%.*]], [[LOOP1]] ]
+; CHECK-NEXT:    [[OR]] = or i32 [[FOR_1]], 3
+; CHECK-NEXT:    [[ADD]] = add i64 [[IV]], 1
+; CHECK-NEXT:    [[GEP:%.*]] = getelementptr inbounds i32, ptr [[DST:%.*]], i64 [[IV]]
+; CHECK-NEXT:    store i32 [[FOR_2]], ptr [[GEP]], align 4
+; CHECK-NEXT:    [[ICMP:%.*]] = icmp ult i64 [[IV]], 337
+; CHECK-NEXT:    [[TRUNC]] = load i32, ptr [[DST]], align 4
+; CHECK-NEXT:    br i1 [[ICMP]], label [[LOOP1]], label [[EXIT:%.*]]
+; CHECK:       exit:
+; CHECK-NEXT:    ret void
+;
+bb:
+  br label %loop
+
+loop:
+  %iv = phi i64 [ 1, %bb ], [ %add, %loop ]
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fhahn wrote:

I think the assume would need to use the first-order recurrence

https://github.com/llvm/llvm-project/pull/162674