[llvm] [AArch64] Initial sched model for Neoverse V3, V3AE (PR #163932)

Simon Wallis via llvm-commits llvm-commits at lists.llvm.org
Wed Oct 22 02:46:34 PDT 2025


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@@ -1295,9 +1295,9 @@ def : ProcessorModel<"neoverse-v1", NeoverseV1Model,
                      ProcessorFeatures.NeoverseV1, [TuneNeoverseV1]>;
 def : ProcessorModel<"neoverse-v2", NeoverseV2Model,
                      ProcessorFeatures.NeoverseV2, [TuneNeoverseV2]>;
-def : ProcessorModel<"neoverse-v3", NeoverseV2Model,
+def : ProcessorModel<"neoverse-v3", NeoverseV3Model,
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simonwallis2 wrote:

There is now a new premerge checks failire.
Next revision of the patch will include updated llvm-mca/AArch64/Cortex/X4-sve-instructions.s

https://github.com/llvm/llvm-project/pull/163932


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