[llvm] [ARM] Verify that disassembled instruction is correct (PR #157360)

[Prabhu Rajasekaran via llvm-commits]

Prabhuk wrote:

I am investigating a failure when I compile a cortex-m33 target with ToT llvm: "tBcc: expected 3 operands, got 5"

This change seems to be the root cause of the problem. Any help in investigating this will be highly appreciated @s-barannikov 

https://github.com/llvm/llvm-project/pull/157360