[llvm] [NVPTX] Lower LLVM masked vector loads and stores to PTX (PR #159387)

[Princeton Ferro via llvm-commits]

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@@ -5109,9 +5291,13 @@ combineUnpackingMovIntoLoad(SDNode *N, TargetLowering::DAGCombinerInfo &DCI) {
     // ISD::LOAD -> NVPTXISD::Load (unless it's under-aligned). We have to do it
     // here.
     Opcode = NVPTXISD::LoadV2;
+    // append a "full" used bytes mask operand right before the extension type
+    // operand, signifying that all bytes are used.
+    Operands.push_back(DCI.DAG.getConstant(UINT32_MAX, DL, MVT::i32));
     Operands.push_back(DCI.DAG.getIntPtrConstant(
         cast<LoadSDNode>(LD)->getExtensionType(), DL));
     break;
+  // TODO do we need to support MLoadV1 here?
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Prince781 wrote:

It seems to make more sense for an MLOAD of a packed type to get converted into a load of the packed type or a load of the element type by an IR-level pass. So we shouldn't handle it here.

https://github.com/llvm/llvm-project/pull/159387